The patch add VxLAN & NVGRE TX checksum off-load. When the flag of
outer IP header checksum offload is set, we'll set the context
descriptor to enable this checksum off-load.
Also update release notes for VxLAN & NVGRE checksum off-load support.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Macros RTE_MBUF_DATA_DMA_ADDR and RTE_MBUF_DATA_DMA_ADDR_DEFAULT
are defined in each PMD driver file. Convert macros to inline
functions and move them to common lib/librte_mbuf/rte_mbuf.h file.
PMD drivers include rte_mbuf.h file directly/indirectly hence no
additioanl header file inclusion is necessary.
Signed-off-by: Ravi Kerur <rkerur@gmail.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
On receive side, the burst size now floor aligns to RTE_IXGBE_DESCS_PER_LOOP
power of 2. According to this rule, the burst size less than 4 still won't
receive anything.
(Before this change, the burst size less than 32 can't receive anything.)
_recv_*_pkts_vec returns no more than 32(RTE_IXGBE_RXQ_REARM_THRESH) packets.
On transmit side, the max burst size no longer bind with a constant, however
it still requires to check the cross tx_rs_thresh violation.
There's no obvious performance drop found on both recv_pkts_vec
and recv_scattered_pkts_vec on burst size 32.
Signed-off-by: Cunming Liang <cunming.liang@intel.com>
Reviewed-by: Zoltan Kiss <zoltan.kiss@linaro.org>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
RTE_LIBRTE_IXGBE_RX_ALLOW_BULK_ALLOC config option is not really
necessary, as bulk alloc rx function can be used anyway, as long as the
necessary conditions are satisfied, which are checked already
in the library.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
The vector/SSE pmd used a different element type for the tx queue sw_ring
entries. This led to lots of typecasts in the code which required specific
use of bracketing, leading to subtle errors.
For example, in the original code:
txe = (struct ixgbe_tx_entry_v *)&txq->sw_ring[i];
instead needs to be written as:
txe = &((struct ixgbe_tx_entry_v *)txq->sw_ring)[i];
We can eliminate this problem, by having two software ring pointers in the
structure for the two different element types.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
The calculations of what mbufs were valid in the RX and TX queues were
incorrect when freeing the mbufs for the vector PMD. This led to crashes
due to invalid reference counts when mbuf debugging was turned on, and
possibly other more subtle problems (such as mbufs being freed when in use)
in other cases.
To fix this, the following changes were made:
* correct counts and post-loop values in the TX release function for the
vector code.
* create a new separate RX release function for the RX vector code, since the
tracking of what mbufs are valid or not is different for that code path
Fixes: c95584dc2b ("ixgbe: new vectorized functions for Rx/Tx")
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
The two fields for vector RX rearming in the rx queue structure were
incorrectly labelled. Switching the comments on each around makes things
clearer.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
The parameter tx_free_thresh is not consistent between the drivers:
some use it as rte_eth_tx_burst() requires, some release buffers when
the number of free descriptors drop below this value.
Let's use it as most fast-path code does, which is the latter, and update
comments throughout the code to reflect that.
Signed-off-by: Zoltan Kiss <zoltan.kiss@linaro.org>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
move ixgbe PMD to drivers/net directory.
As part of the move, we rename the ixgbe directory, containing the
ixgbe "base driver" code, from "ixgbe" to "base".
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
