Commit Graph

29 Commits

Author SHA1 Message Date
Yerden Zhumabekov
614289298d hash: slice CRC data into 8-byte pieces
Calculating hash for data of variable length is more efficient
when that data is sliced into 8-byte pieces. The rest part of data
is hashed using CRC32 functions with either 8 and 4 byte operands.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:30:05 +01:00
Yerden Zhumabekov
8bae1da2af hash: fallback to software CRC32 implementation
Initially, SSE4.2 support is detected via the constructor function.

Added rte_hash_crc_set_alg() function to detect and set CRC32
implementation if necessary. SSE4.2 is allowed by default.

rte_hash_crc_*byte() functions reworked so they choose available
CRC32 implementation in the runtime.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:24:05 +01:00
Yerden Zhumabekov
d2b989045f hash: add CRC function for 8 bytes
SSE4.2 provides CRC32 intrinsic with 8-byte operand.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:23:13 +01:00
Yerden Zhumabekov
e068294180 hash: replace built-in functions implementing SSE4.2
Give up using built-in intrinsics and use our own assembly
implementation. Remove #include entry as well.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:15:58 +01:00
Yerden Zhumabekov
00bf774bab hash: add assembly implementation of CRC32 intrinsics
Added:
- crc32c_sse42_u32() emits 'crc32l' asm instruction;
- crc32c_sse42_u64() emits 'crc32q' asm instruction;
- crc32c_sse42_u64_mimic(), wrapper in case of run on 32-bit platform.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:14:41 +01:00
Yerden Zhumabekov
d983cf4169 hash: add software CRC32 implementation
Add lookup tables for CRC32 algorithm, crc32c_1word() and
crc32c_2words() functions returning hash of 32-bit and 64-bit
operand.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:13:09 +01:00
Neil Horman
133b75923b mk: add library version extension
To differentiate libraries that break ABI, we add a library version number
suffix to the library, which must be incremented when a given libraries ABI is
broken.  This patch enforces that addition, sets the initial abi soname
extension to 1 for each library and creates a symlink to the base SONAME so that
the test applications will link properly.

Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-02-03 16:56:58 +01:00
Neil Horman
9d41beed24 lib: provide initial versioning
Add linker version script files to each DPDK library to put a stake in the
ground from which we can start cleaning up API's

Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-02-03 16:56:58 +01:00
Sergio Gonzalez Monroy
fdf20fa7be add prefix to cache line macros
CACHE_LINE_SIZE is a macro defined in machine/param.h in FreeBSD and
conflicts with DPDK macro version.
Adding RTE_ prefix to avoid conflicts.
CACHE_LINE_MASK and CACHE_LINE_ROUNDUP are also prefixed.

Signed-off-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
[Thomas: updated on HEAD, including PPC]
2014-11-27 16:21:11 +01:00
Anatoly Burakov
4542f89397 hash: make tailq fully local
Since the data structures such as rings are shared in their entirety,
those TAILQ pointers are shared as well. Meaning that, after a
successful rte_ring creation, the tailq_next pointer of the last
ring in the TAILQ will be updated with a pointer to a ring which may
not be present in the address space of another process (i.e. a ring
that may be host-local or guest-local, and not shared over IVSHMEM).
Any successive ring create/lookup on the other side of IVSHMEM will
result in trying to dereference an invalid pointer.

This patchset fixes this problem by creating a default tailq entry
that may be used by any data structure that chooses to use TAILQs.
This default TAILQ entry will consist of a tailq_next/tailq_prev
pointers, and an opaque pointer to arbitrary data. All TAILQ
pointers from data structures themselves will be removed and
replaced by those generic TAILQ entries, thus fixing the problem
of potentially exposing local address space to shared structures.

Technically, only rte_ring structure require modification, because
IVSHMEM is only using memzones (which aren't in TAILQs) and rings,
but for consistency's sake other TAILQ-based data structures were
adapted as well.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2014-07-22 19:42:23 +02:00
Stephen Hemminger
6f41fe75e2 eal: deprecate rte_snprintf
The function rte_snprintf serves no useful purpose. It is the
same as snprintf() for all valid inputs. Deprecate it and
replace all uses in current code.

Leave the tests for the deprecated function in place.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-06-27 02:31:24 +02:00
Bruce Richardson
3031749c2d remove trailing whitespaces
This commit removes trailing whitespace from lines in files. Almost all
files are affected, as the BSD license copyright header had trailing
whitespace on 4 lines in it [hence the number of files reporting 8 lines
changed in the diffstat].

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
[Thomas: remove spaces before tabs in libs]
[Thomas: remove more trailing spaces in non-C files]
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-06-11 00:29:34 +02:00
Stephen Hemminger
2d32fef70b hash: make arg for jhash2 const
The argument to rte_jhash2() is not changed.

Signed-off-by: Stephen Hemminger <shemming@brocade.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-03-24 18:58:25 +01:00
H. Peter Anvin
c4eedd9b53 hash: reverse the operand order to crc32
Checkin

a132a9cf2b hash: use intrinsic

changed the rte_hash_crc.h from using the crc32 instruction via inline
assembly to using an intrinsic.  The intrinsic should allow for better
compiler performance, but the change did not account for the fact that
the inline assembly being in AT&T syntax used the opposite operand
order of the intrinsic.

This turns out to not matter for correctness, because the CRC32
operation is commutative.  However, it could potentially matter for
performance, because the loop is more efficient with the moving
pointer in the source operand and the accumulation in the destination
operand.

This was discovered by Jan Beulich when looking at the equivalent code
in the Linux kernel.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Reported-by: Jan Beulich <jbeulich@suse.com>
Reported-by: Pashupati Kumar <kumarp@brocade.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-02-26 11:01:14 +01:00
Bruce Richardson
e9d48c0072 update Intel copyright years to 2014
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2014-02-25 21:29:14 +01:00
Intel
1c1d4d7a92 doc: whitespace changes in licenses
Signed-off-by: Intel
2013-10-09 14:51:55 +02:00
Intel
cbecb72292 hash: jhash optimisation
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
1a9f648be2 hash: fix for multi-process apps
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
b6df9fc871 update copyright date to 2013
Signed-off-by: Intel
2013-07-25 16:07:52 +02:00
Intel
916e4f4f4e memory: fix for multi process support
Signed-off-by: Intel
2013-07-25 15:23:27 +02:00
Intel
34258ce5db hash: fix check when creating fbk hash
Signed-off-by: Intel
2013-07-25 15:23:27 +02:00
Intel
51bc66d507 hash: allocate memory on right numa socket
Signed-off-by: Intel
2013-07-25 15:23:27 +02:00
Intel
1651e2166b hash: don't use memzone for allocations
Signed-off-by: Intel
2013-07-25 15:23:27 +02:00
Intel
de7212b822 hash: remove comments
Signed-off-by: Intel
2013-07-25 15:23:27 +02:00
Intel
a132a9cf2b hash: use intrinsic
Signed-off-by: Intel
2013-07-25 15:23:27 +02:00
Intel
18d5e8d78c hash: select default hash by looking at SSE flags
Signed-off-by: Intel
2013-07-25 15:23:27 +02:00
Intel
30a37273c1 lib: update tailq api
Signed-off-by: Intel
2013-07-25 15:01:57 +02:00
Intel
dada9ef6ed remove version in all files
Signed-off-by: Intel
2013-07-05 11:59:50 +02:00
Intel
af75078fec first public release
version 1.2.3

Signed-off-by: Intel
2013-03-11 17:19:20 +01:00