27 Commits

Author SHA1 Message Date
Adrien Mazarguil
0d440d081c lib: fix missing includes in exported headers
Many exported headers rely on definitions found in rte_config.h without
including it, as shown by the following command:

 grep -L '^#include <rte_config.h>' -- \
  $(grep -Rl \
    $(sed -n '/^#define \([^ ]\+\).*$/{s//\1/;H;};${x;s/\n//;s/\n/\\|/g;p;}' \
      build/include/rte_config.h) \
    -- build/include/)

We cannot assume external applications will include rte_config.h on their
own, neither directly nor through a -include parameter like DPDK does
internally.

This not only causes obvious compilation failures that can be reproduced
with check-includes.sh such as:

 [...]/rte_memory.h:88:43: error: ‘RTE_CACHE_LINE_SIZE’ was not declared in
     this scope
  #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
                                            ^

It also results in less visible issues, for instance rte_hash_crc.h relying
on RTE_ARCH_X86_64's presence to provide dedicated inline functions.

This patch partially reverts the commit below and adds missing include
lines to the remaining files.

Fixes: f1a7a5c5f404 ("remove include of generated config header")
Cc: stable@dpdk.org

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2018-01-17 00:31:05 +01:00
Bruce Richardson
369991d997 lib: use SPDX tag for Intel copyright files
Replace the BSD license header with the SPDX tag for files
with only an Intel copyright on them.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2018-01-04 22:41:39 +01:00
Thomas Monjalon
17715a5339 use macro to declare constructor functions
It is easier to find all constructor functions when they use
the same macros RTE_INIT or RTE_INIT_PRIO.

The macro definitions are moved from rte_eal.h to rte_common.h.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2017-11-06 21:56:07 +01:00
Bruce Richardson
4f4cd8717e hash: remove checks for SSE
Since SSE4 is now part of the minimum requirements for DPDK, we don't need
a fallback case to handle selection of algorithm when SSE4 is unavailable.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2017-07-04 14:35:41 +02:00
Ashwin Sekhar T K
fa50d3b27a hash: compile ARMv8 CRC32 support conditionally
Compile the armv8a CRC32 support only if the machine
has the CRC extensions i.e if RTE_MACHINE_CPUFLAG_CRC32
is defined.

Removed the .arch assembly directives as these are no
more necessary.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-07-03 22:27:42 +02:00
Ferruh Yigit
d2e0260445 hash: fix icc build
build error with icc version 17.0.4 (gcc version 7.0.0 compatibility):

In file included from .../dpdk/lib/librte_hash/rte_fbk_hash.h(59),
                 from .../dpdk/lib/librte_hash/rte_fbk_hash.c(54):
.../dpdk/x86_64-native-linuxapp-icc/include/rte_hash_crc.h(480):
 error #1292: unknown attribute "fallthrough"
                __attribute__ ((fallthrough));
                                ^

In file included from .../dpdk/lib/librte_hash/rte_fbk_hash.h(59),
                 from .../dpdk/lib/librte_hash/rte_fbk_hash.c(54):
.../dpdk/x86_64-native-linuxapp-icc/include/rte_hash_crc.h(486):
 error #1292: unknown attribute "fallthrough"
                __attribute__ ((fallthrough));
                                ^
This code patch hit when gcc > 7 installed and ICC doesn't recognize
fallthrough attribute.

Fixed by disabling code when compiled with ICC.

Fixes: 3dfb9facb055 ("lib: add switch fall-through comments")

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-06-14 22:54:54 +02:00
Bruce Richardson
3dfb9facb0 lib: add switch fall-through comments
With GCC 7 we need to explicitly document when we are falling through from
one switch case to another.

Fixes: af75078fece3 ("first public release")
Fixes: 8bae1da2afe0 ("hash: fallback to software CRC32 implementation")
Fixes: 9ec201f5d6e7 ("mbuf: provide bulk allocation")

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2017-05-05 18:36:55 +02:00
Didier Pallard
9792848c65 hash: fix CRC32c computation
Fix crc32c hash functions to return a valid crc32c value for
data lengths not multiple of 4 bytes.
ARM code is not tested.

Fixes: af75078fece3 ("first public release")

Signed-off-by: Didier Pallard <didier.pallard@6wind.com>
Acked-by: David Marchand <david.marchand@6wind.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-03-01 14:37:26 +01:00
Jerin Jacob
da8dcc27f6 hash: use armv8-a CRC32 instructions
armv8-a has optional CRC32 extension, march=armv8-a+crc enables code
generation for the ARMv8-A architecture together with
the optional CRC32 extensions.

added RTE_MACHINE_CPUFLAG_CRC32 to detect the availability of
CRC32  extension in compile time. At run-time, The RTE_CPUFLAG_CRC32
can be used to find the availability.

armv8-a+crc target support added in GCC 4.9,
Used inline assembly and emulated __ARM_FEATURE_CRC32 to work
with tool-chain < 4.9

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2015-11-25 22:13:15 +01:00
Cyril Chemparathy
67ea75ffc6 hash: check SSE flags only on x86 builds
This is necessary because the required CPU flags may not be defined on
other architectures.

Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-07-13 16:15:46 +02:00
Yerden Zhumabekov
504a29af13 hash: fix strict-aliasing for CRC
Fix rte_hash_crc() function by making use of uintptr_t variable
to hold a pointer to data being hashed. In this way, casting uint64_t
pointer to uint32_t avoided.

Fixes: 614289298daf ("hash: slice CRC data into 8-byte pieces")

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2015-03-26 22:27:51 +01:00
Michael Qiu
42a0325632 hash: fix crc32 error when built for i686 and run in x86_64
When compile target i686 in platform x86_64, the stub function will
be called, and return zero.

Fixes: 12fa4a00788d ("hash: fix unsupported crc instruction in i686 platform")

Signed-off-by: Michael Qiu <michael.qiu@intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2015-03-23 11:53:17 +01:00
Michael Qiu
12fa4a0078 hash: fix unsupported crc instruction in i686 platform
Error: unsupported instruction `crc32'

The root cause is that i686 platform does not support 'crc32q'
Need make it only available in x86_64 platform.

Signed-off-by: Michael Qiu <michael.qiu@intel.com>
Acked-by: Yerden Zhumabekov <yerden.zhumabekov@sts.kz>
2015-03-09 18:07:43 +01:00
Yerden Zhumabekov
614289298d hash: slice CRC data into 8-byte pieces
Calculating hash for data of variable length is more efficient
when that data is sliced into 8-byte pieces. The rest part of data
is hashed using CRC32 functions with either 8 and 4 byte operands.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:30:05 +01:00
Yerden Zhumabekov
8bae1da2af hash: fallback to software CRC32 implementation
Initially, SSE4.2 support is detected via the constructor function.

Added rte_hash_crc_set_alg() function to detect and set CRC32
implementation if necessary. SSE4.2 is allowed by default.

rte_hash_crc_*byte() functions reworked so they choose available
CRC32 implementation in the runtime.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:24:05 +01:00
Yerden Zhumabekov
d2b989045f hash: add CRC function for 8 bytes
SSE4.2 provides CRC32 intrinsic with 8-byte operand.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:23:13 +01:00
Yerden Zhumabekov
e068294180 hash: replace built-in functions implementing SSE4.2
Give up using built-in intrinsics and use our own assembly
implementation. Remove #include entry as well.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:15:58 +01:00
Yerden Zhumabekov
00bf774bab hash: add assembly implementation of CRC32 intrinsics
Added:
- crc32c_sse42_u32() emits 'crc32l' asm instruction;
- crc32c_sse42_u64() emits 'crc32q' asm instruction;
- crc32c_sse42_u64_mimic(), wrapper in case of run on 32-bit platform.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:14:41 +01:00
Yerden Zhumabekov
d983cf4169 hash: add software CRC32 implementation
Add lookup tables for CRC32 algorithm, crc32c_1word() and
crc32c_2words() functions returning hash of 32-bit and 64-bit
operand.

Signed-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2015-02-23 18:13:09 +01:00
Bruce Richardson
3031749c2d remove trailing whitespaces
This commit removes trailing whitespace from lines in files. Almost all
files are affected, as the BSD license copyright header had trailing
whitespace on 4 lines in it [hence the number of files reporting 8 lines
changed in the diffstat].

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
[Thomas: remove spaces before tabs in libs]
[Thomas: remove more trailing spaces in non-C files]
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-06-11 00:29:34 +02:00
H. Peter Anvin
c4eedd9b53 hash: reverse the operand order to crc32
Checkin

a132a9cf2bcd440a974b9d3f5c44ba30b2c895a1 hash: use intrinsic

changed the rte_hash_crc.h from using the crc32 instruction via inline
assembly to using an intrinsic.  The intrinsic should allow for better
compiler performance, but the change did not account for the fact that
the inline assembly being in AT&T syntax used the opposite operand
order of the intrinsic.

This turns out to not matter for correctness, because the CRC32
operation is commutative.  However, it could potentially matter for
performance, because the loop is more efficient with the moving
pointer in the source operand and the accumulation in the destination
operand.

This was discovered by Jan Beulich when looking at the equivalent code
in the Linux kernel.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Reported-by: Jan Beulich <jbeulich@suse.com>
Reported-by: Pashupati Kumar <kumarp@brocade.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-02-26 11:01:14 +01:00
Bruce Richardson
e9d48c0072 update Intel copyright years to 2014
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2014-02-25 21:29:14 +01:00
Intel
1c1d4d7a92 doc: whitespace changes in licenses
Signed-off-by: Intel
2013-10-09 14:51:55 +02:00
Intel
b6df9fc871 update copyright date to 2013
Signed-off-by: Intel
2013-07-25 16:07:52 +02:00
Intel
a132a9cf2b hash: use intrinsic
Signed-off-by: Intel
2013-07-25 15:23:27 +02:00
Intel
dada9ef6ed remove version in all files
Signed-off-by: Intel
2013-07-05 11:59:50 +02:00
Intel
af75078fec first public release
version 1.2.3

Signed-off-by: Intel
2013-03-11 17:19:20 +01:00