Commit Graph

162 Commits

Author SHA1 Message Date
Ankur Dwivedi
357439ad09 net/octeontx2: fix buffer size assignment
The elt_size field in mempool holds the size of one packet buffer.
It can be used to set the lpm_sizem1 field in rq context.

The lpb_sizem1 field in rq context is 12 bit, direct assignment
to it was causing overflow of value. Because of this errors
were observed while trying inline inbound with large packets.
This patch resolves the errors.

Fixes: 094fc8a3a1 ("net/octeontx2: add Rx queue setup and release")
Cc: stable@dpdk.org

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Reviewed-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2020-05-21 15:53:14 +02:00
Pavan Nikhilesh
31246a328f mempool/octeontx2: add devargs to lock context in cache
Add device arguments to lock NPA aura and pool contexts in NDC cache.
The device args take hexadecimal bitmask where each bit represent the
corresponding aura/pool id.
Example:
	-w 0002:02:00.0,npa_lock_mask=0xf // Lock first 4 aura/pool ctx

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-05-19 18:28:58 +02:00
Tejasree Kondoj
120d13db35 net/octeontx2: update max packet length for inline IPsec
Update max packet length supported by Inline IPsec Rx to
NIX_MAX_FRS

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
2020-05-17 16:10:44 +02:00
Sunil Kumar Kori
241546237c net/octeontx2: fix minimum length to SMQ config
NIX exposes NIX_AF_SMQ(0..511)_CFG to configure minimum length
of the packet which is being used for zero padding if packet is
less than configured value.

Setting it to default minimum length i.e. 60 bytes.

Fixes: ec8ddd4fb1 ("net/octeontx2: restructure TM helper functions")

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-05-11 22:27:39 +02:00
Nithin Dabilpuram
542714cc4b net/octeontx2: update red algo for shaper dynamic update
Due to an errata red algo needs to be set to discard instead of stall
for 96XX C0 silicon for two rate shaping. This workaround is being
already handled for newly created hierarchy but not for dynamic
shaper update cases. This patch hence applies the workaround
even when for shaper dynamic update.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2020-05-05 15:54:26 +02:00
Amit Gupta
c600b523c0 net/octeontx2: fix bad L4 checksum detection
On detecting outer L4 checksum as bad, both outer and
inner checksums are marked as bad. No need to explicitly
check inner L4 checksum in this case.

Outer L4 UDP checksum error => PKT_RX_OUTER_L4_CKSUM_BAD
and PKT_RX_L4_CKSUM_BAD

Inner L4 UDP checksum error => PKT_RX_L4_CKSUM_BAD

Fixes: 41fe7a3a11 ("net/octeontx2: offload bad L2/L3/L4 UDP lengths detection")

Signed-off-by: Amit Gupta <agupta3@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-05-05 15:54:26 +02:00
Nithin Dabilpuram
c3d30e9d75 net/octeontx2: disable unnecessary error interrupts
Disable CQ_DISABLED error interrupt in NIX_LF_ERR_INT
to fix spurious interrupts in event dev mode. Also skip
configuring RSS when RQ count is '0' because
RSS table initialization is done incorrectly due to
divide-by-zero error and it is leading to RQ_OOR error
in NIX_LF_ERR_INT.

Fixes: 83ce2880e2 ("net/octeontx2: support RSS")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:07 +02:00
Satheesh Paul
0342232aa4 net/octeontx2: support custom L2 header
This patch adds SDP packet parsing support with custom L2 header,
adds support to include a field from custom header for flow tag
generation.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Pavan Nikhilesh
b372fff7d4 net/octeontx2: fix device configuration sequence
When an application invokes rte_eth_dev_configure consecutively without
setting up Rx/Tx queues, it will incorrectly return error while trying
to restore Rx/Tx queue configuration.

Fix configuration sequence by checking if any Rx/Tx queues are
previously configured before trying to restore them.

Fixes: 548b5839a3 ("net/octeontx2: add device configure operation")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Krzysztof Kanas
3912fbde15 net/octeontx2: add TM capability
Add Traffic Management capability callbacks to provide
global, level and node capabilities. This patch also
adds documentation on Traffic Management Support.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Krzysztof Kanas
a3147ae9af net/octeontx2: add Tx queue rate limit
Add Tx queue ratelimiting support. This support is mutually
exclusive with TM support i.e when TM is configured, tx queue
ratelimiting config is no more valid.

Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
c3f733efd4 net/octeontx2: support TM debug
Add debug support to TM to dump configured topology
and registers. Also enable debug dump when sq flush fails.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
89d08a1ff8 net/octeontx2: add TM dynamic topology update
Add dynamic parent and shaper update callbacks that
can be used to change RR Quantum or PIR/CIR rate dynamically
post hierarchy commit. Dynamic parent update callback only
supports updating RR quantum of a given child with respect to
its parent. There is no support yet to change priority or parent
itself.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
1e25d57fae net/octeontx2: add TM stats and shaper profile
Add TM support for stats read and private shaper
profile addition or deletion.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
6ea54725f7 net/octeontx2: add TM hierarchy commit
Add TM hierarchy commit callback to support enabling
newly created topology.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2020-04-21 13:57:06 +02:00
Krzysztof Kanas
9e17ffb84b net/octeontx2: add TM node suspend/resume
Add TM support to suspend and resume nodes post hierarchy
commit.

Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
2746e76b2a net/octeontx2: support TM node add/delete
Adds support to Traffic Management callbacks "node_add"
and "node_delete". These callbacks doesn't support
dynamic node addition or deletion post hierarchy commit.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
43f3f05fb6 net/octeontx2: support dynamic topology update
Modify resource allocation and freeing logic to support
dynamic topology commit while to traffic is flowing.
This patch also modifies SQ flush to timeout based on minimum shaper
rate configured. SQ flush is further split to pre/post
functions to adhere to HW spec of 96XX C0.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
ec8ddd4fb1 net/octeontx2: restructure TM helper functions
Restructure traffic manager helper function by splitting to
multiple sets of register configurations like shaping, scheduling
and topology config.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
1e8d75d805 net/octeontx2: setup link config based on BP level
Configure NIX_AF_TL3_TL2X_LINKX_CFG using schq at
level based on NIX_AF_PSE_CHANNEL_LEVEL[BP_LEVEL].

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2020-04-21 13:57:06 +02:00
Harman Kalra
c07fbbace8 net/octeontx2: support configuring link attributes
Adding support to configure link attributes like speed,
duplex, negotiation.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Vamsi Attunuru
fdbdf2721c net/octeontx2: enable error and RAS interrupt in configure
Patch adds routines to set/clear nix lf error & ras interrupt enable
registers. These nix lf error interrupts get triggered if there are
any failures during nix lf configuration. This interrupts are enabled
before any hardware configurations initiated on the allocated nix lf.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Andrzej Ostruszka <aostruszka@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Kiran Kumar K
41fe7a3a11 net/octeontx2: offload bad L2/L3/L4 UDP lengths detection
Octeontx2 HW has support for detecting the bad L2/L3/L4 UDP lengths.
Since DPDK does not have specific error flag for this, exposing it
as bad checksum failure in mbuff:ol_flags to leverage this feature.

These errors will be propagated to the ol_flags as follows.

L2 length error ==> (PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD).
Both Outer and Inner L3 length error ==> PKT_RX_IP_CKSUM_BAD.
Outer L4 UDP length/port error ==> PKT_RX_OUTER_L4_CKSUM_BAD.
Inner L4 UDP length/port error ==> PKT_RX_L4_CKSUM_BAD.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Thomas Monjalon
e3866e7355 replace hot attributes
The new macro __rte_hot, for compiler hinting,
is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Ashish Gupta
7b1b040791 net/octeontx2: fix link information for loopback port
Loopback devices are exposed as ethdev device in octeontx2.
This patch fixes the link information for loopback ports.

Fixes: 38f566280a ("net/octeontx2: add link stats operations")
Cc: stable@dpdk.org

Signed-off-by: Ashish Gupta <ashishg@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-03-18 10:21:41 +01:00
Vamsi Attunuru
29bb974576 net/octeontx2: fix flow control initial state
Currently when application requests for RTE_FC_NONE earlier
than PMD's internal fc mode update, flow control set routine
is returning without updating the flow control state.

Patch updates the PMD's internal fc mode details during
dev_configure to ensure any flow control set requests
issued later are handled properly.

Fixes: 609945f1ce ("net/octeontx2: support flow control")
Cc: stable@dpdk.org

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-15 10:23:07 +01:00
Bruce Richardson
f2b700a328 net/octeontx2: check compiler flag before use
Rather than assuming all compilers support the -flax-vector-extensions
flag, we should test this before using it, thereby potentially avoiding
warnings.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-06 09:10:00 +01:00
Vamsi Attunuru
fb9f56f3e3 net/octeontx2: sync inline tag type
Tag type configuration for the inline processed packets is set during
ethdev configuration, it might conflict with tag type configuration
done during Rx adapter configuration which would be setup later.

This conflict is fixed as part of flow rule creation by updating
tag type config of inline same as Rx adapter configured tag type.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Ankur Dwivedi
41a18d8b96 net/octeontx2: add inline IPsec Tx
Adding pre-processing required for inline IPsec outbound packets.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Archana Muniganti
77791f626f net/octeontx2: add security in Tx
Added new flag for SECURITY in compiler optimized Tx fastpath
framework. With this, compiler autogenerates functions which
have security enabled.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2020-02-05 15:20:51 +01:00
Archana Muniganti
4483e81439 net/octeontx2: add security in Rx
Added new flag for SECURITY in Rx compiler optimized fastpath
framework. With this, compiler autogenerates functions which
have security enabled.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Tejasree Kondoj
551712a4d5 net/octeontx2: add inline IPsec Rx
Adding post-processing required for inline IPsec inbound packets.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Archana Muniganti
d7fa8f2a8f net/octeontx2: add lookup mem changes to hold SA indices
lookup_mem provides fast accessing of data path fields.
Storing sa indices in lookup_mem which are required in
inline rx data path.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Ankur Dwivedi
b33b5c6f20 net/octeontx2: add datapath ops in security context
Adding data path ops in eth security ctx.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Anoob Joseph
f44e716377 net/octeontx2: add security session operations
Adding security session operations in eth security ctx.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Anoob Joseph
3fe4d07d16 crypto/octeontx2: enable CPT to share QP with ethdev
Adding the infrastructure to save one opaque pointer in idev and
implement the consumer-producer in the PMDs which uses it accordingly.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Ankur Dwivedi
bb810fd64d net/octeontx2: add security capabilities
Adding security capabilities supported by the eth PMD.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Tejasree Kondoj
58002ff3d5 net/octeontx2: add security in configure
Adding security in eth device configure.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Anoob Joseph
6611e12a8a net/octeontx2: create security context
Adding security ctx to the eth device.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Kiran Kumar K
184a323573 net/octeontx2: fix Tx flow control for HIGIG
Tx flow controlled is disabled in the Ax silicon version due to an errata.
This errata is not applicable for HIGIG Tx flow control, therefore
not enabling in HIGIG case.

Fixes: 602009ee2d ("net/octeontx2: support HIGIG2")
Cc: stable@dpdk.org

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-05 09:51:21 +01:00
Jerin Jacob
b4bf22d173 net/octeontx2: change default RSS hash calculation
Before C0 HW revision, The RSS adder was computed based the following
static formula.

rss_adder<7:0> = flow_tag<7:0> ^ flow_tag<15:8> ^
flow_tag<23:16> ^ flow_tag<31:24>

The above scheme has the following drawbacks:
1) It is not in line with other standard NIC behavior.
2) There can be an SW use case where SW can compute the hash
upfront using Toeplitz function and predict the queue selection
to optimize some packet lookup function. The nonstandard
way of doing XOR makes the consumer to not predict the queue selection.

C0 HW revision onward, The HW can configure the
rss_adder<7:0> as flow_tag<7:0> to align with standard NICs.

This patch adds an option to select legacy RSS adder mode
using tag_as_xor=1 devargs option while keeping the standard NIC
behavior as default.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2020-02-05 09:51:21 +01:00
Kiran Kumar K
d9683b9650 net/octeontx2: disable HIGIG on port stop
If HIGIG mode is enabled on configure, This needs to be disabled
on port stop. Adding support to send mbox message on port stop
to configure the port to default.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-05 09:51:20 +01:00
Kiran Kumar K
919d01d330 net/octeontx2: extend RSS supported offload types
Extend RSS offload types for octeontx2. Add support to select
L3 SRC, L3 DST, L4 SRC and L4 DST for RSS calculation.

Add support to select L3 SRC or DST only, L4 SRC or DST only for RSS
calculation.

With this requirement there will be following combinations,
IPV[4,6]_SRC_ONLY, IPV[4,6]_DST_ONLY, [TCP,UDP,SCTP]_SRC_ONLY,
[TCP,UDP,SCTP]_DST_ONLY. So, instead of creating a bit for each
combination, we are using upper 4 bits (31:28) in the flow_key_cfg
to represent the SRC, DST selection. 31 => L3_SRC, 30 => L3_DST,
29 => L4_SRC, 28 => L4_DST. These won't be part of flow_cfg, so that
we don't need to change the existing ABI.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-05 09:51:20 +01:00
Jerin Jacob
8f196dc897 drivers/net: use structure marker from EAL
Use new marker typedef available in EAL.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-20 21:17:35 +01:00
Kiran Kumar K
8dc4ff37fe net/octeontx2: fix PTP and HIGIG2 coexistence
octeontx2 PMD does not support both PTP and HIGIG2 together.
Added a check to enforce this and updated the Rx offload capabilities when
Higig2 mode enabled.

Fixes: 602009ee2d ("net/octeontx2: support HIGIG2")
Cc: stable@dpdk.org

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-01-17 19:46:26 +01:00
Nithin Dabilpuram
89fc6763b1 common/octeontx2: support C0 silicon version
Avoid using PCI subsystem device id for SoC revision
identification and just use PCI revision id to support C0 silicon.
This patch also reduces SQB threshold to 70% to have
sufficient buffer before we overflow SQ.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-01-17 19:46:26 +01:00
Pavan Nikhilesh
04952bac8c net/octeontx2: improve vector Tx performance
Use scalar loads instead of vector loads for fields
that don't need any vector operations.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-01-17 19:46:26 +01:00
Vamsi Attunuru
14766d6920 net/octeontx2: allow vector processing packets not by 4
Current vector mode implementation floor-aligns pkt count
with NIX_DESCS_PER_LOOP and process that many packets.

Patch addresses the case where pkt count modulo NIX_DESCS_PER_LOOP
is non-zero, after the vector mode processing, scalar routine is
used to process if there are any leftover packets. Scalar routine
is also used when descriptor head is about to wrap and turn out to
be unaligned.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-01-17 19:46:26 +01:00
Harman Kalra
348123a3df net/octeontx2: fix getting supported packet types
Setting up supported ptypes using testpmd command is failing
because supported_ptypes_get callback will never return ptypes
supported, as NIX_RX_OFFLOAD_PTYPE_F bit in rx_offload_flags
is zero by default in testpmd.

Fixes: d2706e15e6 ("net/octeontx2: support reduced set of packet types")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-01-17 19:46:02 +01:00
Jerin Jacob
e73f6d871c net/octeontx2: improve performance in vector Rx
Use scalar loads instead of vector loads for fields
that don't need any vector operations.

Signed-off-by: Andrew Pinski <apinski@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2020-01-17 19:46:02 +01:00