Driver uses the Firmware mailbox to read statistics and configure
some features.
This patch introduces a mutex to provide consistent access to the
FW mailbox to prevent potential data corruption.
Fixes: 86d36773bd ("net/atlantic: implement firmware operations")
Cc: stable@dpdk.org
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Add 'rte_' prefix to structures:
- rename struct ether_addr as struct rte_ether_addr.
- rename struct ether_hdr as struct rte_ether_hdr.
- rename struct vlan_hdr as struct rte_vlan_hdr.
- rename struct vxlan_hdr as struct rte_vxlan_hdr.
- rename struct vxlan_gpe_hdr as struct rte_vxlan_gpe_hdr.
Do not update the command line library to avoid adding a dependency to
librte_net.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Found by Coverity scan, two pointer args should be not zero checked
Coverity issue: 337929
Fixes: 2f40244b39 ("net/atlantic: implement MACsec firmware interface")
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Its better to use capability bits FW provides to detect whether
firmware has APIs for EEPROM access.
Before that explicit FW version comparison was used and that may
cause conflicts.
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Driver should track negotiated PHY flow control settings during
link state changes and update MAC level flow control configuration.
Otherwise there could be unexpected pause frames generation which
could lockup the datapath.
Fixes: 4c1c8f7646 ("net/atlantic: add flow control configuration")
Cc: stable@dpdk.org
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
EEPROM write accesses start using non zero configuration memory
accesses. This revealed an issue where firmware interface was actually
always did the uploads starting with zero offset
Fixes: 86d36773bd ("net/atlantic: implement firmware operations")
Cc: stable@dpdk.org
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
EEPROM get/set offset logic should take offset into account.
Data transfers to/from FW should also correctly use
dword based transfer interface, taking into account the
remainder.
We also check error code returned from FW.
Fixes: ce4e8d4180 ("net/atlantic: implement EEPROM get/set")
Cc: stable@dpdk.org
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Make indentation correct. No functional impact.
Fixes: f73061d53b ("net/atlantic: use EEPROM magic as a device address")
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Broadcast was not correctly and fully initialized
Fixes: 7906661eda ("net/atlantic: add b0 hardware layer")
Cc: stable@dpdk.org
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Implementation of firmware interface for MACsec configuration.
Structure with config data is written into FW memory, then we trigger
FW to execute the request and wait for result.
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Here we define hardware and software configuration structures
for MACsec interface. MACSEC itself is implemented in Phy module,
but its configuration is done via firmware interface
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Default dev addr is replaced with magic field from the request.
Length is allowed to be less than maximum.
SMBUS access bit definitions also better organised now.
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Found by Coverity scan. This is a real memory corruption.
There is no need in extra RTE_ALIGN macros since the
request/result structures are 4-byte aligned by definition.
Coverity issue: 323518, 323520
Fixes: ce4e8d4180 ("net/atlantic: implement EEPROM get/set")
Cc: stable@dpdk.org
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Found by Coverity scan. Checks are useless
because at these code places err is always zero.
Fixes: 86d36773bd ("net/atlantic: implement firmware operations")
Cc: stable@dpdk.org
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
This is hw_atl logic layer derived from linux atlantic
driver. It contains RX/TX hardware initialization
sequences, various hw configuration.
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
AQC NICs comes in fields with two major
FW generations: 1x and 3x.
This is part of linux atlantic driver shared code,
responsible for internal NIC firmware interactions,
including link management ops, FW initialization,
various lifecycle features.
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
This patch introduces hw_atl layer which is maintained
in sync with linux kernel driver.
It will generally be in sync with linux upstream.
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
