- Translate Truflow action types for Thor to HCAPI RM
resource defined SRAM banks.
- move module type enum definitions to tf_core API
- Switch to subtype concept for RM.
- alloc/free working for Thor SRAM table type for full AR.
Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
- Implement TCAM get in host
- Add Thor support for TCAM set/free
Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Main TF changes to support EM insert with FKB.
Flexible Key builder is required to create Wild Card
and Exact Match keys for TCAM lookups.
Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
- Remove unused tables from tf_tbl_type
- Encode flow type into flow handle (internal or external)
- Clean up Whitney resource tables
- Clean up Truflow CLI open tables and update Thor resources
- Add Thor SRAM and external pool types to core API
- Remove unneeded Stingray table reference
Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Jay Ding <jay.ding@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
- Allow tf_open to continue if no resource is allocated
for some table type.
- Close the session if binding fails for any table.
- Close the session if no resource is allocated for all tables.
Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Add get mailbox dev op so that mailbox offset is based on device
instead of a hard coded value.
Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Add infrastructure code to support TRUFLOW on Thor NICs.
Also update meson.build
Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Before introducing more HCAPI components to DPDK, the CFA code needs
to be organized into a dedicated folder so it is separated from
other new HCAPI components
Signed-off-by: Jeffrey Huang <jeffrey.huang@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Currently, ACPI and PSTATE modes have lots of code duplication,
confusing logic, and a bunch of other issues that can, and have, led to
various bugs and resource leaks.
This commit factors out the common parts of sysfs reading/writing for
ACPI and PSTATE drivers.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: David Hunt <david.hunt@intel.com>
Currently, ACPI code uses rte_power_info as the struct name, which
gives the appearance that this is an externally visible API. Fix to
use internal namespace.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
Currently, if dev_configure is not called or fails to be called, users
can still call dev_start successfully. So it is necessary to have a flag
which indicates whether the device is configured, to control whether
dev_start can be called and eliminate dependency on user invocation order.
The flag stored in "struct rte_eth_dev_data" is more reasonable than
"enum rte_eth_dev_state". "enum rte_eth_dev_state" is private to the
primary and secondary processes, and can be independently controlled.
However, the secondary process does not make resource allocations and
does not call dev_configure(). These are done by the primary process
and can be obtained or used by the secondary process. So this patch
adds a "dev_configured" flag in "rte_eth_dev_data", like "dev_started".
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
libabigail raised a warning on this change.
This change is fine wrt ABI as far as we understand, but we can't
express an exception rule (see libabigail bug #28060) to waive the
changes only in this part of the rte_eth_dev_data struct.
The solution for now is to globally waive any change on the
rte_eth_dev_data structure.
Signed-off-by: David Marchand <david.marchand@redhat.com>
When calling rte_eal_cleanup, the mp channel cleanup routine only sets
mp_fd to -1 leaving the rte_mp_handle control thread running.
This control thread can spew warnings on reading on an invalid fd.
This is especially noticed with ASAN enabled.
To handle this situation, set mp_fd to -1 to signal the control thread
it should exit, but since this thread might be sleeping on the socket,
cancel the thread too.
Fixes: 85d6815fa6 ("eal: close multi-process socket during cleanup")
Cc: stable@dpdk.org
Reported-by: Owen Hilyard <ohilyard@iol.unh.edu>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Feature flags in dev would be updated during config. On reconfigure, the
field need to be set again to original value.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
This patch fix the input arguments assignment to the correct
parameters in mrvl_pmd_init_params struct.
Fixes: 25b05a1c80 ("crypto/mvsam: parse max number of sessions")
Cc: stable@dpdk.org
Signed-off-by: Dana Vardi <danat@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Till now comments explain queue mapping per
one and two crypto devices.
Now added comments for queue mapping for three
crypto devices supported in CN9132.
Signed-off-by: Michael Shamis <michaelsh@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
This patch fix wrong clear memory session pointer.
When call mrvl_crypto_pmd_sym_session_clear function,
it might cause the following error:
CRYPTODEV: set_sym_session_private_data() line 497:
Set private data for driver 1 not allowed
This fix set zeroes to mrvl_crypto_session pointer instead to
rte_cryptodev_sym_session pointer, and will verify that
rte_cryptodev_sym_session pointer will not lose data such as
nb_drivers.
Bugzilla ID: 646
Fixes: 8a61c83af2 ("crypto/mrvl: add mrvl crypto driver")
Cc: stable@dpdk.org
Signed-off-by: Dana Vardi <danat@marvell.com>
Reviewed-by: Michael Shamis <michaelsh@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Increased AAD max size up to 64B and allowed AAD increment step
1B according to EIP197 token HW limitation.
In addition, some capabilities were found incorrect due to
running FIPS tests. The patch fix the capabilities.
Fixes: 8a61c83af2 ("crypto/mrvl: add mrvl crypto driver")
Fixes: 2c22aa4f8f ("crypto/mvsam: update hash digest sizes")
Fixes: a84226fc05 ("crypto/mvsam: support HMAC SHA224")
Cc: stable@dpdk.org
Signed-off-by: Michael Shamis <michaelsh@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Tested-by: Liron Himi <lironh@marvell.com>
For AEAD session and AES-GCM mode, IV offset will
set to include the Nonce.
In addition, the following operations order will define:
first encryption and then authentication.
Fixes: 8a61c83af2 ("crypto/mrvl: add mrvl crypto driver")
Cc: stable@dpdk.org
Signed-off-by: Dana Vardi <danat@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Tested-by: Liron Himi <lironh@marvell.com>
Replaces the use of local ARRAY_SIZE macro, which is not used
anywhere else, with the formal RTE_DIM macro for better
consistency in crypto unit test.
Signed-off-by: Rebecca Troy <rebecca.troy@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Fixed typo in the crypto unit test ESN function name by
replacing the word 'encryt' with the correct word 'encrypt'.
test_authenticated_encryt_with_esn is now called
test_authenticated_encrypt_with_esn.
Fixes: 699741912d ("test/crypto: add case for auth only trailer")
Cc: stable@dpdk.org
Signed-off-by: Rebecca Troy <rebecca.troy@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Fixed typo in the testcase description for AES in the crypto
unit test suite by changing the word 'Scater' to 'Scatter'.
Fixes: c9c9c4ed87 ("app/test: check scatter-gather for crypto drivers")
Cc: stable@dpdk.org
Signed-off-by: Rebecca Troy <rebecca.troy@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Modifies the scheduler tests in the crypto unit test suite
to replace the usage of the word 'slave' with the more
appropriate word 'worker'.
The scheduler test functions were modified as follows:
test_scheduler_attach_slave_op is now called
test_scheduler_attach_worker_op,
test_scheduler_detach_slave_op is
test_scheduler_detach_worker_op.
Signed-off-by: Rebecca Troy <rebecca.troy@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
This patch fixes the aesni_gcm performance issue on systems with AVX512
CPU flag presented but with VAES CPU flag missing, such as Skylake.
Fixes: 81fe96a0ce ("crypto/aesni_gcm: use architecture independent API")
Cc: stable@dpdk.org
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Added support for crypto adapter OP_FORWARD mode.
As OcteonTx CPT crypto completions could be out of order, each crypto op
is enqueued to CPT, dequeued from CPT and enqueued to SSO one-by-one.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
This patch updates the dependency requirement information
for aesni-gcm, aesni-mb, snow3g, zuc, and kasumi PMDs. Previously
building these PMDs with Make will fail when the system is
installed intel-ipsec-mb library version 1.0 or newer.
Since Make build system is deprecated already, instead of fixing
the issue the documentation is updated to state it.
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Add checks to catch overflow of any offsets. Offset control word
specifies,
1. 16 bits encryption offset
2. 8 bits IV offset
3. 8 bits auth offset
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Use m only after it was checked not to be NULL.
Fixes: 202d375c60 ("app/test: add cryptodev unit and performance tests")
Cc: stable@dpdk.org
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Add missing rte_mbuf size in mempool allocation for
out-of-place operation.
Fixes: bf9d6702ec ("app/crypto-perf: use single mempool")
Cc: stable@dpdk.org
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
In Arm platform, when "RTE_ARCH_ARM64_MEMCPY" is set as true, gcc will
report variable uninitialized warning:
../drivers/crypto/qat/qat_sym_session.c: In function ‘partial_hash_compute’:
../lib/eal/include/generic/rte_byteorder.h:241:24: warning:
‘<U35a0>’ may be used uninitialized in this function
[-Wmaybe-uninitialized]
241 | #define rte_bswap32(x) __builtin_bswap32(x)
...
This is because "digest" will be initialized by "rte_memcpy" function
rather than "memcpy" if "RTE_ARCH_ARM64_MEMCPY" is set as true.
Furthermore, 'rte_memcpy' will initialize 'digest' with two steps
by invoking rte_mov_x functions. For example:
partial_hash_sha1 -> rte_memcpy -> rte_memcpy_ge16_lt_128 ->
step 1: rte_mov16(dst,src )
step 2: rte_mov16(dst - 16 + n, src - 16 + n)
However, gcc compiler cannot identify this multi-step initialization,
then it will report warning.
To fix this, use "memset" to initialize "digest".
Fixes: cd7fc8a84b ("eal/arm64: optimize memcpy")
Cc: stable@dpdk.org
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
When used with crypto adapter, metabuf pool would be shared across
cores. Account for the same in pool size.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
When used with crypto adapter, metabuf pool would be shared across
cores. Account for the same in pool size.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Registered cn9k and cn10k for asymmetric crypto
autotest. Documentation and release notes are also
updated.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Add asymmetric crypto capabilities supported
by cn9k and cn10k PMDs. Documentation is also
updated for the same.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Add asymmetric crypto session ops for both cn9k
and cn10k PMD.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Add support for digest support for various algorithms.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
