Intel
90b2eeb80a
ixgbe: use DD bit to count RX available descriptors
...
Signed-off-by: Intel
2013-09-17 14:16:10 +02:00
Intel
0f6b7c7f7a
igb: use DD bit to count RX available descriptors
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Signed-off-by: Intel
2013-09-17 14:16:10 +02:00
Intel
c25e53e079
ethdev: fix doxygen comment for rte_eth_rx_queue_count
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Signed-off-by: Intel
2013-09-17 14:16:10 +02:00
Intel
9dc8cd6ef7
pci: check driver probe return code
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Signed-off-by: Intel
2013-09-17 14:16:10 +02:00
Intel
096ff2e82d
mem: rework huge page mapping for secondary process
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Signed-off-by: Intel
2013-09-17 14:16:10 +02:00
Intel
835c5409a7
sched: only support TC 3 oversubscription
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Signed-off-by: Intel
2013-09-17 14:16:10 +02:00
Intel
a91c3cadb8
sched: add mtu parameter
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Signed-off-by: Intel
2013-09-17 14:16:10 +02:00
Intel
602c9ca33a
sched: bitmap is now dynamically allocated
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Signed-off-by: Intel
2013-09-17 14:16:10 +02:00
Intel
03f6bced5b
eal: use intrinsic function
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Signed-off-by: Intel
2013-09-17 14:16:09 +02:00
Intel
8b7efc04a0
update version to 1.4.0
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Signed-off-by: Intel
2013-09-17 14:16:09 +02:00
Intel
cc8f4d020c
examples/ip_reassembly: initial import
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Signed-off-by: Intel
2013-09-17 14:16:09 +02:00
Intel
301d75046c
kni: disable ETHTOOL_GRXRINGS
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
630ca10798
kni: fix build with kernel 3.8
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- timecompare (used for hardware timestamping) has been removed.
(see Linux commit 65f8f9a1c1db831e5159e3e3e50912d1f214cd0c)
Simply disable HW_TIME_STAMP feature because it is not used by KNI.
- annotations __devinit and __devexit have been removed.
(see Linux commit 54b956b903607f8f8878754dd4352da6a54a1da2)
Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
f2e7592c47
kni: fix multi-process support
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
d27a7e4e0b
ixgbe: force phy power up/down
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
3af34dec0b
igb: force phy power up/down
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
4732877adf
ixgbe: update VMDq/DCB support
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
28f682a176
igb: update VMDq/DCB support
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
32e7aa0b3a
ethdev: update VMDq/DCB support
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
647ec408be
ethdev: set VMDq pool when adding mac address
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
00e30184da
ixgbe: add PF support
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
be2d648a2d
igb: add PF support
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
0f72e563a2
ethdev: add PF support
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
6ee7676169
ixgbe: support dual vlan
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Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
e51abef393
igb: fix max RX packet size and support dual VLAN
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When in 'normal' mode, hardware is designed to receive up to 1522 bytes.
When in 'jumbo' mode, RLPML register must be updated so that hardware accepts
a 802.1q vlan header. If dual vlan is enabled, then a second vlan header is
expected, so update RLPML register according to dual vlan support.
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
dec6f7a645
ixgbe: retrieve RX available descriptors
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
23a6660113
igb: retrieve RX available descriptors
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
6acc6176c4
e1000: retrieve RX available descriptors
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
bc355ebf4f
ethdev: retrieve RX available descriptors
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
249358424e
ixgbe: RSS RETA configuration
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
9236f43284
igb: RSS RETA configuration
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
01a638e15d
ethdev: RSS RETA configuration
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
a108ced364
ixgbe: allocate structures on numa_node
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
b6ea6408fb
ethdev: store numa_node per device
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
e8719b2f99
ixgbe: allow unsupported SFP
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Add RTE_LIBRTE_IXGBE_ALLOW_UNSUPPORTED_SFP build option
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
8d4703f966
ixgbe: force inlining
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
f3cb1477ad
ixgbe: log tx code path
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Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
a30ebfbb8c
e1000: move workaround for wthresh on 82576 at wrong place
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The workaround is moved in e1000em code but 82576 is an igb NIC.
It breaks the fix of the commit 7e9e49feea.
Signed-off-by: Intel <intel.com>
2013-09-17 14:14:59 +02:00
Stephen Hemminger
7e9e49feea
igb: workaround errata with wthresh on 82576
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The 82576 has known issues which require the write threshold to be set to 1.
See:
http://download.intel.com/design/network/specupdt/82576_SPECUPDATE.pdf
If not then single packets will hang in transmit ring until more arrive.
Simple tests like ping will fail.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>
2013-09-17 14:09:23 +02:00
Intel
9b2027a70b
ethdev: more doxygen comments about fdir
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Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
b8539d50c5
pci: store numa_node per device
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Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
1a4afaef91
pci: configure SR-IOV with max_vfs
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Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Julien Courtat
06bcaf50ca
pci: fix probing blacklisted device with RTE_PCI_DRV_MULTIPLE flag
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When blacklisting network adapters that share a PCI bus address with multiple
ports such as Mellanox ConnectX-3 (librte_pmd_mlx4), RTE applications
enter infinite loops while probing PCI devices.
This commit removes this probe on subsequent instances for blacklisted devices
that have RTE_PCI_DRV_MULTIPLE set.
Signed-off-by: Julien Courtat <julien.courtat@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2013-09-17 14:09:22 +02:00
Intel
a22f5ce8fc
pci: don't unbind resources on exit
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unbind operations must be done before starting eal application
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
0a45657a67
pci: rework interrupt handling
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Signed-off-by: Intel <intel.com>
2013-09-17 14:09:22 +02:00
Stephen Hemminger
eee16c964c
pci: support multiple PCI regions per device
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Need to change PCI code to support multiple I/O regions on a single device.
Some devices like VMXNET3 have multiple PCI memory regions, and some
have none.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
c7f4888629
mbuf: force inlining
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Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
4dc11c20d7
mem: force inlining
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Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
3743329a7e
mem: remove RLIMIT_NOFILE update
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Memory init won't try to increase its RLIMIT_NOFILE limit, this must be done
prior to starting it.
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
e0c8475561
mem: find most little element from heap
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Allocations now return the most little element from heap matching size
constraint instead of the first one available.
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00