Commit Graph

4764 Commits

Author SHA1 Message Date
Anatoly Burakov
76e6f99c00 doc: add power management to NIC features
At this point, multiple different Ethernet drivers from multiple vendors
will support the PMD power management scheme. It would be useful to add
it to the NIC feature table to indicate support for it.

Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
2021-07-09 21:13:13 +02:00
Phil Yang
80e9ccc2ac doc: add aarch32 build guidance
Add cross-compiling guidance for 32-bit aarch32 DPDK on aarch64 host.

Signed-off-by: Phil Yang <phil.yang@arm.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Aaron Conole <aconole@redhat.com>
2021-07-09 20:16:59 +02:00
Richael Zhuang
ef1cc88f18 power: support cppc_cpufreq driver
Currently in DPDK only acpi_cpufreq and pstate_cpufreq drivers are
supported, which are both not available on arm64 platforms. Add
support for cppc_cpufreq driver which works on most arm64 platforms.

Signed-off-by: Richael Zhuang <richael.zhuang@arm.com>
Acked-by: David Hunt <david.hunt@intel.com>
2021-07-09 16:04:46 +02:00
Dmitry Kozlyuk
e8c90926bd doc: fix build on Windows with Meson 0.58
The `doc` target used `echo` as its command.
On Windows, `echo` is always a shell built-in, there is no binary.
Starting from meson 0.58, `run_target()` always searches for command
executable and no longer accepts `echo` as such on Windows.
Replace plain `echo` with a Python one-liner.

Fixes: d02a2dab2d ("doc: support building HTML guides with meson")
Cc: stable@dpdk.org

Reported-by: Rob Scheepens <rob.scheepens@nutanix.com>
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-07-09 14:53:39 +02:00
Juraj Linkeš
bf66003b51 build: use platform for generic and native builds
The current meson option 'machine' should only specify the ISA, which is
not sufficient for Arm, where setting ISA implies other settings as well
(and is used in Arm configuration as such).
Use the existing 'platform' meson option to differentiate the type of
the build (native/generic) and set ISA accordingly, unless the user
chooses to override it with a new option, 'cpu_instruction_set'.
The 'machine' option set the ISA in x86 builds and set native/default
'build type' in aarch64 builds. These two new variables, 'platform' and
'cpu_instruction_set', now properly set both ISA and build type for all
architectures in a uniform manner.
The 'machine' option also doesn't describe very well what it sets. The
new option, 'cpu_instruction_set', is much more descriptive. Keep
'machine' for backwards compatibility.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-07-09 14:50:54 +02:00
Jiawei Wang
e39226bde5 net/mlx5: control flow rules with identical pattern
In order to allow\disallow configuring rules with identical
patterns, the new device argument 'allow_duplicate_pattern'
is introduced.
If allow, these rules be inserted successfully and only the
first rule take affect.
If disallow, the first rule will be inserted and other rules
be rejected.

The default is to allow.
Set it to 0 if disallow, for example:
	-a <PCI_BDF>,allow_duplicate_pattern=0

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:35 +02:00
Shun Hao
a3b7af90ba net/mlx5: validate meter action in policy
This adds the validation when creating a policy with meter action.

Currently meter action is only allowed for green color in policy, and
8 meters are supported at maximum in one meter hierarchy.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:35 +02:00
Shun Hao
48fbc1be82 net/mlx5: fix meter policy flow match item
Currently when creating meter policy, a src port_id match item will
always be added in switch domain. So if one meter is used by another
port, it will not work correctly.

This issue is solved:
1. If policy fate action is port_id, add the src port_id match item,
and the meter cannot be shared by another port.
2. If policy fate action isn't port_id, don't add the src port_id
match, meter can be shared by another port.

This fix enables one meter being shared by different ports. User can
create a meter flow using a port_id match item to make this meter
shared by other port.

Fixes: afb4aa4f12 ("net/mlx5: support meter policy operations")
Cc: stable@dpdk.org

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:26 +02:00
Dmitry Kozlyuk
e60561cc95 doc: add limitation for ConnectX-4 with L2 in mlx5 guide
ConnectX-4 and ConnectX-4 Lx NICs require all L2 headers of transmitted
packets to be inlined. By default only first 18 bytes are inlined,
which is insufficient if additional encapsulation is used, like Q-in-Q.
Thus, default settings caused such traffic to be dropepd on Tx.
Document a recommendation to increase inlined data size in such cases.

Fixes: 505f1fe426 ("net/mlx5: add Tx devargs")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:23 +02:00
Tal Shnaiderman
a6a18d06f5 net/mlx5: add TCP and IPv6 to supported items for Windows
WINOF2 2.70 Windows kernel driver allows DevX rule creation
of types TCP and IPv6.

Added the types to the supported items in mlx5_flow_os_item_supported
to allow them to be created in the PMD.

Added description of new rules support in Windows kernel driver WINOF2 2.70
to the mlx5 driver guide.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:13 +02:00
Kalesh AP
6253a23491 net/bnxt: dump SFP module info
Add support to fetch the SFP EEPROM settings from the firmware.
For SFP+ modules we will display 0xA0 page for status and 0xA2 page
for other information. For QSFP modules we will show the 0xA0 page.

Also identify the module types for QSFP28, QSFP, QSFP+ apart
from the SFP modules and return an error for 10GBase-T PHY.

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
2021-07-08 05:55:48 +02:00
Kishore Padmanabha
a4d4308ef1 net/bnxt: add ICMPv6 parser to ULP
This patch adds support for parsing rte_flow items for ICMPv6 flows.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-08 02:02:13 +02:00
Kishore Padmanabha
3fe124d253 net/bnxt: support Thor platform
1. Add templates to support Thor platform.
2. Flow counter manager is not enabled if no flow counters are
   configured.
3. Mark database is not enabled if mark action is not supported.
4. Removed application to port default flow.
5. Add allocate and write for the global registry file.
6. Multiple default flow templates are combined to one.
7. Remove default loopback action record, this is required in order to
   support multiple platforms.
8. Enable port table support in the generic table.
9. remove global template table in order to support multiple platforms.
10. Add support to get parent VNIC from port table database.
11. VF representor action mark is made optional since not all
    configurations need representor support.
12. Add layer 4 ports to computational fields.
13. Update templates to support the above changes.
14. Add support for wildcard.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-08 02:02:08 +02:00
Kishore Padmanabha
a241760189 net/bnxt: identify duplicate flows
Conflict resolution feature allows rejection of flows based on
the previously added flows that conflict. For instance, a five
tuple flow is added and then you add a new flow with only 4 tuple
instead having same layer2 details then it will be rejected.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-08 02:02:01 +02:00
Venkat Duvvuru
da3731e2ea net/bnxt: check FW capability to support TRUFLOW
Currently, a devarg (host-based-truflow) is passed while launching
the app to enable TRUFLOW feature. However, this mechanism adds
an extra step in enabling TRUFLOW. This doesn't give a seamless
experience when flow offloads has to work with FW that doesn't/does
support TRUFLOW feature. Also, it's likely that customers may not
want to use devarg to enable flow offloads.

This patch fixes it by checking for TRUFLOW feature support in
device's capabilities and configurations field of the hwrm_ver_get.

Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
2021-07-08 02:01:56 +02:00
Shijith Thotton
44a2cebbd4 crypto/octeontx: add crypto adapter data path
Added support for crypto adapter OP_FORWARD mode.

As OcteonTx CPT crypto completions could be out of order, each crypto op
is enqueued to CPT, dequeued from CPT and enqueued to SSO one-by-one.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:28:39 +02:00
Fan Zhang
a13de42b27 doc: update dependencies for SW crypto PMDs
This patch updates the dependency requirement information
for aesni-gcm, aesni-mb, snow3g, zuc, and kasumi PMDs. Previously
building these PMDs with Make will fail when the system is
installed intel-ipsec-mb library version 1.0 or newer.

Since Make build system is deprecated already, instead of fixing
the issue the documentation is updated to state it.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
2021-07-07 21:28:39 +02:00
Kiran Kumar K
c7e6ab78f4 test/crypto: add cnxk for asymmetric cases
Registered cn9k and cn10k for asymmetric crypto
autotest. Documentation and release notes are also
updated.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:28:13 +02:00
Anoob Joseph
ba57cbd5fe crypto/cnxk: add asymmetric capabilities
Add asymmetric crypto capabilities supported
by cn9k and cn10k PMDs. Documentation is also
updated for the same.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:28:09 +02:00
Kiran Kumar K
5a3513caeb crypto/cnxk: add asymmetric session
Add asymmetric crypto session ops for both cn9k
and cn10k PMD.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:27:03 +02:00
Anoob Joseph
69407e7936 crypto/cnxk: add security capabilities
Add security capabilities supported by crypto cn10k PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Tejasree Kondoj
5db3d7d061 test/crypto: enable cnxk
Enable tests for cn9k & cn10k crypto PMDs.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Ankur Dwivedi
bf6629497a crypto/cnxk: add symmetric capabilities
Add symmetric crypto capabilities for cn9k & cn10k.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Tejasree Kondoj
786963fdcf crypto/cnxk: add digest support
Add support for digest support for various algorithms.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Tejasree Kondoj
546dff20a0 crypto/cnxk: add KASUMI decryption
Add KASUMI decrypt support.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Tejasree Kondoj
0c83c9abb9 crypto/cnxk: add ZUC and SNOW3G decryption
Add PDCP opcode which handles ZUC and SNOW3G.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Archana Muniganti
b02cd7a316 crypto/cnxk: add flexi cipher decryption
Add flexi crypto cipher decrypt support in enqueue API. Flexi crypto
opcode covers a broad set of ciphers including variants of AES.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Archana Muniganti
be0fd62a68 crypto/cnxk: add chained operation in session
Add support for chained operations in session.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Anoob Joseph
a21db2f7c5 crypto/cnxk: add dequeue burst
Add dequeue_burst op in cn9k & cn10k.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Ankur Dwivedi
2457705e64 crypto/cnxk: add driver skeleton
Add driver skeleton for crypto_cn9k & crypto_cn10k
PMDs leveraging cnxk common framework.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:15:08 +02:00
Chengwen Feng
80006b5987 doc: add link status event requirements in hns3 guide
Add link status event pre-conditions in the driver documentation.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-07-02 19:03:03 +02:00
Rahul Lakkireddy
422d7823a9 net/cxgbe: add MAC match-all to track promiscuous traffic
Chelsio T6 ASIC doesn't track Rx promisc traffic dropped due to lack
of Rx buffers and hence the imissed counter doesn't increment. Add
support for RAW MAC filter to insert a wildcard matchall rule at
the end of MPS TCAM to make MPS track the promisc traffic. This
rule will only be added/removed when promisc mode is turned on/off
on the interface.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2021-07-02 19:03:03 +02:00
David Marchand
40edb9c0d3 eal: handle compressed firmware
Introduce an internal firmware loading helper to remove code duplication
in our drivers and handle xz compressed firmware by calling libarchive.

This helper tries to look for .xz suffixes so that drivers are not aware
the firmware has been compressed.

libarchive is set as an optional dependency: without libarchive, a
runtime warning is emitted so that users know there is a compressed
firmware.

Windows implementation is left as an empty stub.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Igor Russkikh <irusskikh@marvell.com>
Acked-by: Aaron Conole <aconole@redhat.com>
Tested-by: Haiyue Wang <haiyue.wang@intel.com>
2021-07-07 16:41:53 +02:00
Ivan Malov
e32be8e630 doc: add transfer rules VXLAN actions in sfc guide
Actions VXLAN_DECAP and VXLAN_ENCAP need to be listed
among actions supported for transfer flows.

Fixes: 6ab6c40d1e ("net/sfc: support action VXLAN decap in transfer rules")
Fixes: 1bbd1ec234 ("net/sfc: support action VXLAN encap in MAE backend")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-07-07 11:54:21 +02:00
Pavan Nikhilesh
dbd4defea5 app/eventdev: add option to enable per port pool
Add option to configure unique mempool for each ethernet device
port. The new option available with `pipeline_atq` and
`pipeline_queue` tests.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-01 10:25:24 +02:00
Pavan Nikhilesh
f092fb0540 event/octeontx2: configure aura backpressure
In poll mode driver of octeontx2 the RQ is connected to a CQ and it is
responsible for asserting backpressure to the CGX channel.
When event eth Rx adapter is configured, the RQ is connected to a event
queue, to enable backpressure we need to configure AURA assigned to a
given RQ to backpressure CGX channel.
Event device expects unique AURA to be configured per ethernet device.
If multiple RQ from different ethernet devices use the same AURA,
the backpressure will be disabled, application can override this
using devargs:

	-a 0002:0e:00.0,force_rx_bp=1

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-06-30 18:43:05 +02:00
Haiyue Wang
79d559de89 net/ice: add option for setting HW debug mask
The HW debug mask is always zero, so user can't enable the related debug
function like ICE_DBG_XXX etc, add the devarg 'hw_debug_mask' to set the
debug mask log output at runtime.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-06 04:59:01 +02:00
Ting Xu
44d0a720a5 net/iavf: query QoS capabilities and set queue TC mapping
This patch added the support for VF to config the ETS-based Tx QoS,
including querying current QoS configuration from PF and config queue TC
mapping. PF QoS is configured in advance and the queried info is
provided to the user for future usage. VF queues are mapped to different
TCs in PF through virtchnl.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-06 04:58:15 +02:00
Ting Xu
3a6bfc37ea net/ice: support QoS config VF bandwidth in DCF
This patch supports the ETS-based QoS configuration. It enables the DCF
to configure bandwidth limits for each VF VSI of different TCs. A
hierarchy scheduler tree is built with port, TC and VSI nodes.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-06 04:58:15 +02:00
Wenzhuo Lu
214f452f7d net/ice: add AVX2 offload Rx
Add a specific path for RX AVX2.
In this path, support the HW offload features, like,
checksum, VLAN stripping, RSS hash.
This path is chosen automatically according to the
configuration.

'inline' is used, then the duplicate code is generated
by the compiler.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Leyi Rong <leyi.rong@intel.com>
2021-07-06 04:57:53 +02:00
Wenjun Wu
07d74e3d91 net/iavf: support flow pattern for GRE
Add GRE pattern support for AVF FDIR and RSS.

Patterns are listed below:
  1. eth/ipv4/gre/ipv4
  2. eth/ipv4/gre/ipv6
  3. eth/ipv6/gre/ipv4
  4. eth/ipv6/gre/ipv6
  5. eth/ipv4/gre/ipv4/tcp
  6. eth/ipv4/gre/ipv6/tcp
  7. eth/ipv4/gre/ipv4/udp
  8. eth/ipv4/gre/ipv6/udp
  9. eth/ipv6/gre/ipv4/tcp
  10. eth/ipv6/gre/ipv6/tcp
  11. eth/ipv6/gre/ipv4/udp
  12. eth/ipv6/gre/ipv6/udp

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-04 16:57:01 +02:00
Satheesh Paul
2c8438ac11 net/cnxk: support marking and VLAN tagging
This patch adds support for mark, flag, VLAN pop and
push flow actions.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
2021-06-30 03:44:03 +02:00
Sunil Kumar Kori
21cc840198 net/cnxk: support multicast filter
Patch adds multicast filter support for cn9k and cn10k platforms.

CGX DMAC filter table(32 entries) is divided among all LMACs
connected to it i.e. if CGX has 4 LMACs then each LMAC can have
up to 8 filters. If CGX has 1 LMAC then it can have up to 32
filters.

Above mentioned filter table is used to install unicast and multicast
DMAC address filters. Unicast filters are installed via
rte_eth_dev_mac_addr_add API while multicast filters are installed
via rte_eth_dev_set_mc_addr_list API.

So in total, supported MAC filters are equal to DMAC filters plus
mcast filters.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 03:36:38 +02:00
Satha Rao
00242a687d net/cnxk: support RETA and RSS hash
This patch will implement RETA and RSS hash apis. Also added
device argument to lock rx context.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2021-06-30 03:29:04 +02:00
Sunil Kumar Kori
3199a7f6a3 net/cnxk: support clock read
Patch implements read raw clock operation for cn9k and
cn10k.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 03:21:30 +02:00
Satheesh Paul
bc778a17fa net/cnxk: support flow RSS
Added support for RSS action in rte flow code based on ROC.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
2021-06-30 02:36:40 +02:00
Satha Rao
48a882afd8 net/cnxk: support registers dump
With this patch implemented api to dump platform registers for
debug purposes.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2021-06-30 02:29:15 +02:00
Satha Rao
86ac1c9cef net/cnxk: support firmware version query
Add callback to get ethdev firmware version.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2021-06-30 02:21:50 +02:00
Kiran Kumar K
8c009b4505 net/cnxk: support flow API
Adding initial version of rte_flow support for cnxk family device.
Supported rte_flow ops are flow_validate, flow_create, flow_destroy,
flow_flush, flow_query, flow_isolate.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
2021-06-30 02:07:05 +02:00
Satha Rao
8075b057b6 net/cnxk: support extended statistics
Initial implementation of xstats operations.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2021-06-30 01:30:10 +02:00