Commit Graph

5 Commits

Author SHA1 Message Date
Ziyang Xuan
78f6c5dbe2 net/hinic/base: add eq mechanism
Eqs include aeq and ceq. PMD supports aeq only. Aeq is a kind of
queue for mgmt asynchronous message and mgmt command response message.
This patch introduces data structures, initialization, and related
interfaces about aeq.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
7fcd6b05b9 net/hinic/base: support cmdq mechanism
Microcode is named ucode in Hi1822. Its main responsibility is data
transmission and reception. But it can also handle some administration
works. It uses cmdq mechanism. This patch introduces data structures,
initialization, interfaces, and commands sending functions of cmdq.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
53ffbf2caa net/hinic/base: add API command channel
API command channel is for communicating with mgmt module of chip.
This patch introduces data structures, initialization, interfaces,
and commands sending functions of API command channel.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
4b8441756f net/hinic/base: add HW interfaces of BAR operation
This patch adds some HW interfaces for bar operation interfaces,
including: mapped bar address getting, HW attributes getting,
msi-x reg operation, function type getting and so on.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
0020843cf4 net/hinic/base: add HW registers definition
Add HW registers definition header file for Hi1822 NIC.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00