This fixes the usage of structure members that are declared const to get
a pointer to the embedding parent structure.
Signed-off-by: Jan Blunck <jblunck@infradead.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
This macro is based on Jan Viktorin's original patch but also checks the
type of the passed pointer against the type of the member.
Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
[jblunck@infradead.org: add type checking and __extension__]
Signed-off-by: Jan Blunck <jblunck@infradead.org>
Exported header files used by applications should allow the strictest
compiler flags. Language extensions used in many places must be explicitly
marked or removed to avoid warnings and compilation failures.
Since there is no way to force named variadic macros as extensions, use a
a standard __VA_ARGS__ with an extra dummy argument to format strings.
This commit prevents the following errors:
error: ISO C does not permit named variadic macros
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Exported header files used by applications should allow the strictest
compiler flags. Language extensions used in many places must be explicitly
marked to avoid warnings and compilation failures.
Unnamed structs/unions are allowed since C11, however many compiler
versions do not use this mode by default.
This commit prevents the following errors:
error: ISO C99 doesn't support unnamed structs/unions
error: struct has no named members
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Exported header files used by applications should allow the strictest
compiler flags. Language extensions used in many places must be explicitly
marked or removed to avoid warnings and compilation failures.
This commit prevents the following errors:
error: ISO C forbids braced-groups within expressions
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
It was requested by Intel, more than one year ago, to replace the name
"Intel DPDK" by "DPDK".
Some references to the old name were still in some docs and code comments,
leading to confusion.
Fixes: ac8ada004c12 ("doc: remove Intel references from release notes")
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Adding a new macro for specifying __aligned__ attribute, and updating the
current __rte_cache_aligned macro to use it.
Also adding a new macro to specify the __packed__ attribute
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
Use deprecated attribute to highlight any use of fields that
are marked as going away in the rte_ether device statistics.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
On machines that are strict on pointer alignment, current code breaks
on GCC's -Wcast-align checks on casts from narrower to wider types.
This patch introduces new unaligned_uint(16|32|64)_t types, which
correctly retain alignment in such cases. Strict alignment
architectures will need to define CONFIG_RTE_ARCH_STRICT_ALIGN in
order to effect these new types.
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Fix a warning when the rte_common.h header is included in a compilation
using -Wbad-function-cast, such as in Open vSwitch where the
following warning is emitted repeatedly:
../rte_common.h: In function 'rte_is_aligned':
../rte_common.h:184:9: warning: cast from function call of
type 'uintptr_t' to non-matching type 'void *' [-Wbad-function-cast]
This change fixes the issue in rte_common.h by using the RTE_ALIGN_FLOOR
macro to get the aligned floor value with generic type casting.
Also removed the rte_align_floor_int() function and replaced it with
the RTE_PTR_ALIGN_FLOOR() macro.
Signed-off-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
When compiling C++11-code or above (--std=c++11), the build fails with
lots of
rte_eth_ctrl.h:517:3: note: in expansion of macro RTE_ALIGN
(RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
^
When reading the GCC info pages, I get the feeling that __typeof__ is
a better choice, and that indeed works when including the headers in
C++ files (--std=c++11).
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
rte_is_power_of_2 returns true for 0 and 0 is not power_of_2.
Fix by checking for n.
Signed-off-by: Ravi Kerur <rkerur@gmail.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
This commit removes trailing whitespace from lines in files. Almost all
files are affected, as the BSD license copyright header had trailing
whitespace on 4 lines in it [hence the number of files reporting 8 lines
changed in the diffstat].
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
[Thomas: remove spaces before tabs in libs]
[Thomas: remove more trailing spaces in non-C files]
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Adding or subtracting a value to a pointer makes a new pointer
of unknown type.
So typeof() is replaced by (void*) in RTE_PTR_ADD() and RTE_PTR_SUB().
But RTE_PTR_ALIGN_* macros have in their explicit API to return a pointer
of the same type. Since RTE_PTR_ALIGN_CEIL is based on RTE_PTR_ADD, a
typeof() is added to keep the original behaviour.
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Added the following new macros/inline functions, which are both
generally useful and needed for later functionality:
* rte_align64pow2: aligns a 64bit parameter to next power of 2
* RTE_LEN2MASK: create mask of type <tp> with the first <ln> bits
* RTE_DIM: return the number of elements in an array.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
The pause instruction is part of SSE2 extensions.
Note that some compilers define _mm_pause as "rep; nop" instead of "pause".
For compatible processors, they are equivalent.
http://www.intel.com/Assets/PDF/manual/325383.pdf:
"
When executing a spin-wait loop, a Pentium 4 or Intel Xeon processor suffers
a severe performance penalty when exiting the loop because it detects a
possible memory order violation.
The PAUSE instruction provides a hint to the processor that the code sequence
is a spin-wait loop. The processor uses this hint to avoid the memory order
violation in most situations, which greatly improves processor performance.
"
Signed-off-by: Intel
