In N6000 ADP platform, SPI protocol, master and QSPI flash are
transparent to host software. The SPI master implemented in PMCI
automatically converts the mailbox commands to the SPI protocol
required by SPI slave.
That means flash operation is different from old platform, new
interfaces are introduced to adapt these changes.
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
N6000 ADP platform has different definition of board information,
they can be recognized after this patch.
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
PMCI (Platform Management Control Interface) is a new module in FPGA,
which is designed to cooperate with BMC chip to fulfill board management
functions.
This base driver implements interfaces to access registers of BMC chip.
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
Header files should be self contained. This patch fixed it.
Fixes: 9e16317a38f9 ("dma/hisilicon: add probing")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
DPDK app can support multiple hardware DMA instances.
With DMA skeleton, only a single instance can be configured.
This patch supports multiple driver instances per device.
Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
Tested-by: Vipin Varghese <vipin.varghese@amd.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
Tested-by: Chengwen Feng <fengchengwen@huawei.com>
If no memcopy request is completed, the ring_idx of the last completed
operation need returned by last_idx parameter. This patch fixes it.
Fixes: 05d5fc66a269 ("dma/skeleton: introduce skeleton driver")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
GCC 12 raises the following warning:
../drivers/vdpa/ifc/ifcvf_vdpa.c: In function ‘vdpa_enable_vfio_intr’:
../drivers/vdpa/ifc/ifcvf_vdpa.c:383:62: error: writing 4 bytes into a
region of size 0 [-Werror=stringop-overflow=]
383 | fd_ptr[RTE_INTR_VEC_RXTX_OFFSET + i] = fd;
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~
../drivers/vdpa/ifc/ifcvf_vdpa.c:348:14: note: at offset 32 into
destination object ‘irq_set_buf’ of size 32
348 | char irq_set_buf[MSIX_IRQ_SET_BUF_LEN];
| ^~~~~~~~~~~
Validate number of vrings to avoid out of bound access.
Bugzilla ID: 855
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
GCC 12 raises the following warning:
In file included from ../lib/mempool/rte_mempool.h:46,
from ../lib/mbuf/rte_mbuf.h:38,
from ../lib/net/rte_ether.h:22,
from ../lib/ethdev/rte_ethdev.h:172,
from ../lib/ethdev/ethdev_driver.h:22,
from ../lib/ethdev/ethdev_pci.h:17,
from ../drivers/net/ice/ice_ethdev.c:6:
../drivers/net/ice/ice_ethdev.c: In function ‘ice_dev_configure’:
../lib/eal/x86/include/rte_memcpy.h:370:9: warning: array subscript 64 is
outside array bounds of ‘struct ice_aqc_get_set_rss_keys[1]’
[-Warray-bounds]
370 | rte_mov32((uint8_t *)dst + 2 * 32, (const uint8_t *)src + 2 * 32);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/net/ice/ice_ethdev.c:3202:41: note: while referencing ‘key’
3202 | struct ice_aqc_get_set_rss_keys key;
| ^~~
Restrict copy to minimum size.
Bugzilla ID: 850
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
GCC 12 raises the following warning:
../drivers/net/enetfec/enet_ethdev.c: In function
‘enetfec_rx_queue_setup’:
../drivers/net/enetfec/enet_ethdev.c:473:9: error: array
subscript 1 is
above array bounds of ‘uint32_t[1]’ {aka ‘unsigned int[1]’}
[-Werror=array-bounds]
473 | rte_write32(rte_cpu_to_le_32(fep->bd_addr_p_r[queue_idx]),
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
474 | (uint8_t *)fep->hw_baseaddr_v + ENETFEC_RD_START(queue_idx));
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/net/enetfec/enet_ethdev.c:9:
../drivers/net/enetfec/enet_ethdev.h:113:33: note: while referencing
‘bd_addr_p_r’
113 | uint32_t bd_addr_p_r[ENETFEC_MAX_Q];
| ^~~~~~~~~~~
This driver properly announces that it only supports 1 rxq.
Silence this warning by adding an explicit check on the queue id.
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Sachin Saxena <sachin.saxena@nxp.com>
GCC 12 raises the following warning:
In file included from ../lib/mempool/rte_mempool.h:46,
from ../lib/mbuf/rte_mbuf.h:38,
from ../lib/net/rte_ether.h:22,
from ../drivers/net/ena/ena_ethdev.h:10,
from ../drivers/net/ena/ena_rss.c:6:
../drivers/net/ena/ena_rss.c: In function ‘ena_rss_key_fill’:
../lib/eal/x86/include/rte_memcpy.h:370:9: warning: array subscript 64 is
outside array bounds of ‘uint8_t[40]’
{aka ‘unsigned char[40]’} [-Warray-bounds]
370 | rte_mov32((uint8_t *)dst + 2 * 32, (const uint8_t *)src + 2 * 32);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/net/ena/ena_rss.c:51:24: note: while referencing ‘default_key’
51 | static uint8_t default_key[ENA_HASH_KEY_SIZE];
| ^~~~~~~~~~~
This is a false positive because the copied size is checked against
ENA_HASH_KEY_SIZE in a (build) assert.
Silence this warning by calling memcpy with the minimal size.
Bugzilla ID: 849
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
GCC 12 raises the following warning:
In function ‘__rte_ring_enqueue_elems_64’,
inlined from ‘__rte_ring_enqueue_elems’ at
../lib/ring/rte_ring_elem_pvt.h:130:3,
inlined from ‘__rte_ring_do_hts_enqueue_elem’ at
../lib/ring/rte_ring_hts_elem_pvt.h:196:3,
inlined from ‘rte_ring_mp_hts_enqueue_burst_elem’ at
../lib/ring/rte_ring_hts.h:110:9,
inlined from ‘rte_ring_enqueue_burst_elem’ at
../lib/ring/rte_ring_elem.h:577:10,
inlined from ‘rte_ring_enqueue_burst’ at
../lib/ring/rte_ring.h:738:9,
inlined from ‘process_op_bit’ at
../drivers/crypto/ipsec_mb/pmd_snow3g.c:425:16,
inlined from ‘snow3g_pmd_dequeue_burst’ at
../drivers/crypto/ipsec_mb/pmd_snow3g.c:484:20:
../lib/ring/rte_ring_elem_pvt.h:68:44: error: array subscript 1 is
outside array bounds of ‘struct rte_crypto_op[0]’
[-Werror=array-bounds]
68 | ring[idx + 1] = obj[i + 1];
| ~~~^~~~~~~
../drivers/crypto/ipsec_mb/pmd_snow3g.c: In function
‘snow3g_pmd_dequeue_burst’:
../drivers/crypto/ipsec_mb/pmd_snow3g.c:434:1: note:
at offset 8 into object ‘op’ of size 8
434 | snow3g_pmd_dequeue_burst(void *queue_pair,
| ^~~~~~~~~~~~~~~~~~~~~~~~
Validate that one (exactly) op has been processed or return early.
Fixes: b537abdbee74 ("crypto/snow3g: support bit-level operations")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
The error path was calling rte_eth_dev_release_port() function,
which frees eth_dev->data->dev_private, and then tries to free
pmd->intr_handle, which causes the use after free issue.
The free can be moved to before the release function is called.
Fixes: d61138d4f0e ("drivers: remove direct access to interrupt handle")
Cc: stable@dpdk.org
Signed-off-by: Xiangjun Meng <mengxiangjun4@huawei.com>
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
The PMD destroy function was calling the release function, which frees
dev->data->dev_private, and then tries to free PRIV(dev)->intr_handle,
which causes the heap use after free issue.
The free can be moved to before the release function is called.
Fixes: d61138d4f0e ("drivers: remove direct access to interrupt handle")
Cc: stable@dpdk.org
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
- New firmware version for UDM (Upstream Data Mover)
- Remove device-level start, stop, and reset operations
- Add queue-based start, stop and reset as required by firmware
- Remove performance structs as they are not in the firmware module
Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
- New firmware version for DDM (Downstream Data Mover)
- Remove device-level start, stop, and reset operations
- Add queue-based start, stop and reset as required by firmware
Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
- New firmware version for MPU (Mbuf Prefetch Unit)
- Remove device-level global operations
- Remove ark_mpu_reset_stats function
Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
This release contains changes listed below.
- Fast mbuf free feature support.
- Device argument to disable the LLQ.
- Simplification of the MTU verification.
Signed-off-by: Michal Krawczyk <mk@semihalf.com>
The PMD attempts to enable the LLQ (Low Latency Queue) whenever it's
possible. The LLQ requires the user to enable the Write Combining for
the supported igb_uio/vfio-pci modules.
The vfio-pci module officially doesn't support the WC. Moreover, in some
Linux distributions, it can be built into the kernel, so any
modifications to the vfio-pci module require a full rebuild of the
kernel. This can make the configuration process much harder and for some
users, that are not interested in the great network performance for
their setups, it may be redundant. These users requested to be able to
turn off LLQ to avoid the hassle of such a setup.
It's generally not recommended to disable the LLQ, as it won't result in
the performance improvement and on the 6th generation AWS instances the
lack of LLQ can have a huge negative impact on hardware performance.
The device argument which controls the LLQ is called 'enable_llq` and by
default, it's set to 1 (which means that the LLQ is enabled). Setting
it to 0 disables the LLQ.
This commit also adds the explicit initialization of the devarg for the
'use_large_llq_hdr'. The PMD_REGISTER_PARAM_STRING() call for the ENA
was updated with all the available devargs (including
ENA_DEVARG_MISS_TXC_TO, which wasn't added previously).
Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Dawid Gorecki <dgr@semihalf.com>
Reviewed-by: Shai Brandes <shaibran@amazon.com>
Reviewed-by: Amit Bernstein <amitbern@amazon.com>
Remove MTU verification from ena_mtu_set() and ena_start(). It is done
by rte_ethdev already, so there is no reason to repeat it inside the ENA
driver.
Signed-off-by: Dawid Gorecki <dgr@semihalf.com>
Reviewed-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Shai Brandes <shaibran@amazon.com>
Reviewed-by: Amit Bernstein <amitbern@amazon.com>
Add support for RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE offload. It can be
enabled if all the mbufs for a given queue belong to the same mempool
and their reference count is equal to 1.
Signed-off-by: Dawid Gorecki <dgr@semihalf.com>
Reviewed-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Shai Brandes <shaibran@amazon.com>
Reviewed-by: Amit Bernstein <amitbern@amazon.com>
Define the missing __NR_bpf syscall id to enable the tap PMD.
Sponsored-by: Frank Zhao <frank.zhao@starfivetech.com>
Sponsored-by: Sam Grove <sam.grove@sifive.com>
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Define the missing __NR_memfd_create syscall id to enable the memif PMD.
Sponsored-by: Frank Zhao <frank.zhao@starfivetech.com>
Sponsored-by: Sam Grove <sam.grove@sifive.com>
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Re-use vector processing stubs in ixgbe PMD defined for PPC for RISC-V.
This enables ixgbe PMD usage in scalar mode on this architecture.
The ixgbe PMD driver was validated with Intel X520-DA2 NIC and the
test-pmd application. Packet transfer checked using all UIO drivers
available for non-IOMMU platforms: uio_pci_generic, vfio-pci noiommu and
igb_uio.
Sponsored-by: Frank Zhao <frank.zhao@starfivetech.com>
Sponsored-by: Sam Grove <sam.grove@sifive.com>
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Add all necessary elements for DPDK to compile and run EAL on SiFive
Freedom U740 SoC which is based on SiFive U74-MC (ISA: rv64imafdc)
core complex.
This includes:
- EAL library implementation for rv64imafdc ISA.
- meson build structure for 'riscv' architecture. RTE_ARCH_RISCV define
is added for architecture identification.
- xmm_t structure operation stubs as there is no vector support in the
U74 core.
Compilation was tested on Ubuntu and Arch Linux using riscv64 toolchain.
Clang compilation currently not supported due to issues with missing
relocation relaxation.
Two rte_rdtsc() schemes are provided: stable low-resolution using rdtime
(default) and unstable high-resolution using rdcycle. User can override
the scheme by defining RTE_RISCV_RDTSC_USE_HPM=1 during compile time of
both DPDK and the application. The reasoning for this is as follows.
The RISC-V ISA mandates that clock read by rdtime has to be of constant
period and synchronized between all hardware threads within 1 tick
(chapter 10.1 in version 20191213 of RISC-V spec).
However this clock may not be of high-enough frequency for dataplane
uses. I.e. on HiFive Unmatched (FU740) it is 1MHz.
There is a high-resolution alternative in form of rdcycle which is
clocked at the core clock frequency. The drawbacks are that it may be
disabled during sleep (WFI), its frequency might change due to DVFS and
it is core-local and therefore cannot be used as a wall-clock. It can
however be used for micro-benchmarking user applications, similarly to
Aarch64's PMCCNTR PMU counter.
The platform is currently marked as linux-only because rte_cycles
implementation uses the timebase-frequency device-tree node read through
the proc file system. Such approach was chosen because Linux kernel
depends on the presence of this device-tree node.
The i40e PMD driver is disabled on RISC-V as the rv64gc ISA has no vector
operations.
The compilation of following modules has been disabled by this commit
and will be re-enabled in later commits as fixes are introduced:
net/ixgbe, net/memif, net/tap, example/l3fwd.
Sponsored-by: Frank Zhao <frank.zhao@starfivetech.com>
Sponsored-by: Sam Grove <sam.grove@sifive.com>
Signed-off-by: Michal Mazurek <maz@semihalf.com>
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Batch op data is initialized inside mempool alloc. But
in case of empty mempools, the alloc function is not
called and hence the initialization of batch op data is
also not done. So ensure the validity of batch op data
inside mempool free.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Controlling existing GPIO should be normally frowned upon because
we want to avoid situation where multiple contenders modify GPIO
state simultaneously.
Still there might be situations where this is actually needed.
Restarting killed application being an example here.
So relax current restrictions and respect user needs.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
When sending a command to an idxd device via PCI BAR, the response from
HW is checked to ensure it was successful. The response was incorrectly
being negated before being returned by the function, meaning error codes
cannot be checked against the HW specification.
This patch fixes the return values of the function by removing the
negation.
Fixes: 9449330a8458 ("dma/idxd: create dmadev instances on PCI probe")
Fixes: 452c1916b0db ("dma/idxd: fix truncated error code in status check")
Cc: stable@dpdk.org
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Conor Walsh <conor.walsh@intel.com>
Allow building generic arm64 target using config/arm/arm64_armv8_linux_*
config which works on both cn9k and cn10k by relaxing cache line size
requirements a bit.
While at it move cache line checks to common place.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
To allow other projects to easily use DPDK as a subproject, add in the
necessary dependency definitions. Slightly different definitions are
necessary for static and shared builds, since for shared builds the
drivers should not be linked in, and the internal meson dependency
objects are more complete.
To use DPDK as a subproject fallback i.e. use installed DPDK if present,
otherwise the shipped one, the following meson statement can be used:
libdpdk = dependency('libdpdk', fallback: ['dpdk', 'dpdk_dep'])
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Ben Magistro <koncept1@gmail.com>
Tested-by: Ben Magistro <koncept1@gmail.com>
At device probe, the fslmc bus driver calls rte_vfio_get_group_fd() to
get a fd associated to a vfio group. This function first checks if the
group is already opened, else it opens /dev/vfio/%u, and increases the
number of active groups in default_vfio_cfg (which references the
default vfio container).
When adding the first group to a vfio_cfg, the caller is supposed to
pick an IOMMU type and set up DMA mappings for container, as it's done
by pci bus, but it is not done here. Instead, a new container is created
and used.
This prevents the pci bus driver, which uses the default_vfio_cfg
container, to configure the container because
default_vfio_cfg->active_group > 1.
This patch fixes the issue by always creating a new container (and its
associated vfio_cfg) and binding the group to it.
Fixes: a69f79300262 ("bus/fslmc: support multi VFIO group")
Cc: stable@dpdk.org
Signed-off-by: Romain Delhomel <romain.delhomel@6wind.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This patch replaces instances of zero-sized arrays i.e. those at the end
of structures with "[0]" with the more standard syntax of "[]".
Replacement was done using coccinelle script, with some revert and
cleanup of whitespace afterwards.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
PAC N6000 is the first OFS platform, its device id is added to ifpga
device support list.
Previous FPGA platform like Intel PAC N3000 and N5000, FME DFL (Device
Feature List) starts from BAR0 by default, port DFL location is indicated
in PORTn_OFFSET register in FME. In OFS implementation, FME DFL and port
DFL location can be defined individually in PCIe VSEC (Vendor Specific
Extended Capabilities). In this patch, DFL definition is searched in VSEC,
the legacy DFL is used only when DFL VSEC is not present.
In original DFL enumeration process, AFU is expected to locate in port DFL,
but this is not the case in OFS implementation. In this patch, enumeration
can search AFU in any PF/VF which has no FME and port.
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
There is an API rte_pmd_ifpga_cleanup provided by ifpga driver to
free the software resource used by ifpga card. The function call
of rte_pmd_ifpga_cleanup is list below.
rte_pmd_ifpga_cleanup()
ifpga_rawdev_cleanup()
rte_rawdev_pmd_release()
rte_rawdev_close()
ifpga_rawdev_close()
The interrupts are unregistered in ifpga_rawdev_destroy instead of
ifpga_rawdev_close function, so rte_pmd_ifpga_cleanup cannot free
interrupt resource as expected.
To fix such issue, interrupt unregistration is moved from
ifpga_rawdev_destroy to ifpga_rawdev_close function. The change of
function call of ifpga_rawdev_destroy is as below.
ifpga_rawdev_destroy()
ifpga_unregister_msix_irq() // removed
rte_rawdev_pmd_release()
rte_rawdev_close()
ifpga_rawdev_close()
Fixes: e0a1aafe2af9 ("raw/ifpga: introduce IRQ functions")
Cc: stable@dpdk.org
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
Virtual devices created on ifpga raw device will not be removed
when ifpga device has closed. To avoid resource leak problem,
this patch introduces an ifpga virtual device remove function,
virtual devices will be destroyed after the ifpga raw device closed.
Fixes: ef1e8ede3da5 ("raw/ifpga: add Intel FPGA bus rawdev driver")
Cc: stable@dpdk.org
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
These APIs are introduced in DPDK 21.05 and have been tested in several
release, experimental tag can be formally removed.
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
The device config script currently uses some defaults to configure
devices in a generic way.
With the addition of this option, users have more control over how
queues are configured.
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Tested-by: Sunil Pai G <sunil.pai.g@intel.com>
The CQ (completion queue) descriptors were updated by hardware, and then
scanned by driver to retrieve hardware completion status.
This patch enhances robustness by following:
1. replace while (true) with a finite loop to avoid potential dead loop.
2. check the csq_head field in CQ descriptor to avoid status array
overflows.
Fixes: 2db4f0b82360 ("dma/hisilicon: add data path")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
If no DMA request is completed, the ring_idx of the last completed
operation need returned by last_idx parameter. This patch fixes it.
Fixes: 2db4f0b82360 ("dma/hisilicon: add data path")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
ESP item is not supported on Windows, yet it is expanded from the
expansion graph when trying to create default flow to RSS all packets.
Support ESP item match (without ability to match on SPI field on Windows).
Split ESP validation per OS.
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
The mlx5_action_construct_data structure memory is managed by ipool
named acts_ipool.
The size of one entry in this ipool is mistakenly defined as size of
rte_flow_hw structure.
This size is used to reset in the allocated part. When the size is
incorrect it resets memory that does not belong to it.
This patch defines the correct size.
Fixes: f13fab23922b ("net/mlx5: add flow jump action")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
While non-lcore list operations were supported, non-lcore index will
be converted to MLX5_LIST_NLCORE. In that case, no need to check the
lcore index be -1 or not anymore.
This commit removes the unused lcore check in list.
Fixes: 7e1cf892711b ("common/mlx5: support list non-lcore operations")
Cc: stable@dpdk.org
Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Kernel iavf driver has sent patch to increase the completion
wait time to reduce the "Reset never finished" case.
Follow this action in DPDK iavf driver.
Kernel reference commit:
8e3e4b9da7e6 ("iavf: increase reset complete wait time")
Fixes: 22b123a36d07 ("net/avf: initialize PMD")
Cc: stable@dpdk.org
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
When kernel driver does not support quanta size configuration,
it will return error. We do not expect it to occur in default
initialization process.
Fixes: b14e8a57b9fe ("net/iavf: support quanta size configuration")
Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
