Commit Graph

219 Commits

Author SHA1 Message Date
Thomas Monjalon
83c99c366e common/mlx5: split glue initialization
The function mlx5_glue_init was doing three things:
	- initialize logs
	- load glue library if in dlopen mode
	- initialize glue layer
They are split in three functions for clarity.

The config option RTE_IBVERBS_LINK_DLOPEN is not used anymore
outside of make and meson files. It is replaced with MLX5_GLUE,
which is defined in the same condition and is already used with dlopen.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:07 +02:00
Qi Zhang
51efc0e30d common/iavf: update version
Update base code release version in readme

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:07 +02:00
Qi Zhang
02ec7cf689 common/iavf: support flow director in virtual channel
Adds new ops and structures to support VF to add/delete/validate/
query flow director.

ADD and VALIDATE FDIR share one ops: VIRTCHNL_OP_ADD_FDIR_FILTER.
VF sends this request to PF by filling out the related field in
virtchnl_fdir_add. If the rule is created successfully, PF
will return flow id and program status to VF. If the rule is
validated successfully, the PF will only return program status
to VF.

DELETE FDIR uses ops: VIRTCHNL_OP_DEL_FDIR_FILTER.
VF sends this request to PF by filling out the related field in
virtchnl_fdir_del. If the rule is deleted successfully, PF
will return program status to VF.

Query FDIR uses ops: VIRTCHNL_OP_QUERY_FDIR_FILTER.
VF sends this request to PF by filling out the related field in
virtchnl_fdir_query. If the request is successfully done by PF,
PF will return program status and query info to VF.

Signed-off-by: Simei Su <simei.su@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:07 +02:00
Qi Zhang
57094d5943 common/iavf: support advanced RSS input set change
Add new ops and a new VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF flag to support
VF to add or del a specific rss configuration by virtchnl.

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:07 +02:00
Qi Zhang
485584826f common/iavf: add virtual channel protocol header
To support advanced AVF's FDIR and RSS feature, we need to figure out
what kind of data structure should be passed from VF to PF to describe
an FDIR rule or RSS config rule. The common part of the requirement is
we need a data structure to represent the input set selection of a rule's
hash key.

An input set selection is a group of fields be selected from one or more
network protocol layers that could be identified as a specific flow.
For example, select dst IP address from an IPv4 header combined with
dst port from the TCP header as the input set for an IPv4/TCP flow.

The patch adds a new data structure virtchnl_proto_hdrs to abstract
a network protocol headers group which is composed of layers of network
protocol header(virtchnl_proto_hdr).

A protocol header contains a 32 bits mask (field_selector) to describe
which fields are selected as input sets, as well as a header type
(enum virtchnl_proto_hdr_type). Each bit is mapped to a field in
enum virtchnl_proto_hdr_field guided by its header type.

+------------+-----------+------------------------------+
|            | Proto Hdr | Header Type A                |
|            |           +------------------------------+
|            |           | BIT 31 | ... | BIT 1 | BIT 0 |
|            |-----------+------------------------------+
|Proto Hdrs  | Proto Hdr | Header Type B                |
|            |           +------------------------------+
|            |           | BIT 31 | ... | BIT 1 | BIT 0 |
|            |-----------+------------------------------+
|            | Proto Hdr | Header Type C                |
|            |           +------------------------------+
|            |           | BIT 31 | ... | BIT 1 | BIT 0 |
|            |-----------+------------------------------+
|            |    ....                                  |
+-------------------------------------------------------+

All fields in enum virtchnl_proto_hdr_fields are grouped with header type
and the value of the first field of a header type is always 32 aligned.

enum proto_hdr_type {
	header_type_A = 0;
	header_type_B = 1;
	....
}

enum proto_hdr_field {
	/* header type A */
	header_A_field_0 = 0,
	header_A_field_1 = 1,
	header_A_field_2 = 2,
	header_A_field_3 = 3,

	/* header type B */
	header_B_field_0 = 32, // = header_type_B << 5
	header_B_field_0 = 33,
	header_B_field_0 = 34
	header_B_field_0 = 35,
	....
};

So we have:
proto_hdr_type = proto_hdr_field / 32
bit offset = proto_hdr_field % 32

To simply the protocol header's operations, couple help macros are added.
For example, to select src IP and dst port as input set for an IPv4/UDP
flow.

we have:
struct virtchnl_proto_hdr hdr[2];

VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[0], IPV4)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[0], IPV4, SRC)

VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[1], UDP)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[1], UDP, DST)

A protocol header also contains a byte array, this field should only
be used by an FDIR rule and should be ignored by RSS. For an FDIR rule,
the byte array is used to store the protocol header of a training
package. The byte array must be network order.

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:07 +02:00
Qi Zhang
a8180656e7 common/iavf: support virtual channel for Flex RXD
Add new VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC flag, opcode
VIRTCHNL_OP_GET_SUPPORTED_RXDIDS and add member rxdid
in struct virtchnl_rxq_info to support AVF Flex RXD
extension.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:07 +02:00
Qi Zhang
f5cd3a9f60 common/iavf: add DDP package query in virtual channel
Add VIRTCHNL_OP_DCF_GET_PKG_INFO to query DDP package identification.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:07 +02:00
Qi Zhang
6c8cf785eb common/iavf: add packet type aborted code
Add IAVF_RX_PTYPE_PARSER_ABORTED definition, so iavf driver will know
opcode for parser aborted packets.
Without this definition driver would have to rely on magic numbers.

Signed-off-by: Przemyslaw Patynowski <przemyslawx.patynowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:07 +02:00
Suanming Mou
1d0ab7e795 common/mlx5: add batch counter id offset
This commit is a part for the DV counter optimization.

The batch counter dcs id starts from 0x800000 and none batch counter
starts from 0. As currently, the counter is changed to be indexed by
pool index and the offset of the counter in the pool counters_raw array.
It means now the counter index is same for batch and none batch counter.
Add the 0x800000 batch counter offset to the batch counter index helps
indicate the counter index is from batch or none batch container pool.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:07 +02:00
Satheesh Paul
0342232aa4 net/octeontx2: support custom L2 header
This patch adds SDP packet parsing support with custom L2 header,
adds support to include a field from custom header for flow tag
generation.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
43f3f05fb6 net/octeontx2: support dynamic topology update
Modify resource allocation and freeing logic to support
dynamic topology commit while to traffic is flowing.
This patch also modifies SQ flush to timeout based on minimum shaper
rate configured. SQ flush is further split to pre/post
functions to adhere to HW spec of 96XX C0.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
5094a436c6 common/octeontx2: upgrade mbox definition to version 5
Sync mail box data structures to version 0x0005 to
that of kernel AF driver.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Dekel Peled
a4e6ea97a5 common/mlx5: fix RSS key copy to TIR context
In function mlx5_devx_cmd_create_tir(), the 40 bytes of RSS key are
copied in 10 iterations, 4 bytes each time using the MLX5_SET macro.
As result the RSS key is copied into TIR context in swapped byte order.
This patch fixes the issue, using memcpy() to copy the RSS key as is.
The struct member mlx5_devx_tir_attr.rx_hash_toeplitz_key is updated
to byte array type.

Fixes: c3aea272ee ("net/mlx5: create advanced Rx object via DevX")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Shiri Kuzin
53ac93f71a net/mlx5: create relaxed ordering memory regions
In the current state, when preforming read/write
transactions we must wait for a completion in order
to run the next transaction, and all transactions are
performed by order.

Relaxed Ordering is a PCI optimization which by enabling it
we allow the system to perform read/writes in a different
order without having to wait for completion and improve
the performance in that matter.

This commit introduces the creation of relaxed ordering
memory regions in mlx5.
As relaxed ordering is an optimization, drivers that
do not support it can simply ignore it and therefore
it is enabled by default.

Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Haiyue Wang
7564d55096 net/ice: add DCF hardware initialization
Introduce the DCF (Device Config Function) feature in the ice PMD, it
works as a standalone PMD which doesn't handle the packet Rx/Tx related
things. Its hardware entity is the VF.

Add the basic DCF hardware initialization, this is specified by devarg
'cap=dcf'.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
109e2abb43 common/iavf: support VSI mapping table
Add an opcode for getting VSI mapping table.
Add an virtchnl event code for VF reset done.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
ddfd1f9b70 common/iavf: support DCF capability negotiation
Add DCF capability flag for VF.
Add an opcode for disabling DCF capability.
Add an virtchnl event code for AVF resetting completion.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
4831dfa1bd common/iavf: add two opcodes to send AdminQ command
Add two virtchnl opcodes to send the AdminQ command, one is used to
send the descriptor, the other is used to send the buffer payload if
the AdminQ command has BUF flag set.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
72390691c8 common/iavf: update copyright date
Update copyright date to 2020.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:05 +02:00
Adam Dybkowski
c13cecf60f compress/qat: support IM buffer too small operation
This patch implements a special way of buffer handling when internal
QAT IM buffer is too small for Huffman dynamic compression operation.
Instead of falling back to fixed compression, the operation is now
split into multiple smaller dynamic compression requests (possible to
execute on QAT) and their results are then combined and copied into
the output buffer. This is not possible if any checksum calculation
was requested - in such case the code falls back to fixed compression
as before.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-04-19 17:15:14 +02:00
Thomas Monjalon
e3866e7355 replace hot attributes
The new macro __rte_hot, for compiler hinting,
is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
f2fc83b40f replace unused attributes
There is a common macro __rte_unused, avoiding warnings,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
d0ac7bb577 replace no-inline attributes
There is a macro __rte_noinline, preventing function to be inlined,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:16:46 +02:00
Thomas Monjalon
ef5baf3486 replace packed attributes
There is a common macro __rte_packed for packing structs,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:16:46 +02:00
Thomas Monjalon
f35e5b3e07 replace alignment attributes
There is a common macro __rte_aligned for alignment,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
2020-04-16 18:16:18 +02:00
Thomas Monjalon
6c9d13410b common/mlx5: replace alignas keyword
The keyword alignas can be replaced with __rte_aligned macro
for consistency and allow compilers compatibility control.

The macro __rte_cache_aligned is a shortcut including __rte_aligned
and RTE_CACHE_LINE_SIZE constant.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:07:30 +02:00
Pavan Nikhilesh
acec04c4b2 build: disable experimental API check internally
Remove setting ALLOW_EXPERIMENTAL_API individually for each Makefile and
meson.build. Instead, enable ALLOW_EXPERIMENTAL_API flag across app, lib
and drivers.
This changes reduces the clutter across the project while still
maintaining the functionality of ALLOW_EXPERIMENTAL_API i.e. warning
external applications about experimental API usage.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2020-04-14 16:22:34 +02:00
Adam Dybkowski
7444111408 common/qat: get firmware version
This patch adds the function for retrieving QAT firmware
version, required to check the internal capabilities that
depend on the FW version.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-04-05 18:27:42 +02:00
Fiona Trahe
dda27cb3c1 common/qat: optimise calculation of cookie index
Avoid costly division, use shift instead.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2020-04-05 18:26:04 +02:00
Thomas Monjalon
9c1e0dc39a eal: move common header files
The EAL API (with doxygen documentation) is moved from
common/include/ to include/, which makes more clear that
it is the global API for all environments and architectures.

Note that the arch-specific and OS-specific include files are not
in this global include directory, but include/generic/ should
cover the doxygen documentation for them.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-03-31 13:08:55 +02:00
Ferruh Yigit
241e67bfec log: add API to check if a logtype can log in a given level
This is a helper function in case components would like to do more work
than just logging a message based on log level, like for example
collecting some stats if the log type is DEBUG etc..

A few existing relevant usage converted to this new API.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Andrzej Ostruszka <aostruszka@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-03-27 11:20:08 +01:00
Tonghao Zhang
a6e7cd81fa common/mlx5: fix build without dlopen option
When setting the CONFIG_RTE_BUILD_SHARED_LIB to y,
and build the mlx5 pmd, there is a building error.
To fix it, add RTE_IBVERBS_LINK_DLOPEN to include
relative codes.

    mlx5_common.o: In function `mlx5_glue_init':
    drivers/common/mlx5/mlx5_common.c:324: undefined reference to `dlclose'

Fixes: 7b4f1e6bd3 ("common/mlx5: introduce common library")
Cc: stable@dpdk.org

Signed-off-by: Tonghao Zhang <xiangxia.m.yue@gmail.com>
Tested-by: Ali Alnubani <alialnu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-03-18 10:21:41 +01:00
Dekel Peled
e8e5fdfdd6 net/mlx5: support match on IPv4 TTL and IPv6 HLIM
This patch adds to MLX5 PMD the support of matching on IPv4 TTL and
IPv6 hoplimit.
Support is valid when using DV flow engine (Verbs flow engine doesn't
support matching on this field).

Signed-off-by: Eli Britstein <elibr@mellanox.com>
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-03-18 10:21:41 +01:00
Bruce Richardson
0dcba52562 pci: remove unneeded includes in public header file
The rte_pci.h file includes more header files than are actually needed,
which means that all users of it also include those headers. This patch
removes the unneeded headers - adding them elsewhere where other components
were requiring them but not including them directly.

Fixes: c752998b5e ("pci: introduce library and driver")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2020-03-16 15:45:45 +01:00
Raslan Darawsheh
58b4a2b13e net/mlx5: add BlueField-2 device ID
This adds new device id to the list of Mellanox devices
that runs mlx5 PMD.
- BlueField-2 integrated ConnectX-6 Dx network controller

This device is not ready yet, it is in development stage.

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-19 13:51:06 +01:00
Harman Kalra
93a9afdb4b net/octeontx2: fix PTP
PTP functionality has been broken after a change in kernel
where enum npc_kpu_lc_ltype is change to allow adjustment of
LTYPE_MASK to detect all types of IP headers.
Syncing the required changes in DPDK to fix the issue.

The kernel side changes available in marvell SDK version SDK-10.3.2.x.

Fixes: b5dc314044 ("net/octeontx2: support base PTP")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-19 13:51:06 +01:00
Thomas Monjalon
e21492a517 net/mlx: fix overlinking with meson and glue dlopen
If ibverbs_link is dlopen, the PMD and application should not
be linked with ibverbs, but the glue library is.
Unfortunately the ibverbs dependency was exported in the
variable ext_deps, so there were overlinking.

It is fixed by not exporting the dependency in ext_deps,
and recreating a limited dependency object for cflags only.

Fixes: 1dd7c7e38c ("net/mlx4: support meson build")
Fixes: 96d7c62a70 ("net/mlx5: support meson build")
Cc: stable@dpdk.org

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-02-14 12:42:13 +01:00
Thomas Monjalon
76c72a34bb net/mlx: rename meson variable for dlopen option
The name of the variable pmd_dlopen is confusing because
it can be understood as true if the PMD is dlopen,
whereas it means the ibverbs glue layer is a dlopen library.
That's why it is renamed dlopen_ibverbs.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-02-14 12:42:13 +01:00
Thomas Monjalon
af331158f2 net/mlx: workaround static linkage with meson
If ibverbs_link is static and the application choose to link DPDK
as static libraries, both PMD and ibverbs libraries must be linked
as static libraries. And the dependencies of ibverbs (netlink) must
still be linked as shared libraries.

Unfortunately, meson forget about the static requirement for ibverbs
when generating the .pc file.
As a result, libibverbs, libmlx4, libmlx5 are listed in Requires.private
section (allowing to be linked as shared libraries) and libnl is missing.

A fix is in progress for meson, but anyway we will have to live without
such a fix until a better version of meson is widely available:
	https://github.com/mesonbuild/meson/pull/6393

In order to avoid meson suggesting shared libraries in the section
Requires.private of the .pc file, the dependency object is recreated
with declare_dependency():
	- cflags are extracted the libibverbs.pc
	- ldflags, from libibverbs.pc, are processed to force
	static flavor of ibverbs libraries, thanks to this syntax:
			-l:libfoo.a

Fixes: 6affeabaf3 ("net/mlx: add static ibverbs linkage with meson")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2020-02-14 12:42:13 +01:00
Thomas Monjalon
6affeabaf3 net/mlx: add static ibverbs linkage with meson
The libibverbs (and libmlx4/5) can be statically embedded
in the shared PMD library, or in the application with the static PMD.
It was supported with make build system in
commit 2c0dd7b69f ("config: add static linkage of mlx dependency").

The same feature is enabled with meson when using pkg-config
(i.e. only if the call to dependency() is successful).
The fallback method for searching library with cc.find_library()
is not supported because the dependencies of the found library
would not be linked (no such info in .a file unlike .so).

The main difference, in meson build system, is the generated .pc file
giving arguments to link DPDK with the application.
Unfortunately the .pc file will not keep memory of the static linkage
option for libibverbs.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-02-14 12:42:13 +01:00
Thomas Monjalon
79ece3649a drivers: cleanup meson build variable
The variable build is already initialized as true in
drivers/meson.build. Duplicate initializations can be removed from mlx.

When the variable build is set to false, it is easier to call
subdir_done() than branch the rest of the code on build condition.

Suggested-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2020-02-14 12:42:12 +01:00
Matan Azrad
4231be021a common/mlx5: fix glue dlopen with meson build
The glue shared library name was created by the common class FMT name,
driver_name_fmt = 'rte_common_@0@', which is not correlated with
LIB_GLUE_BASE = 'librte_pmd_mlx5_glue.so'.

This causes the dynamic linkage of the glue library to fail what
remained mlx5 drivers outside the PCI driver list.

The command:
MLX5_GLUE_PATH=$(pwd)/build-meson/drivers/common/mlx5
build-meson/app/dpdk-testpmd -n 4  -w 0000:00:05.0 -w 0000:00:06.0 -- -i

The log:
common_mlx5: Cannot load glue library:
/usr/local/lib64/dpdk/pmds-20.0.1-glue/librte_pmd_mlx5_glue.so.20.02.0:
cannot open shared object file: No such file or directory

Adjust the shared library name to the LIB_GLUE_BASE definition.

Fixes: 7b4f1e6bd3 ("common/mlx5: introduce common library")

Signed-off-by: Matan Azrad <matan@mellanox.com>
2020-02-14 12:42:12 +01:00
Viacheslav Ovsiienko
7593cf1d35 net/mlx5: fix legacy multi-packet write session
To provide the better PCIe bandwidth utilization the ConnectX-4LX
NIC supports the multi-packet write (MPW) sessions allowing to
pack multiple packets into one descriptor (WQE). This is legacy
feature and it has some limitations on the packets and data
description segments. To provide the best performance all inline
packets must be put into shared data segment and the total length
of MPW session must be limited. The limit is controlled with
txq_inline_mpw devarg.

Fixes: 82e75f8323 ("net/mlx5: fix legacy multi-packet Tx descriptors")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-14 12:42:12 +01:00
Haiyue Wang
9e0c99502d common/iavf: fix ABI version
The new symbols should be in ABI version 20.0.1.

Fixes: 89214fe915 ("net/iavf/base: move to drivers common directory")

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-02-14 12:42:12 +01:00
Matan Azrad
70e18b45d1 common/mlx5: fix ABI version
Changed the ABI version to 20.0.1.

Fixes: 7b4f1e6bd3 ("common/mlx5: introduce common library")

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-12 09:26:43 +01:00
Thomas Monjalon
43e34a229d build: remove redundant config include
The header file rte_config.h is always included by make or meson.
If required in an exported API header file, it must be included
in the public header file for external applications.
In the internal files, explicit include of rte_config.h is useless,
and can be removed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
2020-02-11 16:50:59 +01:00
Anoob Joseph
44158b523b common/octeontx2: fix 20.02 new symbols ABI version
Move symbols added in 20.02 release to DPDK_20.0.1 ABI.

Fixes: d06551535a ("common/octeontx2: add security capability routine")
Fixes: 3fe4d07d16 ("crypto/octeontx2: enable CPT to share QP with ethdev")
Fixes: f44e716377 ("net/octeontx2: add security session operations")

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-02-11 14:28:55 +01:00
Sunil Kumar Kori
f1ae60d696 common/octeontx2: add polling based response mbox message
Currently otx2_mbox_get_rsp_xxx get response once AF driver
interrupts after completion. But this function will get into
deadlock if called in another interrupt context.

To avoid it, implemented another version of this function which polls
on dedicated memory for a given timeout.

Also after clearing interrupt, there could UP messages available for
processing. So irq handler must check mbox messages.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-06 16:35:40 +01:00
Sunila Sahu
98e763bb12 common/cpt: remove self assignment
This fixes coverity issue of self assignment.

Coverity issue: 353635
Fixes: 99faef8325 ("crypto/octeontx: support ECPM")

Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2020-02-05 15:29:14 +01:00
Archana Muniganti
0022ae1eb8 common/cpt: fix component for empty IOV buffer
fill_sg_comp_from_iov() prepares gather components for i/p IOV
buffers and extra buf. This API is failing to create a gather component
for extra_buf when IOV buf len is zero. Though there is enough space
to accommodate extra_buf, because of pre-decrementing of extra_buf
length from aggregate size, this issue is seen.

Fixes: b74652f3a9 ("common/cpt: add microcode interface for encryption")
Cc: stable@dpdk.org

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2020-02-05 15:29:14 +01:00