Renamed sgl_cookie to cookie and qp_gen_config
to qat_gen_config, as it is intended to hold
more than just queue pair data.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
As bundle_num is included in qat_gen1_qps static array
there shouldn't be a multiplier used in qat_qps_per_service()
Then removed ADF_NUM_BUNDLES_PER_DEV as no longer used.
Also renamed ADF_MAX_QPS_PER_BUNDLE to ADF_MAX_QPS_ON_ANY_SERVICE
and reduced from 4 to 2 which is enough for all current devices.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Add lock around accesses to the arbiter CSR
and use & instead of ^ as ^ not safe if
arb_disable called when already disabled.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Move all code into appropriate files, no actual code changes. Specifically:
- Rename rte_qat_cryptodev.c to qat_sym_pmd.c
- Create qat_sym_pmd.h and populate with fn prototypes for qat_sym_pmd.c
- Create qat_comp_pmd.c/.h and populate with placeholder functions
- Create qat_asym_pmd.c/.h and populate with placeholder functions
- Rename qat_crypto_capabilities.h to qat_sym_capabilities.h
- Move CRYPTODEV_NAME_QAT_SYM_PMD from qat_common.h to qat_sym_pmd.h
- Move qat_sym_dev_private from qat_device.h to qat_sym_pmd.h
- Move prototype for qat_sym_dev_info_get frm qat_device.h 2 qat_sym_pmd.h
- Move all qat_device.c sym dev_ops fns to qat_sym_pmd.c file
- Move all qat_sym.c dev_ops fns to qat_sym_pmd.c file
- Remove unused header file #includes from all files.
- Move pci_id_qat_map, probe/release/register from
rte_qat_cryptodev.c to qat_device.c
- Moved stray comment for bpi_cipher_ctx_init() from qat_sym.c
to qat_sym_session.c
- Changed all files to use SPDX license header
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Split qat_sym_stats_get/reset into 2 functions, a wrapper function calling
a new qat_stats_get/reset function which can be called per service.
Remove cryptodev stats struct from qat_qp, replace with qat_common_stats.
Add links for qat_qp into qat_pci_device using an array per service to
avoid need for a lock and so qp_id for the service can be used as index.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Struct qat_pmd_private held the data needed by cryptodev, common code
now gets most data from struct qat_pci_device instead. qat_pmd_private
is trimmed to hold only sym crypto data and renamed qat_sym_private
to reflect its usage.
Specifically
- remove max_nb_queue_pairs from qat_pmd_private, get from qp_hw_data
- remove max_nb_sesssions from qat_pmd_private as not needed.
- remove qat_gen from qat_pmd_private, get from qat_pci_device instead.
- use qat_pci_device throughout common code instead of qat_pmd_private
- rename qat_pmd_private to qat_sym_dev_private - this now holds only
sym-specific data for the cryptodev API
- extend pci device name to <bdf>_qat for clarity, was just <bdf>
- update qp mem and cookiepool names to reflect the appropriate device,
service and qp.
- rename qat_dev_info_get() to qat_sym_dev_info_get() as mostly sym,
not enough common info to warrant a generic fn.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
The QAT PMD used to register with PCI using the name "crypto_qat".
Keep this name for the driver registered with cryptodev
and use a more generic name "qat" for the PCI registration.
This paves the way for the PCI device to host other services.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
- Added struct qat_pci_device to use internally in QAT PMD
to avoid dependencies on rte_cryptodev or rte_compressdev
- Added a global array of these
- Restructured probe/release to separate QAT common init/clear
from crypto pmd create/destroy.
- In QAT common part allocated a qat_pci_device and populated it
- Removed meaningless check in probe for RTE_PROC_PRIMARY
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Create data structures to support different generations
of qat hardware supplying services through different queue pairs.
- Add two new structs qat_gen_hw_data and qat_qp_hw_dat
- Add a qat_service_type enum
An array of qat_qp_hw_data elements is
initialised with constants, these are arranged so that the qp_id used
on the API can be used as an index to pick up the qp data to use.
The constants are common to current generations,
new arrays will be added for future generations.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Move defines related to coalescing from sym header file to qp header
file as these will be common for all services.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Remove dependence on rte_cryptodev from common qp code
to facilitate being used by other device types in future.
Transferred required data into qat-specific structures.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Extracted all sym-specific code from qp setup fns, leaving
generic qat_qp_setup fn and helper fns. Created a new
meta-data struct qat_qp_config to hold all the data needed
to create a qp, filled this out in the sym-specific code
and passed to the generic qp_setup fn.
No need now for rx and tx queue_create fns, one generic
queue_create fn replaces these.
Included the service name (e.g. "sym") in the qp memzone
and cookie pool names.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Move the generic enqueue and dequeue fns from
the qat_sym.c file to the qat_qp.c file
Move generic qp structs to a new qat_qp.h file
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Queue-handling code in dequeue is made generic, so it can
be used by other services in future. This is done by
- Removing all sym-specific refs in input params - replace with void ptrs.
- Wrapping this generic dequeue with the sym-specific dequeue
called through the API.
- extracting the sym-specific response processing into a new fn.
- Setting a fn ptr for process_response in qp on qp creation
- Passing void * params to this, in the service-specific implementation
qat_sym_process_response cast back to sym structs.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Queue-handling code in enqueue is made generic, so it can
be used by other services in future. This is done by
- Removing all sym-specific refs in input params - replace with void ptrs.
- Wrapping this generic enqueue with the sym-specific enqueue
called through the API.
- Setting a fn ptr for build_request in qp on qp creation
- Passing void * params to this, in the service-specific implementation
qat_sym_build_request cast back to sym structs.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
This commit renames qat_crypto.c/h to qat_sym.c/h
And makes a few whitespace changes to resolve line-length
issues.
Signed-off-by: Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
This commit adds qat_sym_session.c/h files and moves objects
from qat_algs_build_desc and qat_algs.h
Following objects were moved:
qat_adf/qat_algs_build_desc.c => qat_sym_session.c
- all objects -
qat_adf/qat_algs.h => qat_sym_session.h
- enum qat_crypto_proto_flag
- struct qat_alg_cd
- struct qat_session
- int qat_get_inter_state_size()
- int qat_alg_aead_session_create_content_desc_cipher()
- int qat_alg_aead_session_create_content_desc_auth()
- void qat_alg_init_common_hdr()
- int qat_alg_validate_aes_key()
- int qat_alg_validate_aes_docsisbpi_key()
- int qat_alg_validate_snow3g_key()
- int qat_alg_validate_kasumi_key()
- int qat_alg_validate_3des_key()
- int qat_alg_validate_des_key()
- int qat_cipher_get_block_size()
- int qat_alg_validate_zuc_key()
-- all macros
qat_crypto.h => qat_sym_session.h
int qat_crypto_sym_configure_session()
int qat_crypto_set_session_parameters()
int qat_crypto_sym_configure_session_aead()
int qat_crypto_sym_configure_session_cipher()
int qat_crypto_sym_configure_session_auth()
int qat_alg_aead_session_create_content_desc_cipher()
int qat_alg_aead_session_create_content_desc_auth()
static struct rte_crypto_auth_xform qat_get_auth_xform()
static struct rte_crypto_cipher_xform qat_get_cipher_xform()
Signed-off-by: Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
This commit removes unused includes from qat_crypto.c
Signed-off-by: Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
rte_cryptodev_pmd_init_params should use NUMA node of the QAT device
for its socket_id rather than the socket_id of the initializing process.
Signed-off-by: Lee Roberts <lee.roberts@hpe.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Pass an rte_driver to the RTE_PMD_REGISTER_CRYPTO_DRIVER macro
rather than an unspecified container which holds an rte_driver.
All the macro actually needs is the rte_driver, not the
container holding it.
This paves the way for a later patch in which a driver
will be registered which does not naturally derive from a
container and so avoids having to create an arbitrary container
to pass in the rte_driver.
This patch changes the cryptodev lib macro and all the
PMDs which use it.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Akhil Goyal <akhil.goyal@nxp.com>
There are several func calls to rte_zmalloc() which don't do null
point check on the return value. And before return, the memory is not
freed. Fix it by adding null point check and rte_free().
Fixes: 1703e94ac5ce ("qat: add driver for QuickAssist devices")
Fixes: e09231eaa2af ("crypto/qat: add SGL capability")
Cc: stable@dpdk.org
Signed-off-by: Yong Wang <wang.yong19@zte.com.cn>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: Keith Wiles <keith.wiles@intel.com>
Acked-by: Luca Boccassi <luca.boccassi@gmail.com>
Issue detected by coverity. Could never actually cause a
problem as truncated value (0x7f7f7f7f->0x7f) is what's needed.
But fix in code for correctness.
Coverity issue: 194998
Fixes: 571365dd4c5e ("crypto/qat: enable Rx head writes coalescing")
Cc: stable@dpdk.org
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
If auth algorithm is RTE_CRYPTO_AUTH_NULL and digest_length is 0
in the xform and digest pointer is set in the op, then
the PMD may overwrite memory at the digest pointer.
With this patch the memory is not overwritten.
Fixes: db0e952a5c01 ("crypto/qat: add NULL capability")
Cc: stable@dpdk.org
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
This commit fixes right cast from qat_cipher_get_block_size
function. This function can return -EFAULT in case of
any error, and that value must be cast to int instead of uint8_t
Fixes: d18ab45f7654 ("crypto/qat: support DOCSIS BPI mode")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
This commit fixes
- bpi_cipher_encrypt to prevent before 'array subscript is
above array bounds' error
- bpi_cipher_decrypt to prevent before 'array subscript is
above array bounds' error
Fixes: d18ab45f7654 ("crypto/qat: support DOCSIS BPI mode")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Replace the BSD license header with the SPDX tag for files
with only an Intel copyright on them.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Renamed data type from phys_addr_t to rte_iova_t.
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Reviewed-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
The following inline functions and macros have been renamed to be
consistent with the IOVA wording:
rte_mbuf_data_dma_addr -> rte_mbuf_data_iova
rte_mbuf_data_dma_addr_default -> rte_mbuf_data_iova_default
rte_pktmbuf_mtophys -> rte_pktmbuf_iova
rte_pktmbuf_mtophys_offset -> rte_pktmbuf_iova_offset
The deprecated functions and macros are kept to avoid breaking the API.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
The function rte_mempool_virt2phy() is renamed to rte_mempool_virt2iova().
The new function has one less parameter because it is unused.
The deprecated function is kept as an alias to avoid breaking the API.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
The struct rte_memzone field .phys_addr is renamed to .iova.
The deprecated name is kept in an anonymous union to avoid breaking
the API.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
The memzone header is often included without good reason.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
The PCI lib defines the types and methods allowing to use PCI elements.
The PCI bus implements a bus driver for PCI devices by constructing
rte_bus elements using the PCI lib.
Move the relevant code out of the EAL to its expected place.
Libraries, drivers, unit tests and applications are updated to use the
new rte_bus_pci.h header when necessary.
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Removes any dependency of librte_cryptodev on the PCI device
infrastructure code and removes the functions which were virtual
device specific.
Updates QAT crypto PMD to remove dependencies on rte_cryptodev_pci.h
and replaces those calls with the new bus independent functions.
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
For HMAC algorithms (MD5-HMAC, SHAx-HMAC), the supported
digest sizes are not a fixed value, but a range between
1 and the maximum digest size for those algorithms.
Fixes: 26c2e4ad5ad4 ("cryptodev: add capabilities discovery")
Cc: stable@dpdk.org
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>
The list of libraries in LDLIBS was generated from the DEPDIRS-xyz
variable. This is valid when the subdirectory name match the library
name, but it's not always the case, especially for PMDs.
The patches removes this feature and explicitly adds the proper
libraries in LDLIBS.
Some DEPDIRS-xyz variables become useless, remove them.
Reported-by: Gage Eads <gage.eads@intel.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Don't write CSR tail until we processed enough TX descriptors.
To avoid crypto operations sitting in the TX ring indefinitely,
the "force write" threshold is used:
- on TX, no tail write coalescing will occur if number of inflights
is below force write threshold
- on RX, check if we have a number of crypto ops enqueued that is
below force write threshold that are not yet submitted to
processing.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
