Splitting Queue Groups into UL/DL Groups in Turbo Software
Driver. They are independent for Decode/Encode.
Release note updated accordingly.
Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
New test created to measure offload cost.
Changes were introduced in API, turbo software driver
and test application
Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
Support for optional CRC overlap in decode processing implemented
in Turbo Software driver
Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
Sizes of the internal buffers used by decoding were increased due to
problem with memory for large vectors
Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
Update Turbo Software driver for Wireless Baseband Device:
- function scaling input LLR values to specific range [-16, 16] added
- new test vectors to check device capabilities added
- release note updated accordingly
Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
Optimization of Turbo Software driver by limiting or changing
usage of memory copying function.
Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
Adjusting BaseBand drivers code to changes in FlexRAN 1.4.0:
- update usage of crc functions after API changes
Update the documentation describing Wireless Baseband Device:
- FlexRAN releases mapping table added
- download and build instructions for BBDEV turbo_sw driver in
compliance with FlexRAN 1.4.0 release added
Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
fle is already in virtual addressing mode - no need to perform
address conversion for it.
Fixes: 8d1f3a5d75 ("crypto/dpaa2_sec: support crypto operation")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
If private context creation fails, the memory
allocated for it and for some of the rings created
was being leaked.
In case of failure, it must be freed.
Fixes: 4c07e0552f ("crypto/scheduler: add multicore scheduling mode")
Cc: stable@dpdk.org
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Picking a company stock ticker for a PMD name might not be a best approach
in a long run since name is too generic.
This patch addresses that and renames mrvl to mvsam.
Signed-off-by: Natalie Samsonov <nsamsono@marvell.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
This patch defines capabilities & functions to be called
for eventdev PMDs.
Signed-off-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Removing use of link data under evq_info_t structure which was
used to check whether the the associated evq has been linked
or not. Since, an evq can be linked to multiple event ports,
thus setting the link variable only allowed the first event
port to be associated with the evq. This led to huge performance
drop in case of multiple event ports as I/O only worked on
first event port associated with the evq.
Fixes: 0ce3ce7c27 ("event/dpaa2: add configuration functions")
Cc: stable@dpdk.org
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Driver shouldn't take decision on signals received. The return
from epoll was blocking on EINTR which is not the right use-case.
Fixes: 36d87bb922 ("event/dpaa2: handle timeout using interrupts in dequeue")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Clang 6 & 7 fail to naturally align packed structs due to this clang
can't use 8byte atomic primitives and splits them into lesser atomic
primitives. To use lesser atomic primitives we need to link libatomic
(-latomic), instead supply alignment attribute to the compiler.
timvf_worker.c:(.text+0x498): undefined reference to `__atomic_fetch_add_8'
timvf_worker.c:(.text+0x525): undefined reference to `__atomic_store_2'
timvf_worker.c:(.text+0x557): undefined reference to `__atomic_fetch_add_4'
timvf_worker.c:(.text+0x5de): undefined reference to `__atomic_store_2'
Fixes: f874c1eb15 ("event/octeontx: create and free timer adapter")
Reported-by: Andrew Rybchenko <arybchenko@solarflare.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
WRED thresholds can be specified in bytes if the TM leaf
node supports it. Also extend WRED thresholds to 32 bits from 16.
TM capability (port/level/queue) fields cman_wred_packet_mode_supported and
cman_wred_byte_mode_supported, when non-zero, indicate support for WRED
thresholds in packets and bytes respectively.
The packet_mode member of struct rte_tm_wred_params, when non-zero,
indicates that the min and max thresholds are specified in
packets and when zero, indicates that the min and max thresholds
are specified in bytes.
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
It may be useful to pass arbitrary data to the callback (such
as device pointers), so add this to the mem event callback API.
Suggested-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>
The DPCI devices have both Tx and Rx queues. Event devices use
DPCI Rx queues only, but CMDIF (AIOP) uses both Tx and Rx queues.
This patch enables Tx queues configuration too.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
There are two API's which are required by NXP specific Command Interface
Application (AIOP CMDIF). This patch exposes these two API's.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
DPAA2 QDMA driver uses MC DPDMAI object. This driver enables
the user (app) to perform data DMA without involving CPU in
the DMA process
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
'dpdmai' devices detected on fsl-mc bus are represented by DPAA2 QDMA
devices in DPDK.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Initialise rte_ethdev_args parameters to zero to handle
the case where no devargs are passed to the IXGBE PF on
device probe, so that there is no invalid attempts to create
representor ports.
Coverity Issue: 277231
Fixes: cf80ba6e20 ("net/ixgbe: add support for representor ports")
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Changes introduced by cf80ba6e20 modified the default name generated
for the IXGBE PF PMD, this patch reverts the default name to the
original PCI BDBF.
Fixes: cf80ba6e20 ("net/ixgbe: add support for representor ports")
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Stored register value to enable jumbo frame was always
overwritten. Assigning value based on rx_buf_size.
Coverity issue: 277239
Fixes: 7c4158a5b5 ("net/axgbe: add DMA programming and start/stop")
Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
Since we move to new offload APIs, txq_flags is no long needed.
This patch remove the dependence on that.
Fixes: 7497d3e2f7 ("net/i40e: convert to new Tx offloads API")
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Ethdev RX offloads API has changed since: commit ce17eddefc
("ethdev: introduce Rx queue offloads API")
This patch adopts the new RX Offload API in vmxnet3 driver.
Signed-off-by: Louis Luo <llouis@vmware.com>
Acked-by: Yong Wang <yongwang@vmware.com>
The Tx function selection code in the driver only used the older txq
flags values to check whether the scalar or vector functions should be
used. This caused performance regressions with testpmd io-fwd as the
scalar path rather than the vector one was being used in the default
case. Fix this by changing the code to take account of new offloads and
deleting the defines used for the old ones.
Fixes: 7497d3e2f7 ("net/i40e: convert to new Tx offloads API")
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Changes introduced by e0cb96204b modified the default name generated
for the i40e PF PMD, this patch reverts the default name to the
original PCI BDF.
Fixes: e0cb96204b ("net/i40e: add support for representor ports")
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Linux 4.15 and 4.16 may report inner RSS as a supported capability of the
device, however it can't be used due to missing code in the kernel.
This triggers an error when creating the default hash QP and prevents this
PMD from starting up without a prior call to rte_flow_isolate().
Fixes: 55e8991e31 ("net/mlx4: restore inner VXLAN RSS support")
Cc: stable@dpdk.org
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Using special types value -1 with mlx4_conv_rss_types() is supposed to
return a supported set of Verbs RSS hash fields, that is, priv->hw_rss_sup
unmodified.
Due to the way this function is written and because it is also used to
initially populate priv->hw_rss_sup however, this special value works
properly only once and fails with ENOTSUP errors afterward.
This problem can be seen when re-creating default flows (e.g. by entering
and leaving isolated mode).
Fixes: 024e87bef4 ("net/mlx4: restore UDP RSS by probing capabilities")
Cc: stable@dpdk.org
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
When creation of a flow rule fails during dev_start(), the usage count of
the common RSS context is not decremented, which triggers an assertion
failure in debug mode during dev_close().
This is addressed by tracking the initialization status of the common RSS
context in order to add missing cleanup code.
A similar issue exists in mlx4_rxq_attach(), where usage count is
incremented on a Rx queue but not released in case of error. This may lead
to the above issue since RSS contexts created by flow rules attach
themselves to Rx queues, incrementing their usage count.
Fixes: 5697a41421 ("net/mlx4: relax Rx queue configuration order")
Cc: stable@dpdk.org
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Flow director rules matching traffic properties above layer 2 do not
target a fixed hash Rx queue (HASH_RXQ_ETH), it actually depends on the
highest protocol layer specified by each flow rule.
mlx5_fdir_filter_delete() makes this wrong assumption and causes a crash
when attempting to destroy flow rules with L3/L4 specifications.
Fixes: 4c3e9bcdd5 ("net/mlx5: support flow director")
Cc: stable@dpdk.org
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
With Hotplugging memory support, the order of memseg has been changed
from physically contiguous to virtual contiguous. DPAA bus and drivers
depend on PA to VA address conversion for I/O.
This patch creates a list of blocks requested to be pinned to the
DPAA mempool. For searching physical addresses, it is expected that
it would belong to this list (from hardware pool) and hence it is
less expensive than memseg walks. Though, there is a marginal drop
in performance vis-a-vis the legacy mode with physically contiguous
memsegs.
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
With Hotplugging memory support, the order of memseg has been changed
from physically contiguous to virtual contiguous. FSLMC bus and dpaa2
drivers depend on PA to VA address conversion when in Physical
addressing mode.
This patch creates a list of blocks requested to be pinned to the
DPAA2 mempool. For searching physical addresses, it is expected that
it would belong to this list (from hardware pool) and hence it is
less expensive than memseg walks. Though, this has marginal impact on
performance vis-a-vis legacy mode with physically contiguous memsegs.
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
