Commit Graph

865 Commits

Author SHA1 Message Date
Tejasree Kondoj
07d4bde1c0 common/cnxk: support tunnel header verification
Added support to verify tunnel header in IPsec inbound.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-28 17:49:10 +02:00
Anoob Joseph
c4fcfaa742 common/cnxk: support lifetime configuration
Add support for SA lifetime configuration. Expiry can
be either in units of octets or packets.

Also, updated cryptodev dequeue path to update crypto op result to
indicate soft expiry.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-28 14:12:14 +02:00
David George
c9902a15bd common/cpt: rework pending queue
Replace pending queue with one that allows concurrent single producer and
single consumer. This relaxes the restriction of only allowing a single
lcore to operate on a given queue pair.

Signed-off-by: David George <david.george@sophos.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2021-09-28 08:43:57 +02:00
Thomas Monjalon
70d2f42110 doc: remove references to the old build system
Some docs and comments in Meson files are still mentioning
the old build system based on "make", removed in 20.11.
After one year, such references are better to be removed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2021-09-23 08:45:10 +02:00
Haiyue Wang
db46ff4482 common/iavf: update base driver version
Update the driver version to trace the change.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:47:33 +02:00
Haiyue Wang
146bf0916c common/iavf: remove flow director query opcode
The VIRTCHNL_OP_QUERY_FDIR_FILTER opcode is not used, so remove it.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:47:27 +02:00
Alvin Zhang
67edb141b9 common/iavf: enable hash calculation based on L4 checksum
Add TCP/UDP/SCTP header checksum field selectors, they can be used in
creating FDIR or RSS rules related to TCP/UDP/SCTP header checksum.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:47:05 +02:00
Junfeng Guo
e0c765fec8 common/iavf: add QFI fields for GTPU UL and DL
The QFI is 6-bit "QoS Flow Identifier" within the GTPU Extension Header.
Add virtchnl fields QFI of GTPU UL/DL for supporting the AVF FDIR.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:46:47 +02:00
Harman Kalra
02719901d5 common/cnxk: send link status event to VF
Currently link event is only sent to the PF by AF as soon as it comes
up, or in case of any physical change in link. PF will broadcast
these link events to all its VFs as soon as it receives it.
But no event is sent when a new VF comes up, hence it will not have
the link status.
Adding support for sending link status to the VF once it comes up
successfully.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:28:51 +02:00
Satheesh Paul
8ca851cdc5 common/cnxk: support dual VLAN insert and strip actions
Add ROC API to configure dual VLAN tag addition and removal.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:28:02 +02:00
Aman Deep Singh
a7db3afce7 net: add macro to extract MAC address bytes
Added macros to simplify print of MAC address.
The six bytes of a MAC address are extracted in
a macro here, to improve code readablity.

Signed-off-by: Aman Deep Singh <aman.deep.singh@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-07 19:08:05 +02:00
Aman Deep Singh
c2c4f87b12 net: add macro for MAC address print
Added macro to print six bytes of MAC address.
The MAC addresses will be printed in upper case
hexadecimal format.
In case there is a specific check for lower case
MAC address, the user may need to make a change in
such test case after this patch.

Signed-off-by: Aman Deep Singh <aman.deep.singh@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-07 19:07:46 +02:00
Srujana Challa
0489d26064 common/cnxk: fix attaching NPA LF to CPT VF
ATTACH_RESOURCES mailbox for CPT LFs is being called without
setting modify bit. Because of this previously attached NPA LF
to the CPT VF is getting removed, when only CPT VF is whitelisted.
This patch fixes the same.

Fixes: c045d2e5cb ("common/cnxk: add CPT configuration")
Cc: stable@dpdk.org

Signed-off-by: Srujana Challa <schalla@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 13:59:02 +02:00
Gagandeep Singh
c0182d6b75 common/dpaax/caamflib: fix IV for short MAC-I in SNOW3G
The logic was incorrectly doing conditional swap. It need to
be bit swap always.

Fixes: 73a24060cd ("crypto/dpaa2_sec: add sample PDCP descriptor APIs")
Cc: stable@dpdk.org

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:10:43 +02:00
Franck Lenormand
81eb760d22 common/dpaax/caamflib: remove some inline keys
The space in descriptor buffer is scarce as it is limited to
64 words for platforms except ERA10 (which has 128).

As the descriptors are processed with QI, it adds some words
to the descriptor which is passed.

Some descriptors used for SDAP were using too much words reaching
the limit.

This patch reduces the number of words used by removing the inlining
of some keys (done for performance) in order to have working
descriptors.

Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:10:43 +02:00
Franck Lenormand
8aa1a67c47 common/dpaax/caamflib: remove DPOVRD clear for SDAP
For SDAP, we are not using the protocol operation to perform
4G/LTE operation so the DPOVRD option is not used.

Removing it save some space in the descriptor buffer and
execution time.

Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:09:29 +02:00
Franck Lenormand
7f9d9170f2 common/dpaax/caamflib: load correct HFN from desc buffer
The offset of the HFN word and Bearer/Dir word is different
depending on type of PDB.

The wrong value was used.

This patch address this issue

Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:08:38 +02:00
Archana Muniganti
b07ee12f3a common/cnxk: add cn9k IPsec microcode defines
Microcode IE opcodes support IPsec operations. Add defines
and structs defined by microcode.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-09-07 19:54:12 +02:00
Anoob Joseph
b5a96164a8 common/cnxk: update to v1.16 ucc codes
Update to v1.16 microcode completion codes.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Vidya Sagar Velumuri
a07d1d4dd9 common/cnxk: update to v1.13 ZUC API
Add support for ZUC API change in ucode 1.13

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Shijith Thotton
044bb99d6f common/cnxk: add function to check CPT IQ is full
Added flow control based check to determine CPT IQ is full.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Archana Muniganti
80d56d2d35 common/cnxk: make IPsec defines common
Make IPsec defines common and remove redundant macros.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Tejasree Kondoj
9b4a4cc0e7 crypto/cnxk: support lookaside IPsec
Added lookaside IPsec AES-CBC-HMAC-SHA1
support to cnxk driver.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:44:03 +02:00
Tejasree Kondoj
d85f9749f9 common/cnxk: add hash generation API
Adding functions for hash generation that can be used
in hmac opad/ipad calculation.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-03 17:00:22 +02:00
Shiri Kuzin
3b48087a8a net/mlx5: update GENEVE TLV option matching
The GENEVE TLV option matching is done using a flex parser.

Recent update in firmware, requires that in order to match on the
GENEVE TLV option the "geneve_tlv_option_0_exist" bit should be set.

Add the new "geneve_tlv_option_0_exist" setting when translating the
GENEVE TLV option item.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-22 10:09:11 +02:00
Jerin Jacob
1539acc20a drivers: remove warning with Meson 0.59
Since meson 0.59.0 version, the extract_all_objects() API
need to pass explicit boolean value.

To remove the following warning[1], added explicit `true` for
extract_all_objects() use in codebase whever there is
no argument.

[1]
WARNING: extract_all_objects called without setting recursive
keyword argument. Meson currently defaults to
non-recursive to maintain backward compatibility but
the default will be changed in the future.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-08-27 15:51:34 +02:00
Thomas Monjalon
fdab8f2e17 version: 21.11-rc0
Start a new release cycle with empty release notes.

The ABI version becomes 22.0.
The map files are updated to the new ABI major number (22).
The ABI exceptions are dropped and CI ABI checks are disabled because
compatibility is not preserved.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2021-08-17 08:37:52 +02:00
Kiran Kumar K
8cd5064c46 common/cpt: update asymmetric ECDSA messages
Adding changes to asymmetric ECDSA messages to align with
the new ucode for octeontx2 device.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-30 20:57:23 +02:00
Kiran Kumar K
f4d66aef98 common/cnxk: add constants to EC groups
New ucode expects const values A and B for asymmetric ECDSA
messages. Adding roc support for this.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-30 20:57:23 +02:00
Ivan Malov
08b3a170cb common/sfc_efx/base: do not validate MAE action COUNT order
In DPDK + Open vSwitch use case, action COUNT is always the
first one to be added. In particular, it goes before action
DECAP in that use case. The current code enforces the right
order (DECAP goes before COUNT), and this provokes failures.
As an exception, do not validate the order for action COUNT.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-07-30 13:14:50 +02:00
Bing Zhao
8a0fca1101 net/mlx5: fix meter profile validation
After the support for yellow color and RFC2698 & RFC4115 were added,
the profile validation adjustment was missed. With this fix, the
validation is like below:
  1. Legacy metering only supports RFC2697 without EBS.
  2. ASO metering can support all three profiles.
  3. For backward compatibility, none EBS with RFC2697 profile is
     still supported and the checking is done in the meter
     creation stage.

In the meanwhile, some checking which was done in the parameters
calculation stage is moved in the validation in order to skip the
useless checking.

Fixes: 33a7493c8d ("net/mlx5: support meter for trTCM profiles")

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-29 22:03:14 +02:00
Tomasz Duszynski
59cdf6907b common/cnxk: support setting BPHY CGX/RPM FEC
Add support for setting FEC for a given LMAC.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
2021-07-23 00:25:34 +02:00
Tomasz Duszynski
7ab475a029 common/cnxk: support reading BPHY CGX/RPM FEC
Before setting FEC for specific LMAC one needs to know which type is
actually supported because it generally differs between modes
LMAC operates in (SGMII, SFI, etc.).

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
2021-07-22 22:08:44 +02:00
Dong Zhou
96f85ec489 net/mlx5: check VLAN push/pop support
For ConnectX-6 in FDB domain, pop and push VLAN
on both ingress and egress directions are supported.

For ConnectX-6 in NIC domain, and ConnectX-5 in both FWD and NIC domain,
pop VLAN is only supported on ingress direction,
push VLAN is only supported on egress direction.

Signed-off-by: Dong Zhou <dongzhou@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-22 15:40:01 +02:00
Bing Zhao
33a7493c8d net/mlx5: support meter for trTCM profiles
The support of RFC2698 and RFC4115 are added in mlx5 PMD. Only the
ASO metering supports these two profiles.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-22 13:29:01 +02:00
Xueming Li
d3c521265e common/mlx5: remove legacy PCI driver
Clean up legacy PCI bus driver since all mlx5 PMDs are moved
to the new bus-agnostic driver interface.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-22 00:16:47 +02:00
Thomas Monjalon
4d567938be common/mlx5: get PCI device address from any bus
A function is exported to allow retrieving the PCI address
of the parent PCI device of a Sub-Function in auxiliary bus sysfs.
The function mlx5_dev_to_pci_str() is accepting both PCI and auxiliary
devices. In case of a PCI device, it is simply using the device name.

The function mlx5_dev_to_pci_addr(), which is based on sysfs path
and do not use any device object, is renamed to mlx5_get_pci_addr()
for clarity purpose.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-22 00:11:14 +02:00
Xueming Li
777b72a933 common/mlx5: support auxiliary bus
Add auxiliary bus support for Sub-Function.

As a limitation of current driver, NUMA node of device is detected
from PCI bus of device sysfs symbol link.
It will be removed once NUMA node file will be available in sysfs.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-22 00:11:14 +02:00
Thomas Monjalon
67350881e0 common/mlx5: move description of PCI sysfs functions
The Linux-specific functions mlx5_get_pci_addr() and
mlx5_get_ifname_sysfs() are better described in the .h file.

The requirement for using mlx5_get_pci_addr() is made explicit:
the node /device must exist in the provided sysfs path.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-22 00:11:14 +02:00
Xueming Li
ad435d3204 common/mlx5: add bus-agnostic layer
To support auxiliary bus, introduces common device driver and callbacks,
supposed to replace mlx5 common PCI bus driver.

Mlx5 class drivers, i.e. eth, vDPA, regex and compress normally consumes
single Verbs device context to probe a device. The Verbs device comes
from PCI address if the device is PCI bus device, from Auxiliary sysfs
if the device is auxiliary bus device. Currently only PCI bus is
supported.

Common device driver is a middle layer between mlx5 class drivers and
bus, resolve and abstract bus info to Verbs device for class drivers.
Both PCI bus driver and Auxiliary bus driver can utilize the common
driver layer to cast bus operations to mlx5 class drivers.

Legacy mlx5 common PCI bus driver still being used by mlx5 eth, vDPA,
regex and compress PMD, will be removed once all PMD drivers
migrate to new common driver.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-22 00:11:11 +02:00
Xueming Li
a99f2f9054 common/mlx5: rename ethernet device class
To align with EAL class driver, rename internal class name
from "net" to "eth"

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-21 22:59:03 +02:00
Shiri Kuzin
a7c86884f1 crypto/mlx5: introduce Mellanox crypto driver
Add a new PMD for Mellanox devices- crypto PMD.

The crypto PMD will be supported starting Nvidia ConnectX6 and
BlueField2.

The crypto PMD will add the support of encryption and decryption using
the AES-XTS symmetric algorithm.

The crypto PMD requires rdma-core and uses mlx5 DevX.

This patch adds the PCI probing, basic functions, build files and
log utility.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 21:45:58 +02:00
Srujana Challa
5c7704712d common/cnxk: support UDP encapsulation
Adds support for UDP encapsulation in crypto_cn10k
PMD.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Anoob Joseph
db06451baf common/cpt: allocate auth key dynamically
Reduce session private data size by allocating
auth_key dynamically as required. Added auth_key_iova
to eliminate any impact on fastpath.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Anoob Joseph
252947b950 common/cnxk: allocate auth key dynamically
Reduce session private data size by allocating
auth_key dynamically as required.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Ankur Dwivedi
3bf8783955 common/cnxk: move instruction queue enable to ROC
The code for enabling instruction queue is moved to ROC API.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
960ff4d665 common/qat: add service discovery
This commit adds service discovery to generation four
of Intel QuickAssist Technology devices.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
c546d6e3d4 common/qat: reset ring pairs before setting GEN4
This commit resets ring pairs of particular vf before
setting PMD.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
b17d16fb47 common/qat: add PF to VF communication
Add communication between physical device and virtual function
in Intel QucikAssist Technology PMD.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
d05492913e crypto/qat: support GEN4 unified cipher slice
This commit adds unified cipher slice(UCS) to Intel QuickAssist
Technology PMD and enables AES-CTR algorithm.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00