Added code to allocate VSI queue contexts to save the queue specific
information like bandwidth etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Add below APIs in switch module
1. ice_aq_get_vsi_params - get VSI context info
2. ice_aq_add_update_mir_rule - add/update mirror rule
3. ice_aq_delete_mir_rule - delete mirror rule
4. ice_aq_set_storm_ctrl - set storm control configuration
5. ice_aq_get_storm_ctrl - get storm control configuration
PMD can use these APIs to enable mirror rule and storm control
related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Remove static of below functions and declare them as external
APIs.
ice_aq_add_vsi
ice_aq_free_vsi
ice_aq_update_vsi
ice_aq_add_lan_txq
ice_init_pkg
So far the purpose is just to sync with kernel driver.
They are reserved for future use.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Remove unnecessary macro and data structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
For components that make a copy of an external pipeline package file
(i.e. the Linux and FreeBSD drivers), save the size of the package
file along with the copy so that both can be used when calling
ice_init_pkg() after a CORER/GLOBR reset.
Also, do not free the copy of the package file in ice_init_pkg()
since it is needed afterward for subsequent resets.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
1. Add macro ice_for_each_traffic_class to loop for each
traffic class.
2. Add macro MIN_T to wrap min with type conversion.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Add two helper functions in common module.
1. ice_aq_set_mac_cfg to help configure maximum frame size with AQ
command
2. ice_get_ctx help to extract context bits from a packet structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Improve comments to follow naming rules.
Also the patch include some minor cleanup.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Add two APIs ice_alloc_sw and ice_free_sw to support
switch related resource allocation and free.
These APIs are required when we enable switch flow.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Free flow profile entries when free HW tables.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Add the module that implemented flow abstraction that base on
flexible pipeline.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
The flexible pipeline module provide the infrastructure for ice's
flexible packet processing feature.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Added API ice_alloc_hw_res and ice_free_hw_res.
Added resource type macro.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Remove some unnecessary code.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Add some MACRO defination and small functions which
are specific for DPDK.
Add readme too.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the structures that define how the Rx/Tx queues
are used.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the structures and defines that define what
protocols the NIC can handle.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add various headers that define status codes and
basic defines for use in the code.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add code that multiple other features use.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add code to read/write/query the NVM image.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add code to handle the virtual switch within the NIC.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add code for the basic TX scheduler.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the structures for the control queues.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add all the device IDs that represent the NIC.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the commands, error codes, and structures
for the sideband queue.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the commands, error codes, and structures for
the admin queue.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the structures required by the NIC.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the registers that comprise the Intel(R) 800
Series NIC. There is no functionality in this patch.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
