1766 Commits

Author SHA1 Message Date
Bruce Richardson
b38480dc4e devtools: remove check-includes script
The check-includes script allowed checking header files in a given
directory to ensure that each header compiled alone without requiring
any other header inclusions.

With header checking now being done by the chkincs app in the build
system this script can be removed.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:37 +01:00
Bruce Richardson
05050ac4ce build: add header includes check
To verify that all DPDK headers are ok for inclusion directly in a C file,
and are not missing any other pre-requisite headers, we can auto-generate
for each header an empty C file that includes that header. Compiling these
files will throw errors if any header has unmet dependencies.

For some libraries, there may be some header files which are not for direct
inclusion, but rather are to be included via other header files. To allow
later checking of these files for missing includes, we separate out the
indirect include files from the direct ones.

To ensure ongoing compliance, we enable this build test as part of the
default x86 build in "test-meson-builds.sh".

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:37 +01:00
Bruce Richardson
2518704288 eventdev: make driver-only headers private
The rte_eventdev_pmd*.h files are for drivers only and should be private
to DPDK, and not installed for app use.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:09 +01:00
Bruce Richardson
df96fd0d73 ethdev: make driver-only headers private
The rte_ethdev_driver.h, rte_ethdev_vdev.h and rte_ethdev_pci.h files are
for drivers only and should be a private to DPDK and not installed.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Steven Webster <steven.webster@windriver.com>
2021-01-29 20:59:09 +01:00
Matan Azrad
384bac8d65 compress/mlx5: add supported capabilities
Add all the capabilities supported by the device.

Add the driver documentations.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-27 20:40:03 +01:00
Liang Ma
682a645438 power: add ethdev power management
Add a simple on/off switch that will enable saving power when no
packets are arriving. It is based on counting the number of empty
polls and, when the number reaches a certain threshold, entering an
architecture-defined optimized power state that will either wait
until a TSC timestamp expires, or when packets arrive.

This API mandates a core-to-single-queue mapping (that is, multiple
queued per device are supported, but they have to be polled on different
cores).

This design is using PMD RX callbacks.

1. UMWAIT/UMONITOR:

   When a certain threshold of empty polls is reached, the core will go
   into a power optimized sleep while waiting on an address of next RX
   descriptor to be written to.

2. TPAUSE/Pause instruction

   This method uses the pause (or TPAUSE, if available) instruction to
   avoid busy polling.

3. Frequency scaling
   Reuse existing DPDK power library to scale up/down core frequency
   depending on traffic volume.

Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
2021-01-29 15:29:48 +01:00
Bruce Richardson
762bfccc8a config: remove compatibility build defines
As announced in the deprecation note, remove all compatibility build
defines from previous make/meson versions and use only the standardized
ones - RTE_LIB_<name> for libraries, and RTE_<CLASS>_<NAME> for drivers.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-01-20 01:43:25 +01:00
Junfeng Guo
bb3386f348 net/ice: enable QinQ filter for switch
Enable the double VLAN support for switch QinQ filtering.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-19 13:49:41 +01:00
Jiawei Wang
bd49d1d343 net/mlx5: handle RSS action in sample
PMD validates the rss action in the sample sub-actions list,
then translates into rdma-core action and it will be used for sample
path destination.

If the RSS action is in both sample sub-actions list and original flow,
the rss level and rss type in the sample sub-actions list should be
consistent with the original flow list, since the expanding items
for RSS should be the same for both actions.

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-19 13:49:41 +01:00
Alexander Kozyrev
73b68f4c54 ethdev: introduce generic modify flow action
Implement the generic modify flow API to allow manipulations on
an arbitrary header field (as well as mark, metadata or tag) using
data from another field or a user-specified value.
This generic modify mechanism removes the necessity to implement
a separate RTE Flow action every time we need to modify a new packet
field in the future.

Supported operation are:
- set: copy data from source to destination.
- add: integer addition, stores the result in destination.
- sub: integer subtraction, stores the result in destination.

The field ID is used to specify the desired source/destination packet
field in order to simplify the API for various encapsulation models.
Specifying the packet field ID with the needed encapsulation level
is able to quickly get a packet field for any inner packet header.

Alternatively, the special ID (ITEM_START) can be used to point to
the very beginning of a packet. This ID in conjunction with the
offset parameter provides great flexibility to copy/modify any part of
a packet as needed.

The number of bits to use from a source as well as the offset can be
be specified to allow a partial copy or dividing a big packet field
into multiple small fields (e.g. copying 128 bits of IPv6 to 4 tags).

An immediate value (or a pointer to it) can be specified instead of the
level and the offset for the special FIELD_VALUE ID (or FIELD_POINTER).
Can be used as a source only.

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-01-19 03:30:32 +01:00
Hyong Youb Kim
8b428cb5a9 net/enic: use 64B completion queue entries if available
Latest VIC adapters support 64B CQ (completion queue) entries as well
as 16B entries available on all VIC models. 64B entries can greatly
reduce cache contention (CPU stall cycles) between DMA writes (Rx
packet descriptors) and polling CPU. The effect is very noticeable on
Intel platforms with DDIO. As most UCS servers are based on Intel
platforms, enable and use 64B CQ entries by default, if
available. Also, add devarg 'cq64' so the user can explicitly disable
64B CQ.

Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
2021-01-19 03:30:32 +01:00
Shiri Kuzin
2b4c72b4d1 ethdev: introduce GENEVE header TLV option item
The Geneve tunneling protocol is designed to allow the
user to specify some data context on the packet.
The GENEVE TLV (Type-Length-Variable) Option
is the mean intended to present the user data.

In order to support GENEVE TLV Option the new rte_flow
item "rte_flow_item_geneve_opt" is added.
The new item contains the values and masks for the
following fields:
-option class
-option type
-length
-data

New item will be added to testpmd to support match and
raw encap/decap actions.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-19 03:30:15 +01:00
Jiawen Wu
68436328b9 doc: update for txgbe
Add txgbe PMD new features in release notes,
update user guide in txgbe.rst for flow API and traffic manager.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-19 03:30:14 +01:00
Shiri Kuzin
06cd4cf63f net/mlx5: add GTP PSC item translation
This patch adds the translation function which
sets the qfi, PDU type.

The next extension header which indicates the following
extension header type is set to 0x85 - a PDU session
container.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-19 03:30:13 +01:00
Abhinandan Gujjar
1c3ffb9559 cryptodev: add enqueue and dequeue callbacks
This patch adds APIs to add/remove callback functions on crypto
enqueue/dequeue burst. The callback function will be called for
each burst of crypto ops received/sent on a given crypto device
queue pair.

Signed-off-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2021-01-19 18:05:44 +01:00
Ankur Dwivedi
61baeec468 crypto/octeontx2: support AES-CBC SHA256-128-HMAC
Support for aes-cbc sha256-128-hmac is added in lookaside protocol
mode. The functionality is verified using ipsec-secgw application.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2021-01-19 18:05:17 +01:00
Ankur Dwivedi
8f685ec2d5 crypto/octeontx2: support AES-CBC SHA1-HMAC
Support for aes-cbc sha1-hmac is added in lookaside protocol
mode. The functionality is verified using ipsec-secgw application.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2021-01-19 18:05:17 +01:00
Tejasree Kondoj
bab97a3ffb crypto/octeontx2: support CN98xx
CN98xx SoC comes up with two CPT blocks wrt
CN96xx, CN93xx, to achieve higher performance.

Adding support to allocate all LFs of VF with even BDF from CPT0
and all LFs of VF with odd BDF from CPT1.
If LFs are not available in one block then they will be allocated
from alternate block.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-01-19 18:05:17 +01:00
Tejasree Kondoj
5be562bc5b crypto/octeontx2: support IPsec ESN and anti-replay
Adding ESN and anti-replay support for lookaside IPsec.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-01-19 18:05:17 +01:00
Liang Ma
1fe3eef5e9 ethdev: add simple power management API
Add a simple API to allow getting the monitor conditions for
power-optimized monitoring of the Rx queues from the PMD, as well as
release notes information.

Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-01-19 00:00:04 +01:00
Yi Yang
76f093948f gso: support VXLAN UDP/IPv4
As most NICs do not support segmentation for VXLAN-encapsulated
UDP/IPv4 packets, this patch adds VXLAN UDP/IPv4 GSO support.

Signed-off-by: Yi Yang <yangyi01@inspur.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
2021-01-15 11:31:28 +01:00
Tal Shnaiderman
5881b2d2d9 doc: add Windows support for mlx5
Windows is supported by mlx5 PMD.
The mlx5 guide is updated with the needed information.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
2021-01-14 10:12:37 +01:00
Kalesh AP
ecf1474a61 net/bnxt: support 58818 chip family
The new chip (Stingray 2) is part of the P5 chip family with a number
of changes:

1. Implement the epoch doorbell bit for 58818 chip. With the new
   doorbell infrastructure and the unbounded index logic, now set the
   epoch doorbell bit to support proper doorbell operation on the new
   chip.  Toggle epoch bit of all rings when it's wrapped to support
   doorbell overflow checking.
2. Get the legacy doorbell size from firmware. Legacy doorbell support
   has been removed in Stingray 2. So, the fast path doorbell pages
   start from the base of the BAR. Drivers need to use
   legacy_l2_db_space_size_kb field in the hwrm_func_qcfg_output
   response to get the legacy doorbell page offset from the BAR.
3. Set VALID doorbell bit on 58818 chip family. This class of chip has a
   valid doorbell bit added and it needs to be set.
4. Use "chip_num" returned by firmware. The "chip_num" field in the
   HWRM_VER_GET output returns the chip number. Use this value to
   identify chip category for 58818 chip family.
5. Added device ids for Stingray2 PF/VF devices.

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-01-13 19:24:30 +01:00
Ajit Khaparde
dc241adc68 net/bnxt: remove support for some PCI IDs
As announced the deprecation notice during the 20.11 release,
remove support for NetXtreme devices belonging to BCM573xx and
BCM5740x families. Specifically the support for the following Broadcom
PCI device IDs: 0x16c8, 0x16c9, 0x16ca, 0x16ce, 0x16cf, 0x16df, 0x16d0,
0x16d1, 0x16d2, 0x16d4, 0x16d5, 0x16e7, 0x16e8, 0x16e9 has been removed.

Deprecation notice has been removed and release notes for 21.02 has
been updated accordingly.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
2021-01-08 16:03:06 +01:00
David Marchand
d3fa7b89f0 version: 21.02-rc0
Start a new release cycle with empty release notes.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-30 10:55:22 +01:00
Ferruh Yigit
df18819356 doc: announce deprecation of maximum Rx length field
The configuration related to the MTU is complex
and have some design issues.
This area should be redesigned a bit.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-27 19:33:52 +01:00
Ferruh Yigit
7f01375166 doc: announce flow API matching structs changes
Proposing to replace protocol header fields in the ``rte_flow_item_*``
structures with the protocol structs.

This is both for documenting the intention and to be sure
``rte_flow_item_*`` always starts with complete protocol header.

Change will be done in two steps, at first step in v21.02 release,
protocol header struct will be added as union, for example:

Current ``struct rte_flow_item_eth``,

struct rte_flow_item_eth {
	struct rte_ether_addr dst;
	struct rte_ether_addr src;
	rte_be16_t type;
	uint32_t has_vlan:1;
	uint32_t reserved:31;
}

will become in v21.02:

__extension__
struct rte_flow_item_eth {
	union {
		struct {
			struct rte_ether_addr dst;
			struct rte_ether_addr src;
			rte_be16_t type;
		};
		struct rte_ether_hdr hdr;
	};
	uint32_t has_vlan:1;
	uint32_t reserved:31;
}

After this point usage should switch to 'hdr' struct.

And in the second step, in the v21.11 LTS release the protocol fields
will be removed, and the struct will become:

struct rte_flow_item_eth {
	struct rte_ether_hdr hdr;
	uint32_t has_vlan:1;
	uint32_t reserved:31;
}

Already many ``rte_flow_item_*`` structures implemented to have protocol
struct, target is convert all to this usage.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-27 19:17:00 +01:00
Andrew Rybchenko
8ca9bf26f5 ethdev: deprecate shared counters using action attribute
A new generic shared actions API may be used to create shared
counter. There is no point to keep duplicate COUNT action specific
capability to create shared counters.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-11-27 19:16:45 +01:00
David Marchand
b0a49787b4 usertools: remove dpdk-setup.sh
This old script relied on deprecated stuff, and especially make.
It also applied some scary 666 permissions on files under /dev/vfio.

Its deprecation had been notified in a previous release, remove it.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-11-27 17:25:24 +01:00
Ajit Khaparde
178290237e doc: add tested platforms for Broadcom NICs
Add tested platforms for Broadcom NICs to the 20.11 release notes.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-11-27 10:34:04 +01:00
Raslan Darawsheh
4d319541bc doc: add tested platforms with Mellanox NICs
Add tested platforms with Mellanox NICs to the 20.11 release notes.

Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
2020-11-27 10:33:52 +01:00
Bo Chen
6070ae89d0 doc: add tested Intel platforms with Intel NICs
Add tested Intel platforms with Intel NICs to v20.11 release note.

Signed-off-by: Bo Chen <box.c.chen@intel.com>
2020-11-27 10:25:03 +01:00
John McNamara
fb8bf05f8a doc: update release notes for 20.11
Fix grammar, spelling and formatting of DPDK 20.11 release notes.

Signed-off-by: John McNamara <john.mcnamara@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-27 10:14:41 +01:00
Bruce Richardson
dc198581b3 doc: remove meson version deprecation notice
DPDK has been using meson 0.47 for some time now, so we can safely
remove the note calling out this fact.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-11-27 02:03:42 +01:00
Ajit Khaparde
f79e7b094d doc: announce end of support for some Broadcom devices
Devices belonging to BCM573xx and BCM5740x family will not be supported
from the 21.02 release.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-11-26 18:01:19 +01:00
Benoît Ganne
1688c580e8 net/mlx5: allow unknown link speed
mlx5 PMD refuses to update link state if link speed is defined but
status is down or if link speed is undefined but status is up, even if
the ioctl() succeeded.
This prevents application to detect link up/down event, especially when
the link speed is not correctly detected.

Commit [1] allowed returning unknown link speed, so now PMD allows
the return of unknown link speed in the above case.

Due to some old kernel driver bug, link speed wasn't detected properly.

[1] http://git.dpdk.org/dpdk/commit/?id=810b17d116f03

Signed-off-by: Benoît Ganne <bganne@cisco.com>
Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2020-11-22 15:36:56 +01:00
Ivan Malov
e4f72c9e66 net/sfc: rely on native thread safety in flow mechanism
The changeset that introduced common flow API thread safety
in fact introduced double locking to this particular PMD as
RTE flow API implementation in the PMD has been thread-safe
since the day zero. State this by setting the corresponding
device flag to skip locking imposed by generic RTE flow API.

Fixes: 80d1a9aff7f6 ("ethdev: make flow API thread safe")

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2020-11-20 21:10:04 +01:00
Stephen Hemminger
db27370b57 eal: replace blacklist/whitelist options
Replace -w / --pci-whitelist with -a / --allow options
and --pci-blacklist with --block.
The -b short option remains unchanged.

Allow the old options for now, but print a nag
warning since old options are deprecated.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Luca Boccassi <bluca@debian.org>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-16 00:11:22 +01:00
Stephen Hemminger
a65a34a85e eal: replace usage of blacklist/whitelist in enums
Rename the enum values in the EAL include files.
As a backward compatible temporary migration tool, define
a replacement mapping for old values.

The old names relating to blacklist and whitelist are replaced
by block list and allow list, but applications may be using the
older compatibility macros, marked as deprecated.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Gaetan Rivet <grive@u256.net>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-16 00:11:22 +01:00
Pablo de Lara
39831d49d3 doc: support IPsec Multi-buffer lib v0.55
Updated AESNI MB and AESNI GCM PMD documentation guides
with information about the latest Intel IPSec Multi-buffer
library supported.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2020-11-12 22:10:59 +01:00
Ting Xu
7a483d58db doc: add large iavf support to release notes
Update release note for large VF, supporting up to 256 queue pairs per
VF.

Fixes: e436cd43835b ("net/iavf: negotiate large VF and request more queues")

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-11-13 19:43:26 +01:00
Thomas Monjalon
4630290af4 mbuf: move pool pointer in first half
According to the Technical Board decision
(http://mails.dpdk.org/archives/dev/2020-November/191859.html),
the mempool pointer in the mbuf struct is moved
from the second to the first half.
It may increase performance in some cases
on systems having 64-byte cache line, i.e. mbuf split in two cache lines.

Due to this change, all fields after "pool" are moved up.
Hopefully no vector data path is impacted.

Moving this field gives more space to dynfield1
while dropping the temporary dynfield0.

This is how the mbuf layout looks like (pahole-style):

word  type                              name                byte  size
 0    void *                            buf_addr;         /*   0 +  8 */
 1    rte_iova_t                        buf_iova          /*   8 +  8 */
      /* --- RTE_MARKER64               rearm_data;                   */
 2    uint16_t                          data_off;         /*  16 +  2 */
      uint16_t                          refcnt;           /*  18 +  2 */
      uint16_t                          nb_segs;          /*  20 +  2 */
      uint16_t                          port;             /*  22 +  2 */
 3    uint64_t                          ol_flags;         /*  24 +  8 */
      /* --- RTE_MARKER                 rx_descriptor_fields1;        */
 4    uint32_t             union        packet_type;      /*  32 +  4 */
      uint32_t                          pkt_len;          /*  36 +  4 */
 5    uint16_t                          data_len;         /*  40 +  2 */
      uint16_t                          vlan_tci;         /*  42 +  2 */
 5.5  uint64_t             union        hash;             /*  44 +  8 */
 6.5  uint16_t                          vlan_tci_outer;   /*  52 +  2 */
      uint16_t                          buf_len;          /*  54 +  2 */
 7    struct rte_mempool *              pool;             /*  56 +  8 */
      /* --- RTE_MARKER                 cacheline1;                   */
 8    struct rte_mbuf *                 next;             /*  64 +  8 */
 9    uint64_t             union        tx_offload;       /*  72 +  8 */
10    struct rte_mbuf_ext_shared_info * shinfo;           /*  80 +  8 */
11    uint16_t                          priv_size;        /*  88 +  2 */
      uint16_t                          timesync;         /*  90 +  2 */
11.5  uint32_t                          dynfield1[9];     /*  92 + 36 */
16    /* --- END                                             128      */

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2020-11-12 16:39:10 +01:00
David Hunt
f348642d6f doc: remove obsolete deprecation notice for power library
Remove notice announcing an already-implemented change.

In 19.05, rte_power_set_env was changed to return -1 in cases where
the environment was already set up, and for the same release, a
deprecation notice was added.
This patch removes that notice.

The API change was tested by calling rte_power_set_env twice. The first
call succeeded, and the second call failed, as expected.

Fixes: 5a5f3178d4a8 ("power: return error when environment already set")
Cc: stable@dpdk.org

Signed-off-by: David Hunt <david.hunt@intel.com>
2020-11-04 21:08:30 +01:00
Alvin Zhang
6fda724378 doc: update release notes for iavf
Update release notes with feature of outer IP hash for GTPC and GTPU.

Fixes: 6cd2d6adc783 ("net/iavf: support outer IP hash for GTPC")
Fixes: 262100a34a38 ("net/iavf: support outer IP hash for no inner GTPU")

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-04 14:18:33 +01:00
Alexander Kozyrev
54c2d46b16 net/mlx5: support flow tag and packet header miniCQEs
CQE compression allows us to save the PCI bandwidth and improve
the performance by compressing several CQEs together to a miniCQE.
But the miniCQE size is only 8 bytes and this limits the ability
to successfully keep the compression session in case of various
traffic patterns.

The current miniCQE format only keeps the compression session alive
in case of uniform traffic with the Hash RSS as the only difference.
There are requests to keep the compression session in case of tagged
traffic by RTE Flow Mark Id and mixed UDP/TCP and IPv4/IPv6 traffic.
Add 2 new miniCQE formats in order to achieve the best performance
for these traffic patterns: Flow Tag and Packet Header miniCQEs.

The existing rxq_cqe_comp_en devarg is modified to specify the
desired miniCQE format. Specifying 2 selects Flow Tag format
for better compression rate in case of RTE Flow Mark traffic.
Specifying 3 selects Checksum format (existing format for MPRQ).
Specifying 4 selects L3/L4 Header format for better compression
rate in case of mixed TCP/UDP and IPv4/IPv6 traffic.

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2020-11-03 23:35:07 +01:00
Michal Krawczyk
aa022e608d net/ena: upgrade driver version to v2.2.0
The v2.2.0 adds support for network interface metrics, includes some bug
fixes and updates HAL to the latest version.

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Guy Tzalik <gtzalik@amazon.com>
2020-11-03 23:35:06 +01:00
Jeff Guo
12b435bf8f net/iavf: support flex desc metadata extraction
Enable metadata extraction for flexible descriptors in AVF, that would
allow network function directly get metadata without additional parsing
which would reduce the CPU cost for VFs. The enabling metadata
extractions involve the metadata of VLAN/IPv4/IPv6/IPv6-FLOW/TCP/MPLS
flexible descriptors, and the VF could negotiate the capability of
the flexible descriptor with PF and correspondingly configure the
specific offload at receiving queues.

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2020-11-03 23:35:06 +01:00
Andrew Rybchenko
141d287067 net/sfc: support aarch64 architecture
Enable the PMD build on aarch64.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-11-03 23:35:06 +01:00
Andrew Rybchenko
cf47acc0f9 ethdev: remove L2 tunnel offload control API
Remove rte_eth_dev_l2_tunnel_offload_set() and corresponding
ethdev driver operation.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:35:06 +01:00
Andrew Rybchenko
99a1b6895f ethdev: remove API to config L2 tunnel EtherType
Remove rte_eth_dev_l2_tunnel_eth_type_conf() and corresponding
ethdev driver operation.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:35:06 +01:00