We were using LICENSE.qede_pmd to reference inclusion of SPDX licensing
tag from all the source file. Remove the LICENSE.qede_pmd file and
directly include SPDX tags in source files.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Multiple port reconfigurations can lead to memory allocation failures
due to hitting RTE memzone limit or no more room in config while
reserving memzone.
When freeing memzones, update the memzone mapping and the memzone count.
Release Rx and Tx queue rings allocated during queue setup.
Fixes: a39001d90d ("net/qede: fix DMA memory leak")
Cc: stable@dpdk.org
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
Reviewed-by: Kevin Traynor <ktraynor@redhat.com>
In case osal_dma_alloc_coherent() or osal_dma_alloc_coherent_aligned() are
called from a management thread, core_id turn out to be LCORE_ID_ANY, and
the resulting socket for alloc will be socket 0.
This is not desirable when using a NIC from socket 1 which might very
likely be configured to use memory from that socket only.
In that case, allocation will fail.
To address this, use master lcore instead when called from mgmt thread.
The associated socket should have memory available.
Fixes: ec94dbc573 ("qede: add base driver")
Cc: stable@dpdk.org
Signed-off-by: Pascal Mazon <pascal.mazon@6wind.com>
Acked-by: Harish Patil <harish.patil@cavium.com>
Acked-by: Harish Patil <harish.patil@cavium.com>
The struct rte_memzone field .phys_addr is renamed to .iova.
The deprecated name is kept in an anonymous union to avoid breaking
the API.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Move ecore_crc32() macro to within base driver to qede_crc32() and use
OSAL_CRC32() where required.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
Handle different MAC statistic fields between two chip variants by
reading the MAC counters from the adapter suitable statistics bins.
Fixes: ec94dbc573 ("qede: add base driver")
Cc: stable@dpdk.org
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
Log HW errmsg on the stdout and do minimal handling to prevent HW
attentions from being reasserted.
Signed-off-by: Harish Patil <harish.patil@cavium.com>
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
Implement the macro OSAL_DMA_FREE_COHERENT to release DMA memories.
Track all DMA memory allocations using an array of memzone pointers and
use that to free memory resources along with other resource deallocation.
With this change there is no need to alter the base code to additionally
pass an unique string needed for memzone creation.
Fixes: ec94dbc573 ("qede: add base driver")
Cc: stable@dpdk.org
Signed-off-by: Harish Patil <harish.patil@cavium.com>
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
The QEDE PMD now uses unzipped firmware file eliminating the dependency
on zlib. Hence remove LDLIBS entry form the Makefile and enable qede
PMD by default.
Fixes: 6adac0bf30 ("qede: add missing external dependency and disable by default")
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
In case of attention from a signal that's represented by multiple bits
in misc AEU, add the format string which is populated with proper index
and resulting prints will show string as a prefix.
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Replaced CONFIG_QED_BINARY_FW with CONFIG_ECORE_BINARY_FW.
Use CONFIG_ECORE_BINARY_FW and CONFIG_ECORE_ZIPPED_FW defines as
required.
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Under certain scenarios, management firmware (MFW) periodically polls
the driver for LAN statistics. This patch implements the osal hook to
fill in the stats.
Fixes: ec94dbc573 ("qede: add base driver")
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Some 64-bit variables are printed for debug.
%PRIx64 qualifier must be used because %lx is not long enough
on 32-bit systems
Fixes: ec94dbc573 ("qede: add base driver")
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Harish Patil <harish.patil@qlogic.com>
The base driver is the backend module for the QLogic FastLinQ QL4xxxx
25G/40G CNA family of adapters as well as their virtual functions (VF)
in SR-IOV context.
The purpose of the base module is to:
- provide all the common code that will be shared between the various
drivers that would be used with said line of products. Flows such as
chip initialization and de-initialization fall under this category.
- abstract the protocol-specific HW & FW components, allowing the
protocol drivers to have clean APIs, which are detached in its
slowpath configuration from the actual Hardware Software Interface(HSI).
This patch adds a base module without any protocol-specific bits.
I.e., this adds a basic implementation that almost entirely falls under
the first category.
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: Sony Chacko <sony.chacko@qlogic.com>
