Commit Graph

16312 Commits

Author SHA1 Message Date
Intel
647ec408be ethdev: set VMDq pool when adding mac address
Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
00e30184da ixgbe: add PF support
Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
be2d648a2d igb: add PF support
Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
0f72e563a2 ethdev: add PF support
Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
6ee7676169 ixgbe: support dual vlan
Signed-off-by: Intel
2013-09-17 14:16:08 +02:00
Intel
e51abef393 igb: fix max RX packet size and support dual VLAN
When in 'normal' mode, hardware is designed to receive up to 1522 bytes.
When in 'jumbo' mode, RLPML register must be updated so that hardware accepts
a 802.1q vlan header. If dual vlan is enabled, then a second vlan header is
expected, so update RLPML register according to dual vlan support.

Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
dec6f7a645 ixgbe: retrieve RX available descriptors
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
23a6660113 igb: retrieve RX available descriptors
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
6acc6176c4 e1000: retrieve RX available descriptors
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
bc355ebf4f ethdev: retrieve RX available descriptors
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
249358424e ixgbe: RSS RETA configuration
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
9236f43284 igb: RSS RETA configuration
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
01a638e15d ethdev: RSS RETA configuration
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
a108ced364 ixgbe: allocate structures on numa_node
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
b6ea6408fb ethdev: store numa_node per device
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
e8719b2f99 ixgbe: allow unsupported SFP
Add RTE_LIBRTE_IXGBE_ALLOW_UNSUPPORTED_SFP build option

Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
8d4703f966 ixgbe: force inlining
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
f3cb1477ad ixgbe: log tx code path
Signed-off-by: Intel
2013-09-17 14:16:07 +02:00
Intel
a30ebfbb8c e1000: move workaround for wthresh on 82576 at wrong place
The workaround is moved in e1000em code but 82576 is an igb NIC.
It breaks the fix of the commit 7e9e49feea.

Signed-off-by: Intel <intel.com>
2013-09-17 14:14:59 +02:00
Stephen Hemminger
7e9e49feea igb: workaround errata with wthresh on 82576
The 82576 has known issues which require the write threshold to be set to 1.
See:
	http://download.intel.com/design/network/specupdt/82576_SPECUPDATE.pdf

If not then single packets will hang in transmit ring until more arrive.
Simple tests like ping will fail.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>
2013-09-17 14:09:23 +02:00
Intel
9b2027a70b ethdev: more doxygen comments about fdir
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
b8539d50c5 pci: store numa_node per device
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
1a4afaef91 pci: configure SR-IOV with max_vfs
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Julien Courtat
06bcaf50ca pci: fix probing blacklisted device with RTE_PCI_DRV_MULTIPLE flag
When blacklisting network adapters that share a PCI bus address with multiple
ports such as Mellanox ConnectX-3 (librte_pmd_mlx4), RTE applications
enter infinite loops while probing PCI devices.

This commit removes this probe on subsequent instances for blacklisted devices
that have RTE_PCI_DRV_MULTIPLE set.

Signed-off-by: Julien Courtat <julien.courtat@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2013-09-17 14:09:22 +02:00
Intel
a22f5ce8fc pci: don't unbind resources on exit
unbind operations must be done before starting eal application

Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
0a45657a67 pci: rework interrupt handling
Signed-off-by: Intel <intel.com>
2013-09-17 14:09:22 +02:00
Stephen Hemminger
eee16c964c pci: support multiple PCI regions per device
Need to change PCI code to support multiple I/O regions on a single device.
Some devices like VMXNET3 have multiple PCI memory regions, and some
have none.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
c7f4888629 mbuf: force inlining
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
4dc11c20d7 mem: force inlining
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
3743329a7e mem: remove RLIMIT_NOFILE update
Memory init won't try to increase its RLIMIT_NOFILE limit, this must be done
prior to starting it.

Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
e0c8475561 mem: find most little element from heap
Allocations now return the most little element from heap matching size
constraint instead of the first one available.

Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
286bd05bf7 ring: optimisations
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
ae2d65e257 timer: add a rte_pause in a tight loop
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
e987449c9f timer: prefer TSC to HPET
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Stephen Hemminger
3778059a51 timer: optimize for empty case
In many application there are no timers queued, and the call to
rte_timer_managecan be optimized in that case avoid reading HPET and
lock overhead.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>
2013-09-17 14:09:22 +02:00
Damien Millescamps
6286101324 timer: option --vmware-tsc-map for VMware guest
The VMWare TSC mapping uses a hook to RDPMC to read the physical TSC
in the case of VMware ESXi.

Signed-off-by: Damien Millescamps <damien.millescamps@6wind.com>
Acked-by: Jean-Mickael Guerin <jmg@6wind.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>

Introduce new option --vmware-tsc-map, ignored if
CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT is not set.

Default is CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y.

if CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT is set:
    rte_rdtsc() selects at runtime between Vmware mapping of
    TSC or native TSC
else
    rte_rdtsc() always uses native rdtsc.

When running DPDK on VMware guest, enable --vmware-tsc-map to
read the physical TSC.
Caution: ESXi should pass monitor_control.pseudo_perfctr = TRUE
othewise it results in general protection fault.

Signed-off-by: Jean-Mickael Guerin <jean-mickael.guerin@6wind.com>
Acked-by: Vincent Jardin <vincent.jardin@6wind.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2013-09-17 14:09:22 +02:00
Intel
cbecb72292 hash: jhash optimisation
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
1a9f648be2 hash: fix for multi-process apps
Signed-off-by: Intel
2013-09-17 14:09:22 +02:00
Intel
de3cfa2c98 sched: initial import
Signed-off-by: Intel
2013-09-17 14:09:21 +02:00
Intel
e6541fdec8 meter: initial import
Signed-off-by: Intel
2013-09-17 14:09:21 +02:00
Intel
d7937e2e3d power: initial import
Signed-off-by: Intel
2013-09-17 14:09:21 +02:00
Intel
5c510e13a9 lpm: add IPv6 support
Signed-off-by: Intel
2013-09-17 14:09:21 +02:00
Stephen Hemminger
2450abdf90 log: optimize log/panic with attribute cold
Both logging and calls to panic are never in the critical path.
Use the GCC attribute cold to mark these functions as cold,
which generates more optimised code.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>
2013-09-17 14:09:21 +02:00
Intel
494a02537f log: get full path as syslog id
It partially reverts commit 04210699ee.

Signed-off-by: Intel <intel.com>
2013-09-17 14:08:47 +02:00
Stephen Hemminger
04210699ee log: add ability to override syslog parameters
By default, DPDK based applications would only allow logging
to syslog as "rte", DAEMON; but for any production application more
control is desired to allow using actual application name and
overriding the facility.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>
2013-09-16 15:34:52 +02:00
Intel
99dde4b0e2 eal: cosmetic changes
Signed-off-by: Intel
2013-09-16 15:30:55 +02:00
Intel
bfdbde0c20 eal: add application usage hook
Signed-off-by: Intel
2013-09-16 15:30:52 +02:00
Intel
d6772940c0 eal: memory barriers use intrinsic functions
Signed-off-by: Intel
2013-09-16 15:19:04 +02:00
Intel
0fa75ccc24 eal: use intrinsic functions from compiler
RTE_FORCE_INTRINSICS makes it possible to force use of intrinsic
functions (defaults to n).

Signed-off-by: Intel
2013-09-16 15:19:03 +02:00
Intel
803b069703 lib: add rte_hexdump and remove duplicated code
Signed-off-by: Intel
2013-09-06 11:43:07 +02:00