Commit Graph

328 Commits

Author SHA1 Message Date
Gaetan Rivet
c752998b5e pci: introduce library and driver
The PCI lib defines the types and methods allowing to use PCI elements.

The PCI bus implements a bus driver for PCI devices by constructing
rte_bus elements using the PCI lib.

Move the relevant code out of the EAL to its expected place.

Libraries, drivers, unit tests and applications are updated to use the
new rte_bus_pci.h header when necessary.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Tomasz Duszynski
b32a42e4d6 net/mrvl: remove DMA buffer size from configuration
RTE_MRVL_MUSDK_DMA_MEMSIZE can be removed from DPDK configuration
as it's no longer used as a synchronization point for net and crypto
mrvl pmds.

Fixes: 0ddc9b815b ("net/mrvl: add net PMD skeleton")

Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2017-10-26 02:33:00 +02:00
Akhil Goyal
c261d1431b security: introduce security API and framework
rte_security library provides APIs for security session
create/free for protocol offload or offloaded crypto
operation to ethernet device.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Boris Pismenny <borisp@mellanox.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
2017-10-26 03:10:51 +02:00
Ferruh Yigit
be41ac2a33 flow_classify: introduce flow classify library
The following APIs's are implemented in the
librte_flow_classify library:

rte_flow_classifier_create
rte_flow_classifier_free
rte_flow_classifier_query
rte_flow_classify_table_create
rte_flow_classify_table_entry_add
rte_flow_classify_table_entry_delete

The following librte_table API's are used:
f_create to create a table.
f_add to add a rule to the table.
f_del to delete a rule from the table.
f_free to free a table
f_lookup to match packets with the rules.

The library supports counting of IPv4 five tupple packets only,
ie IPv4 UDP, TCP and SCTP packets.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
2017-10-24 22:26:54 +02:00
Tomasz Duszynski
49d193cfb2 config: remove unused mrvl debug option
Remove unused MRVL_DEBUG configuration option and update driver
documentation accordingly.

Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2017-10-13 01:17:36 +01:00
Tomasz Duszynski
8a61c83af2 crypto/mrvl: add mrvl crypto driver
Add support for the Marvell Security Crypto Accelerator EIP197.
Driver is based on external, publicly available, Marvell MUSDK
library that provides access to the hardware with minimum overhead
and high performance.

Driver comes with support for the following features:

* Symmetric crypto
* Sym operation chaining
* AES CBC (128)
* AES CBC (192)
* AES CBC (256)
* AES CTR (128)
* AES CTR (192)
* AES CTR (256)
* 3DES CBC
* 3DES CTR
* MD5
* MD5 HMAC
* SHA1
* SHA1 HMAC
* SHA256
* SHA256 HMAC
* SHA384
* SHA384 HMAC
* SHA512
* SHA512 HMAC
* AES GCM (128)

Driver was engineered cooperatively by Semihalf and Marvell teams.

Semihalf:
Jacek Siuda <jck@semihalf.com>
Tomasz Duszynski <tdu@semihalf.com>

Marvell:
Dmitri Epshtein <dima@marvell.com>
Natalie Samsonov <nsamsono@marvell.com>

Signed-off-by: Jacek Siuda <jck@semihalf.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2017-10-12 15:22:39 +01:00
Akhil Goyal
c3e85bdcc6 crypto/dpaa_sec: add crypto driver for NXP DPAA platform
Signed-off-by: Forrest Shi <xuelin.shi@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-10-12 15:22:39 +01:00
Akhil Goyal
9e54357358 bus/dpaa: scan for DPAA Crypto devices
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2017-10-12 15:22:39 +01:00
Jasvinder Singh
cc6d421574 net/softnic: add softnic PMD
Add SoftNIC PMD to provide SW fall-back for ethdev APIs.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2017-10-12 01:52:38 +01:00
Tomasz Duszynski
0ddc9b815b net/mrvl: add net PMD skeleton
Add mrvl net pmd driver skeleton providing base for the further
development. Besides the basic functionality QoS configuration is
introduced as well.

Signed-off-by: Jacek Siuda <jck@semihalf.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2017-10-12 01:36:58 +01:00
Jerin Jacob
3c0511741c net/octeontx: add build infrastructure
Adding bare minimum PMD library and doc build infrastructure.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
2017-10-12 01:36:57 +01:00
Jiayu Hu
ec51443cc9 gso: add Generic Segmentation Offload API framework
Generic Segmentation Offload (GSO) is a SW technique to split large
packets into small ones. Akin to TSO, GSO enables applications to
operate on large packets, thus reducing per-packet processing overhead.

To enable more flexibility to applications, DPDK GSO is implemented
as a standalone library. Applications explicitly use the GSO library
to segment packets. To segment a packet requires two steps. The first
is to set proper flags to mbuf->ol_flags, where the flags are the same
as that of TSO. The second is to call the segmentation API,
rte_gso_segment(). This patch introduces the GSO API framework to DPDK.

rte_gso_segment() splits an input packet into small ones in each
invocation. The GSO library refers to these small packets generated
by rte_gso_segment() as GSO segments. Each of the newly-created GSO
segments is organized as a two-segment MBUF, where the first segment is a
standard MBUF, which stores a copy of packet header, and the second is an
indirect MBUF which points to a section of data in the input packet.
rte_gso_segment() reduces the refcnt of the input packet by 1. Therefore,
when all GSO segments are freed, the input packet is freed automatically.
Additionally, since each GSO segment has multiple MBUFs (i.e. 2 MBUFs),
the driver of the interface which the GSO segments are sent to should
support to transmit multi-segment packets.

The GSO framework clears the PKT_TX_TCP_SEG flag for both the input
packet, and all produced GSO segments in the event of success, since
segmentation in hardware is no longer required at that point.

Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Signed-off-by: Mark Kavanagh <mark.b.kavanagh@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2017-10-12 01:36:57 +01:00
Xueming Li
f385306357 config: add option to enable asserts
Currently, enabling assertion have to set CONFIG_RTE_LOG_LEVEL to
RTE_LOG_DEBUG. CONFIG_RTE_LOG_LEVEL is the default log level of control
path, RTE_LOG_DP_LEVEL is the log level of data path. It's a little bit
hard to understand literally that assertion is decided by control path
LOG_LEVEL, especially assertion used on data path.

On the other hand, DPDK need an assertion enabling switch w/o impacting
log output level, assuming "--log-level" not specified.

Assertion is an important API to balance DPDK high performance and
robustness. To promote assertion usage, it's valuable to unhide
assertion out of COFNIG_RTE_LOG_LEVEL.

In one word, log is log, assertion is assertion, debug is hot pot :)

Rationale of this patch is to introduce an dedicate switch of
assertion: RTE_ENABLE_ASSERT

Signed-off-by: Xueming Li <xuemingl@mellanox.com>
Acked-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-09 23:15:45 +02:00
Jianfeng Tan
f26ab687a7 eal: remove Xen dom0 support
We remove xen-specific code in EAL, including the option --xen-dom0,
memory initialization code, compiling dependency, etc.

Related documents are removed or updated, and bump the eal library
version.

Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
2017-10-09 01:54:29 +02:00
Jianfeng Tan
8b3746e8f7 net/xenvirt: remove
Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2017-10-09 01:11:48 +02:00
Yipeng Wang
857ed6c68c member: implement main API
Membership library is an extension and generalization of a traditional
filter (for example Bloom Filter and cuckoo filter) structure.
In general, the Membership library is a data structure that provides a
"set-summary" and responds to set-membership queries of whether a
certain element belongs to a set(s). A membership test for an element
will return the set this element belongs to or not-found if the
element is never inserted into the set-summary.

The results of the membership test are not 100% accurate. Certain
false positive or false negative probability could exist. However,
comparing to a "full-blown" complete list of elements, a "set-summary"
is memory efficient and fast on lookup.

This patch adds the main API definition.

Signed-off-by: Yipeng Wang <yipeng1.wang@intel.com>
Reviewed-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-10-09 00:02:45 +02:00
Santosh Shukla
8700239f77 mempool/octeontx: add build and log infrastructure
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-10-08 19:24:07 +02:00
Jianbo Liu
f181011359 config: enable igb_uio on arm64
The kernel patch was merged to support pci resource mapping.
https://patchwork.kernel.org/patch/9677441/

So enable igu_uio in the default arm64 configuration.

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-10-06 23:36:00 +02:00
Ashish Jain
5fab875e1b config/dpaa2: change max lcores to 16
To support new LX2 series

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
2017-10-06 03:24:17 +02:00
Shreyansh Jain
41ff302350 config: enable NXP DPAA PMD compilation
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-10-06 02:49:50 +02:00
Shreyansh Jain
107fd30eb3 config: enable compilation of DPAA mempool driver
This patch also adds configuration necessary for compilation of DPAA
Mempool driver into the DPAA specific config file.
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS=dpaa is also configured to allow
applications to use DPAA mempool as default.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-10-06 02:49:50 +02:00
Shreyansh Jain
c47ff048b9 bus/dpaa: add QMAN driver core routines
Signed-off-by: Geoff Thorpe <geoff.thorpe@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-10-06 02:49:50 +02:00
Shreyansh Jain
919eeaccb2 bus/dpaa: introduce NXP DPAA bus driver skeleton
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-10-06 02:49:49 +02:00
Shreyansh Jain
c0108cc829 config: add NXP DPAA SoC build configuration
This patch adds skeleton build configuration for DPAA platform.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-10-06 02:49:49 +02:00
Adrien Mazarguil
586db08058 net/mlx4: remove Tx inline compilation option
This should be a run-time parameter.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-10-06 02:49:47 +02:00
Adrien Mazarguil
367b31cd5b net/mlx4: remove scatter mode compilation option
This option both sets the maximum number of segments for Rx/Tx packets and
whether scattered mode is supported at all. This commit removes the latter
as well as configuration file exposure since the most appropriate value
should be decided at run-time.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-10-06 02:49:47 +02:00
Adrien Mazarguil
31a76ab0df net/mlx4: remove soft counters compilation option
Software counters are mandatory since hardware counters are not
implemented.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-10-06 02:49:47 +02:00
Ilia Kurakin
5dce9fcdb2 ethdev: support vtune task tracing
The patch simplifies DPDK applications analysis for developers which use
Intel® VTune Amplifier.

The empty cycles are such iterations that yielded no RX packets. As far as
DPDK is running in poll mode, wasting cycles is equal to wasting CPU time.
Tracing such iterations can identify that device is underutilized. Tracing
empty cycles becomes even more critical if a system uses a lot of Ethernet
ports.

The patch gives possibility to analyze empty cycles without changing
application code. All needs to be done is just to reconfigure and rebuild
the DPDK itself with CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS
enbled. The important thing here is that this does not affect DPDK code.
The profiling code is not being compiled if user does not specify config
flag.

The patch provides common way to inject RX queues profiling and VTune
specific implementation.

Signed-off-by: Ilia Kurakin <ilia.kurakin@intel.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-09-22 19:01:32 +02:00
Matan Azrad
5f4677c6ad net/mlx4: workaround verbs error after plug-out
Current mlx4 OFED version has bug which returns error to
ibv destroy functions when the device was plugged out, in
spite of the resources were destroyed correctly.

Hence, failsafe PMD was aborted, only in debug mode, when
it tries to remove the device in plug-out process.

The workaround added option to replace all claim_zero
assertions with debugging messages, by the way, this option
affects non ibv destroy assertions.

DPDK 18.02 release should work with Mellanox OFED-4.2 which will
include the verbs fix to this bug, then, this patch can
be removed.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-08-03 23:10:27 +02:00
Gowrishankar Muthukrishnan
6e7d388c3e net/bonding: enable in ppc64le
Earlier bonding pmd was disabled in default config for ppc64le.
Hence, removing it as it has been verified.

Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
2017-07-31 19:58:41 +02:00
Gaetan Rivet
a46f8d584e net/failsafe: add fail-safe PMD
Introduce the fail-safe poll mode driver initialization and enable its
build infrastructure.

This PMD allows for applications to benefit from true hot-plugging
support without having to implement it.

It intercepts and manages Ethernet device removal events issued by
slave PMDs and re-initializes them transparently when brought back.
It also allows defining a contingency to the removal of a device, by
designating a fail-over device that will take on transmitting operations
if the preferred device is removed.

Applications only see a fail-safe instance, without caring for
underlying activity ensuring their continued operations.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Acked-by: Olga Shern <olgas@mellanox.com>
2017-07-19 16:25:42 +03:00
Hemant Agrawal
f60a9f98ec config: enable virtual IOVA by default for DPAA2
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-07-14 15:58:57 +02:00
Shreyansh Jain
fcee050aa1 update NXP copyright headers
NXP Copyright has been wrongly worded with '(c)' at various places.
This patch removes these extra characters. It also removes
"All rights reserved".

Only NXP copyright syntax is changed. Freescale copyright is not
modified.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-07-10 12:26:40 +02:00
Jiayu Hu
e996506a1c lib/gro: add Generic Receive Offload API framework
Generic Receive Offload (GRO) is a widely used SW-based offloading
technique to reduce per-packet processing overhead. It gains
performance by reassembling small packets into large ones. This
patchset is to support GRO in DPDK. To support GRO, this patch
implements a GRO API framework.

To enable more flexibility to applications, DPDK GRO is implemented as
a user library. Applications explicitly use the GRO library to merge
small packets into large ones. DPDK GRO provides two reassembly modes.
One is called lightweight mode, the other is called heavyweight mode.
If applications want to merge packets in a simple way and the number
of packets is relatively small, they can use the lightweight mode.
If applications need more fine-grained controls, they can choose the
heavyweight mode.

rte_gro_reassemble_burst is the main reassembly API which is used in
lightweight mode and processes N packets at a time. For applications,
performing GRO in lightweight mode is simple. They just need to invoke
rte_gro_reassemble_burst. Applications can get GROed packets as soon as
rte_gro_reassemble_burst returns.

rte_gro_reassemble is the main reassembly API which is used in
heavyweight mode and tries to merge N inputted packets with the packets
in GRO reassembly tables. For applications, performing GRO in heavyweight
mode is relatively complicated. Before performing GRO, applications need
to create a GRO context object, which keeps reassembly tables of
desired GRO types, by rte_gro_ctx_create. Then applications can use
rte_gro_reassemble to merge packets. The GROed packets are in the
reassembly tables of the GRO context object. If applications want to get
them, applications need to manually flush them by flush API.

Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Reviewed-by: Jianfeng Tan <jianfeng.tan@intel.com>
2017-07-09 18:14:46 +02:00
Jerin Jacob
3abcd29f2d update Cavium Inc copyright headers
Replace the incorrect reference to "Cavium Networks", "Cavium Ltd"
company name with correct the "Cavium, Inc" company name in
copyright headers.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-07-08 17:43:49 +02:00
Jerin Jacob
6d1729de71 app/testeventdev: introduce dpdk-test-eventdev app
The dpdk-test-eventdev tool is a Data Plane Development Kit (DPDK)
application that allows exercising various eventdev use cases. This
application has a generic framework to add new eventdev based test cases
to verify functionality and measure the performance parameters of DPDK
eventdev devices.

This patch adds the skeleton of the dpdk-test-eventdev application.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-07-07 09:30:46 +02:00
Nipun Gupta
8cbe85b632 event/dpaa2: add basic build infrastructure
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-07-07 09:24:40 +02:00
Ashwin Sekhar T K
0b835b41b3 config: support clang for ARMv8 Linux
Moved all common defines from defconfig_arm64-armv8a-linuxapp-gcc
to common_armv8a_linuxapp.

Created new config arm64-armv8a-linuxapp-clang which adds the
clang support to armv8a.

Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain only the
CONFIG_RTE_TOOLCHAIN* defines and all other common defines are
inherited from common_armv8a_linuxapp.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-07-03 22:28:19 +02:00
Ashwin Sekhar T K
b79afd0b7e sched: add NEON optimizations
* Removed setting CONFIG_RTE_SCHED_VECTOR=n from armv8a config
  so that the setting from common_base is taken as the default
  setting for armv8a
* Verified the changes with sched_autotest unit test case

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
2017-07-03 15:13:36 +02:00
Ilya Maximets
cabe6ebb4d config: enable vhost NUMA awareness by default
It is safe to enable LIBRTE_VHOST_NUMA by default for all
configurations where libnuma is already a default dependency.

Signed-off-by: Ilya Maximets <i.maximets@samsung.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Tested-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-06-30 18:07:50 +02:00
Ilya Maximets
1b72605d24 mem: balanced allocation of hugepages
Currently EAL allocates hugepages one by one not paying attention
from which NUMA node allocation was done.

Such behaviour leads to allocation failure if number of available
hugepages for application limited by cgroups or hugetlbfs and
memory requested not only from the first socket.

Example:
	# 90 x 1GB hugepages availavle in a system

	cgcreate -g hugetlb:/test
	# Limit to 32GB of hugepages
	cgset -r hugetlb.1GB.limit_in_bytes=34359738368 test
	# Request 4GB from each of 2 sockets
	cgexec -g hugetlb:test testpmd --socket-mem=4096,4096 ...

	EAL: SIGBUS: Cannot mmap more hugepages of size 1024 MB
	EAL: 32 not 90 hugepages of size 1024 MB allocated
	EAL: Not enough memory available on socket 1!
	     Requested: 4096MB, available: 0MB
	PANIC in rte_eal_init():
	Cannot init memory

	This happens beacause all allocated pages are
	on socket 0.

Fix this issue by setting mempolicy MPOL_PREFERRED for each hugepage
to one of requested nodes using following schema:

	1) Allocate essential hugepages:
		1.1) Allocate as many hugepages from numa N to
		     only fit requested memory for this numa.
		1.2) repeat 1.1 for all numa nodes.
	2) Try to map all remaining free hugepages in a round-robin
	   fashion.
	3) Sort pages and choose the most suitable.

In this case all essential memory will be allocated and all remaining
pages will be fairly distributed between all requested nodes.

New config option RTE_EAL_NUMA_AWARE_HUGEPAGES introduced and
enabled by default for linuxapp except armv7 and dpaa2.
Enabling of this option adds libnuma as a dependency for EAL.

Fixes: 77988fc08d ("mem: fix allocating all free hugepages")

Signed-off-by: Ilya Maximets <i.maximets@samsung.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Tested-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-06-30 17:54:32 +02:00
Matej Vido
8c21057185 net/szedata2: add more supported firmwares
Add IBUF and OBUF offsets definitions for new firmwares.

Signed-off-by: Matej Vido <vido@cesnet.cz>
2017-06-12 15:21:22 +01:00
Radu Nicolau
e261265e42 ethdev: move bypass functions to ixgbe PMD
Move all bypass functions to ixgbe pmd and remove function
pointers from the eth_dev_ops struct.

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2017-06-12 10:41:27 +01:00
Rahul Lakkireddy
6c2809628c net/cxgbe: improve latency for slow traffic
TX coalescing waits for ETH_COALESCE_PKT_NUM packets to be coalesced
across bursts before transmitting them.  For slow traffic, such as
100 PPS, this approach increases latency since packets are received
one at a time and tx coalescing has to wait for ETH_COALESCE_PKT
number of packets to arrive before transmitting.

To fix this:

- Update rx path to use status page instead and only receive packets
  when either the ingress interrupt timer threshold (5 us) or
  the ingress interrupt packet count threshold (32 packets) fires.
  (i.e. whichever happens first).

- If number of packets coalesced is <= number of packets sent
  by tx burst function, stop coalescing and transmit these packets
  immediately.

Also added compile time option to favor throughput over latency by
default.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
2017-06-12 10:41:27 +01:00
Hemant Agrawal
63acdb33bc mk: change dpaa2 machine flag to cortex-a72
DPAA2 devices now support cortex-a72. They no longer support a57.
Also fp and simd is no more required to be stated explicitly for
standard a72 core.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-06-12 10:41:26 +01:00
John Daley
0f76668039 net/enic: flow API skeleton
Stub callbacks for the generic flow API and a new FLOW debug define.

Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Nelson Escobar <neescoba@cisco.com>
2017-06-12 10:41:26 +01:00
Bruce Richardson
e6672d2f0f net/ixgbe: enable ixgbe vector PMD for i686
The ixgbe vector PMD was disabled for i686 unnecessarily. Enable it.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2017-06-12 10:41:25 +01:00
Herakliusz Lipiec
79c9c675d2 config: fix comment
Fixes: 4fb7e803eb ("ethdev: add Tx preparation")

Signed-off-by: Herakliusz Lipiec <herakliusz.lipiec@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-06-04 13:18:06 +02:00
Wei Dai
4d8b986bfe config: make backtrace optional
When building DPDK with musl, there is need not to disable
backtrace to remove some references to execinfo.h which is
not supported by musl now.
This also applies to some other libc implementation which
doesn't support backtrace() and backtrace_symbols().

musl is an implementation of the userspace portion
of the standard library functionality described in
the ISO C and POSIX standards, plus common extensions.
Got more details about musl from http://www.musl-libc.org .

Signed-off-by: Wei Dai <wei.dai@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2017-05-05 15:13:29 +02:00
Zhihong Wang
1838af3399 config: make AVX and AVX512 configurable
Making AVX and AVX512 configurable is useful for performance and power
testing.

The similar kernel patch at https://patchwork.kernel.org/patch/9618883/.

AVX512 support like in rte_memcpy has been in DPDK since 16.04, but it's
still unproven in rich use cases in hardware. Therefore it's marked as
experimental for now, will enable it after enough field test and possible
optimization.

Signed-off-by: Zhihong Wang <zhihong.wang@intel.com>
Reviewed-by: Zhiyong Yang <zhiyong.yang@intel.com>
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-04-30 23:17:53 +02:00