14952 Commits

Author SHA1 Message Date
Timothy McDaniel
ca12862218 event/dlb2: add v2.5 create LDB port
Update the low level HW functions responsible for
creating load balanced ports. These functions create the
producer port (PP), configure the consumer queue (CQ), and
validate the port creation arguments.

The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names.  Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
e0c08ad1db event/dlb2: add v2.5 create LDB queue
Updated low level hardware functions related to configuring
load balanced queues. These functions create the queues,
as well as attach related resources required by load
balanced queues, such as sequence numbers.

The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names.  Additionally,
new register access macros are used so that the code
can perform the correct action based on the hardware
version, v2.0 or v2.5.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
a1295544fe event/dlb2: add v2.5 domain reset
Reset hardware registers, consumer queues, ports,
interrupts and software. Queues must also be drained
as part of the reset process.

The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names.  Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
0dfab249d5 event/dlb2: add v2.5 create sched domain
Update domain creation logic to account for DLB v2.5
credit scheme, new register map, and new register access
macros.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
4ce7bf9ec1 event/dlb2: add v2.5 get resources
DLB v2.5 uses a new credit scheme, where directed and load balanced
credits are unified, instead of having separate directed and load
balanced credit pools.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
0d65f8f9e3 event/dlb2: add v2.5 HW init
Add support for DLB v2.5 probe-time hardware init,
and sets up a framework for incorporating the remaining
changes required to support DLB v2.5.

DLB v2.0 and DLB v2.5 are similar in many respects, but their
register offsets and definitions are different. As a result of these,
differences, the low level hardware functions must take the device
version into consideration. This requires that the hardware version be
passed to many of the low level functions, so that the PMD can
take the appropriate action based on the device version.

To ease the transition and keep the individual patches small, three
temporary files are added in this commit. These files have "new"
in their names.  The files with "new" contain changes specific to a
consolidated PMD that supports both DLB v2.0 and DLB 2.5. Their sister
files of the same name (minus "new") contain the old DLB v2.0 specific
code. The intent is to remove code from the original files as that code
is ported to the combined DLB 2.0/2.5 PMD model and added to the "new"
files in a series of commits. At end of the patch series, the old files
will be empty and the "new" files will have the logic needed
to implement a single PMD that supports both DLB v2.0 and DLB v2.5.
At that time, the original DLB v2.0 specific files will be deleted,
and the "new" files will be renamed and replace them.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
7da19335cf event/dlb2: add v2.5 HW register definitions
Add auto-generated register definitions, updated to
support both DLB v2.0 and v2.5 devices.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
b66a418d2a event/dlb2: add v2.5 probe
This commit adds dlb v2.5 probe support, and updates
parameter parsing.

The dlb v2.5 device differs from dlb v2, in that the
number of resources (ports, queues, ...) is different,
so macros have been added to take the device version
into account.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
a3c8a44634 event/dlb2: remove useless code
- Remove references of FPGA.
- Do not include dlb2_mbox.h as it is not needed.
- Remove duplicate macros/defines that were
present in both dlb2_priv.h and dlb2_hw_types.h.
Update dlb2_resource.c to include dlb2_priv.h
so that it picks up the macros/defines that
have now been consolidated.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Shijith Thotton
849111aec7 event/octeontx2: configure crypto adapter xaq pool
Configure xaq pool based on number of in-use crypto queues to avoid CPT
add work failure due to xaq buffer run out. This patch configures
OTX2_CPT_DEFAULT_CMD_QLEN number of xae entries per queue pair.

Fixes: 29768f78d5a7 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-29 10:48:22 +02:00
Shijith Thotton
3841fc3581 event/octeontx2: fix crypto adapter queue pair operations
Parameter queue_pair_id of crypto adapter queue pair add/del operation
can be -1 to select all pre configured crypto queue pairs. Added support
for the same in driver. Also added a member in cpt qp structure to
indicate binding state of a queue pair to an event queue.

Fixes: 29768f78d5a7 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Ankur Dwivedi <adwivedi@marvell.com>
2021-04-29 10:47:49 +02:00
Suanming Mou
caec80f92a common/mlx5: add UMR and RDMA write WQE definitions
This patch adds the struct defining UMR and RDMA write WQEs.

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:51:18 +02:00
Dekel Peled
1a2d8c3ffe common/mlx5: support DevX register write access
This patch adds support of write operation to NIC registers.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Dekel Peled
f85e9a395d common/mlx5: add crypto register structs and definitions
Encryption key management requires use of several related registers.
This patch adds the relevant structs and values, according to PRM
definitions.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Dekel Peled
abda4fd9bb common/mlx5: support general object credential
CREDENTIAL object is used for any crypto operation in wrapped mode.

This patch add support of CREDENTIAL object create operation.
Add reading of CREDENTIAL support capability.
Add function to create general object type CREDENTIAL, using DevX API.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Shiri Kuzin
c31f3f7f7b common/mlx5: share Verbs device match function
The get_ib_device_match function iterates over the list of ib devices
returned by the get_device_list glue function and returns the ib device
matching the provided address.

Since this function is in use by several drivers, in this patch we
share the function in common part.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Shiri Kuzin
25245d5dc9 common/mlx5: share hash list tool
In order to use the hash list defined in net in other drivers, the
hash list is moved to common utilities.

In addition, the log definition was moved from the common utilities to
a dedicated new log file in common in order to prevent a conflict.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Dekel Peled
d5ee804d04 common/mlx5: add crypto BSF struct and definitions
This patch adds the struct defining crypto BSF segment of UMR WQE,
and the related value definitions and offsets.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:31 +02:00
Dekel Peled
38e4780b25 common/mlx5: support general object crypto login
CRYPTO_LOGIN Object is used to login to the device as crypto user
or crypto officer.
Required in order to perform any crypto related control operations.

This patch adds support of CRYPTO_LOGIN object create operation.
Add reading of CRYPTO_LOGIN support capability.
Add function to create general object type CRYPTO_LOGIN, using DevX API.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:42:24 +02:00
Dekel Peled
21ca2494ac common/mlx5: support general object KEK import
IMPORT_KEK object is used to wrap (encrypt) critical security
parameters, such as other keys and credentials, when those need
to be passed between the device and the software.

This patch add support of IMPORT_KEK object create operation.
Add reading of IMPORT_KEK support capability.
Add function to create general object type IMPORT_KEK, using DevX API.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:47 +02:00
Dekel Peled
0111a74e13 common/mlx5: adjust DevX mkey fields for crypto
MKEY that will be used for crypto purposes must be created with
crypto_en and remote access attributes.
This patch adds support for them in the DevX MKEY context.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:45 +02:00
Dekel Peled
178d8c506e common/mlx5: support general object DEK
Data Encryption Keys (DEKs) are the keys used for data
encryption/decryption operations.

Add reading of DEK support capability.
Add function to create general object type DEK, using DevX API.

Arrange common version.map file in alphabetical order.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:41 +02:00
Dekel Peled
f7d1f11ced common/mlx5: add HCA capabilities for AES-XTS crypto
Update the PRM structure and HCA capabilities reading, to include
relevant capabilities for AES-XTS crypto.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:39 +02:00
Dekel Peled
876d4702b1 common/mlx5: optimize read of general capabilities
General object types support is indicated in bitmap general_obj_types,
which is part of HCA capabilities list.
Currently this bitmap is read multiple times, and each time a different
bit is extracted.

This patch optimizes the code, reading the bitmap once into a local
variable, and then extracting the required bits.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:38 +02:00
Dekel Peled
753a7c08e2 common/mlx5: rename GENEVE TLV option object
Rename MLX5_OBJ_TYPE_GENEVE_TLV_OPT as
MLX5_GENERAL_OBJ_TYPE_GENEVE_TLV_OPT, to align with other general
objects names.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:34 +02:00
Dekel Peled
97dcf0567e common/mlx5: remove redundant spaces in PRM header
File drivers/common/mlx5/mlx5_prm.h includes structs representing
data items as defined in PRM document.
Some of these structs were copied as-is from kernel file mlx5_ifc.h.
As result the structs are not all aligned with the same spacing.

This patch removes redundant spaces and new lines from several structs,
to align all structs in mlx5_prm.h to the same format.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:32 +02:00
Bruce Richardson
245efe544d raw/ioat: report status of completed jobs
Add improved error handling to rte_ioat_completed_ops(). This patch adds
new parameters to the function to enable the user to track the completion
status of each individual operation in a batch. With this addition, the
function can help the user to determine firstly, how many operations may
have failed or been skipped and then secondly, which specific operations
did not complete successfully.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:43:50 +02:00
Kevin Laatz
29cf9c1194 raw/ioat: add API to query remaining ring space
Add a new API to query remaining descriptor ring capacity. This API is
useful, for example, when an application needs to enqueue a fragmented
packet and wants to ensure that all segments of the packet will be enqueued
together.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:40:50 +02:00
Bruce Richardson
74464005a2 raw/ioat: rework SW ring layout
The ring management in the idxd part of the driver is more complex than
it needs to be, tracking individual batches in a ring and having null
descriptors as padding to avoid having single-operation batches. This can
be simplified by using a regular ring-based layout, with additional
overflow at the end to ensure that the one does not need to wrap within a
batch.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:37:47 +02:00
Bruce Richardson
f82c87eb14 raw/ioat: move idxd functions to separate file
Split the rte_ioat_rawdev_fns.h file into two separate headers, so that
the data structures for the original ioat devices and the newer idxd
ones can be kept separate from each other. This makes code management
and rework easier.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:33:09 +02:00
Bruce Richardson
b7aaf417f9 raw/ioat: add bus driver for device scanning automatically
Rather than using a vdev with args, DPDK can scan and initialize the
devices automatically using a bus-type driver. This bus does not need to
worry about registering device drivers, rather it can initialize the
devices directly on probe.

The device instances (queues) to use are detected from /dev with the
additional info about them got from /sys.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:29:06 +02:00
Kevin Laatz
d38b62cd6c raw/ioat: allow perform operations function to return error
Change the return type for the rte_ioat_perform_ops() function from void to
int to allow the possibility of returning an error code in future, should
it be necessary.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
2021-05-04 17:26:38 +02:00
Bruce Richardson
c982132144 raw/ioat: make workqueue name configurable in script
Add a "--name-prefix" parameter to the quick configuration script for
DSA. This allows the queues configured on a DSA instance to be made
available to only one DPDK process in a setup with multiple DPDK process
instances.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:13:55 +02:00
Bruce Richardson
cfb286ab2b raw/ioat: fix script for configuring small number of queues
The dpdk_idxd_cfg.py script included with the driver for convenience did
not work properly where the number of queues to be configured was
less than the number of groups or engines. This was because there would
be configured groups/engines not assigned to queues. Fix this by
limiting the engine and group counts to be no bigger than the number of
queues.

Fixes: 01863b9d2354 ("raw/ioat: include example configuration script")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:12:25 +02:00
Bruce Richardson
a2bc5d7bcc raw/ioat: expand descriptor struct to full 64 bytes
Although it's unused by the driver, add the interrupt handle field in
the descriptor to the descriptor structure for completeness, and
explicitly add the reserved padding field on the end of the structure
too. This means that when a descriptor is defined on the stack, or
initialized by the compiler, the unused/reserved space will be zeroed
appropriately.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:09:47 +02:00
Bruce Richardson
cb235af84d raw/ioat: add component prefix to log messages
Add the driver prefix "IOAT" to log messages for the driver.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:07:19 +02:00
Bruce Richardson
2ef79bea8f raw/ioat: support limiting queues for idxd PCI device
When using a full device instance via vfio, allow the user to specify a
maximum number of queues to configure rather than always using the max
number of supported queues.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:04:46 +02:00
Bruce Richardson
55918bff36 raw/ioat: add unit tests for completion batching
Add in additional unit tests to verify that we can get completion reports
of multiple batches in a single completed_ops() call. Also verify we can
get smaller number of completions if that is requested too.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 16:06:35 +02:00
Bruce Richardson
7d5cfaa750 build: fix formatting of Meson lists
Running "./devtools/check-meson.py --fix" on the DPDK repo fixes a
number of issues with whitespace and formatting of files:

* indentation of lists
* missing trailing commas on final list element
* multiple list entries per line when list is not all single-line

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 15:01:47 +02:00
Dmitry Kozlyuk
b5674be414 net/pcap: build on Windows
Implement OS-dependent functions and enable build for Windows.
Account for different library name in Windows libpcap distributions.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2021-04-21 23:48:38 +02:00
Dmitry Kozlyuk
436c089a52 net/pcap: move OS-dependent code to separate files
PCAP PMD queries interface information differently for Linux and
FreeBSD, OS-specific code is guarded by #ifdef. This PMD also depends on
POSIX bits, namely gettimeofday() and NAME_MAX.

Move OS-dependent code to separate files.
Replace POSIX bits with DPDK equivalents.
Rename rte_eth_pcap.c to pcap_ethdev.c, like it is in most other PMDs.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-21 23:48:31 +02:00
Chengwen Feng
4a8ab48ec4 net/e1000/base: fix timeout for shadow RAM write
This fixes the timed out for shadow RAM write EEWR can't be detected.

Fixes: 5a32a257f957 ("e1000: more NICs in base driver")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-04-21 16:41:13 +02:00
Murphy Yang
ff04964ea6 net/i40e: fix flow director for common pctypes
Currently, FDIR doesn't work for all common PCTYPEs, the root cause is
that input set is not configured.

Fixes: 4a072ad43442 ("net/i40e: fix flow director config after flow validate")
Cc: stable@dpdk.org

Signed-off-by: Murphy Yang <murphyx.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2021-04-21 16:38:37 +02:00
Ivan Malov
55c1238246 net/sfc: add more debug messages to transfer flows
These are really helpful when it comes to tracking
resource sharing and debugging various leaks.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-04-21 12:38:37 +02:00
Ivan Malov
33dd909e16 net/sfc: revise FW RSRC free error logs in transfer rules
The current code simply forwards FW resource free failure
to the application leaving the operation incomplete. This
stalls the application and makes debugging very difficult.

Make the driver proceed with handling FW resource free in
the case of errors. Add explicit error logging statements.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-04-21 12:38:37 +02:00
Ivan Malov
d8caafcbf9 net/sfc: fix outer rule and encap rollback on error
Add missing statements to invalidate MAE resource IDs.

Fixes: dadff137931c ("net/sfc: support encap flow items in transfer rules")
Fixes: 1bbd1ec2348a ("net/sfc: support action VXLAN encap in MAE backend")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-04-21 12:38:37 +02:00
Li Zhang
5f0d54f372 ethdev: add pre-defined meter policy API
Currently, the flow meter policy does not support multiple actions
per color; also the allowed action types per color are very limited.
In addition, the policy cannot be pre-defined.

Due to the growing in flow actions offload abilities there is a potential
for the user to use variety of actions per color differently.
This new meter policy API comes to allow this potential in the most ethdev
common way using rte_flow action definition.
A list of rte_flow actions will be provided by the user per color
in order to create a meter policy.
In addition, the API forces to pre-define the policy before
the meters creation in order to allow sharing of single policy
with multiple meters efficiently.

meter_policy_id is added into struct rte_mtr_params.
So that it can get the policy during the meters creation.

Allow coloring the packet using a new rte_flow_action_color
as could be done by the old policy API.

Add two common policy template as macros in the head file.

The next API function were added:
- rte_mtr_meter_policy_add
- rte_mtr_meter_policy_delete
- rte_mtr_meter_policy_update
- rte_mtr_meter_policy_validate
The next struct was changed:
- rte_mtr_params
- rte_mtr_capabilities
The next API was deleted:
- rte_mtr_policer_actions_update

To support this API the following app were changed:
app/test-flow-perf: clean meter policer
app/testpmd: clean meter policer

To support this API the following drivers were changed:
net/softnic: support meter policy API
1. Cleans meter rte_mtr_policer_action.
2. Supports policy API to get color action as policer action did.
   The color action will be mapped into rte_table_action_policer.

net/mlx5: clean meter creation management
Cleans and breaks part of the current meter management
in order to allow better design with policy API.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-04-21 12:22:17 +02:00
Siwar Zitouni
fa1d598844 net/ice: fix disabling promiscuous mode
When promiscuous mode is disabled, allmulticast is
also disabled, even if it was previously enabled.

Add a test in ice_promisc_disable()
to check if allmulticast should be kept enabled.

Fixes: c945e4bf9063 ("net/ice: support promiscuous mode")
Cc: stable@dpdk.org

Signed-off-by: Thibaut Collet <thibaut.collet@6wind.com>
Signed-off-by: Siwar Zitouni <siwar.zitouni@6wind.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-04-20 16:05:45 +02:00
Leyi Rong
146ffa81d0 net/i40e: add Tx preparation for simple Tx datapath
Introduce i40e_simple_prep_pkts() as the preparation function for
simple Tx data path, as it's for sanity check for simple Tx.

Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2021-04-20 16:01:15 +02:00
Li Zhang
2d2cef5d4f net/mlx5: allow multiple flow tables on same level
The driver devices support creation of multiple flow tables.
Jump action can be used in order to move the packet steering
to different flow table.
Table 0 is always the root table for packet steering.

Jumping between tables may cause endless loops in steering mechanism,
that's why each table has level attribute,
the driver sub-system may not allow jumping to table with
equal or lower level than the current table.

Currently, in the driver, the table ID and level are always identical.

Allow multiple flow table creation with the same level attribute.

This patch adds the table id in flow table data entry, while
allocates the flow table, if the table level is same but the
different table id, the new table will be allocated with new
table object id. It supports 4M multiple flow tables on the
same level.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-04-21 08:28:12 +02:00