5141 Commits

Author SHA1 Message Date
Nipun Gupta
cb43641e73 app/testpmd: update raw flow to take hex input
This patch enables method to provide key and mask for raw rules
to be provided as hexadecimal values. There is new parameter
pattern_mask added to support this.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2022-02-03 15:12:05 +01:00
Ciara Loftus
fa4dfda5fe net/af_xdp: use libxdp if available
AF_XDP support is deprecated in libbpf since v0.7.0 [1]. The libxdp library
now provides the functionality which once was in libbpf and which the
AF_XDP PMD relies on. This commit updates the AF_XDP meson build to use the
libxdp library if a version >= v1.2.2 is available. If it is not available,
only versions of libbpf prior to v0.7.0 are allowed, as they still contain
the required AF_XDP functionality.

libbpf still remains a dependency even if libxdp is present, as we use
libbpf APIs for program loading.

The minimum required kernel version for libxdp for use with AF_XDP is v5.3.
For the library to be fully-featured, a kernel v5.10 or newer is
recommended. The full compatibility information can be found in the libxdp
README.

v1.2.2 of libxdp includes an important fix required for linking with DPDK
which is why this version or greater is required. Meson uses pkg-config to
verify the version of libxdp on the system, so it is necessary that the
library is discoverable using pkg-config in order for the PMD to use it. To
verify this, you can run: pkg-config --modversion libxdp

[1] https://github.com/libbpf/libbpf/commit/277846bc6c15

Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
2022-02-01 11:08:00 +01:00
John Daley
1f2c7df00d net/enic: support eCPRI matching
eCPRI message can be over Ethernet layer (.1Q supported also) or over
UDP layer. Message header formats are the same in these two variants.

Only up though the first packet header in the PDU can be matched.
RSS on the eCPRI payload is not supported.

Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
2022-01-31 12:14:54 +01:00
Dmitry Kozlyuk
0dff3f26d6 eal: extend --huge-unlink for hugepage file reuse
Expose Linux EAL ability to reuse existing hugepage files
via --huge-unlink=never switch.
Default behavior is unchanged, it can also be specified
using --huge-unlink=existing for consistency.
Old --huge-unlink switch is kept,
it is an alias for --huge-unlink=always.
Add a test case for the --huge-unlink=never mode.

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2022-02-08 21:32:53 +01:00
Dmitry Kozlyuk
2edd037c09 mem: add dirty malloc element support
EAL malloc layer assumed all free elements content
is filled with zeros ("clean"), as opposed to uninitialized ("dirty").
This assumption was ensured in two ways:
1. EAL memalloc layer always returned clean memory.
2. Freed memory was cleared before returning into the heap.

Clearing the memory can be as slow as around 14 GiB/s.
To save doing so, memalloc layer is allowed to return dirty memory.
Such segments being marked with RTE_MEMSEG_FLAG_DIRTY.
The allocator tracks elements that contain dirty memory
using the new flag in the element header.
When clean memory is requested via rte_zmalloc*()
and the suitable element is dirty, it is cleared on allocation.
When memory is deallocated, the freed element is joined
with adjacent free elements, and the dirty flag is updated:

a) If the joint element contains dirty parts, it is dirty:

    dirty + freed + dirty = dirty  =>  no need to clean
            freed + dirty = dirty      the freed memory

   Dirty parts may be large (e.g. initial allocation),
   so clearing them could create unpredictable slowdown.

b) If the only dirty part of the joint element
   is the freed memory, the joint element can be made clean:

    clean + freed + clean = clean  =>  freed memory
    clean + freed         = clean      must be cleared
            freed + clean = clean
            freed         = clean

   This logic naturally reproduces the old behavior
   and always applies in modes when EAL memalloc layer
   returns only clean segments.

As a result, memory is either cleared on free, as before,
or it will be cleared on allocation if need be, but never twice.

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Anatoly Burakov <anatoly.burakov@intel.com>
2022-02-08 21:32:53 +01:00
Dmitry Kozlyuk
1ba4f6735b doc: add hugepage mapping details
Hugepage mapping is a layer of EAL malloc builds upon.
There were implicit references to its details,
like mentions of segment file descriptors,
but no explicit description of its modes and operation.
Add an overview of mechanics used on ech supported OS.
Convert memory management subsections from list items
to level 4 headers: they are big and important enough.

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2022-02-08 21:04:42 +01:00
Haiyue Wang
08c724b327 doc: fix KNI PMD name typo
The KNI PMD name should be "net_kni".

Fixes: 75e2bc54c018 ("net/kni: add KNI PMD")
Cc: stable@dpdk.org

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2022-02-02 21:54:21 +01:00
Tudor Cornea
5569dd7d90 kni: allow configuring thread granularity
The Kni kthreads seem to be re-scheduled at a granularity of roughly
1 millisecond right now, which seems to be insufficient for performing
tests involving a lot of control plane traffic.

Even if KNI_KTHREAD_RESCHEDULE_INTERVAL is set to 5 microseconds, it
seems that the existing code cannot reschedule at the desired granularily,
due to precision constraints of schedule_timeout_interruptible().

In our use case, we leverage the Linux Kernel for control plane, and
it is not uncommon to have 60K - 100K pps for some signaling protocols.

Since we are not in atomic context, the usleep_range() function seems to be
more appropriate for being able to introduce smaller controlled delays,
in the range of 5-10 microseconds. Upon reading the existing code, it would
seem that this was the original intent. Adding sub-millisecond delays,
seems unfeasible with a call to schedule_timeout_interruptible().

KNI_KTHREAD_RESCHEDULE_INTERVAL 5 /* us */
schedule_timeout_interruptible(
        usecs_to_jiffies(KNI_KTHREAD_RESCHEDULE_INTERVAL));

Below, we attempted a brief comparison between the existing implementation,
which uses schedule_timeout_interruptible() and usleep_range().

We attempt to measure the CPU usage, and RTT between two Kni interfaces,
which are created on top of vmxnet3 adapters, connected by a vSwitch.

insmod rte_kni.ko kthread_mode=single carrier=on

schedule_timeout_interruptible(usecs_to_jiffies(5))
kni_single CPU Usage: 2-4 %
[root@localhost ~]# ping 1.1.1.2 -I eth1
PING 1.1.1.2 (1.1.1.2) from 1.1.1.1 eth1: 56(84) bytes of data.
64 bytes from 1.1.1.2: icmp_seq=1 ttl=64 time=2.70 ms
64 bytes from 1.1.1.2: icmp_seq=2 ttl=64 time=1.00 ms
64 bytes from 1.1.1.2: icmp_seq=3 ttl=64 time=1.99 ms
64 bytes from 1.1.1.2: icmp_seq=4 ttl=64 time=0.985 ms
64 bytes from 1.1.1.2: icmp_seq=5 ttl=64 time=1.00 ms

usleep_range(5, 10)
kni_single CPU usage: 50%
64 bytes from 1.1.1.2: icmp_seq=1 ttl=64 time=0.338 ms
64 bytes from 1.1.1.2: icmp_seq=2 ttl=64 time=0.150 ms
64 bytes from 1.1.1.2: icmp_seq=3 ttl=64 time=0.123 ms
64 bytes from 1.1.1.2: icmp_seq=4 ttl=64 time=0.139 ms
64 bytes from 1.1.1.2: icmp_seq=5 ttl=64 time=0.159 ms

usleep_range(20, 50)
kni_single CPU usage: 24%
64 bytes from 1.1.1.2: icmp_seq=1 ttl=64 time=0.202 ms
64 bytes from 1.1.1.2: icmp_seq=2 ttl=64 time=0.170 ms
64 bytes from 1.1.1.2: icmp_seq=3 ttl=64 time=0.171 ms
64 bytes from 1.1.1.2: icmp_seq=4 ttl=64 time=0.248 ms
64 bytes from 1.1.1.2: icmp_seq=5 ttl=64 time=0.185 ms

usleep_range(50, 100)
kni_single CPU usage: 13%
64 bytes from 1.1.1.2: icmp_seq=1 ttl=64 time=0.537 ms
64 bytes from 1.1.1.2: icmp_seq=2 ttl=64 time=0.257 ms
64 bytes from 1.1.1.2: icmp_seq=3 ttl=64 time=0.231 ms
64 bytes from 1.1.1.2: icmp_seq=4 ttl=64 time=0.143 ms
64 bytes from 1.1.1.2: icmp_seq=5 ttl=64 time=0.200 ms

usleep_range(100, 200)
kni_single CPU usage: 7%
64 bytes from 1.1.1.2: icmp_seq=1 ttl=64 time=0.716 ms
64 bytes from 1.1.1.2: icmp_seq=2 ttl=64 time=0.167 ms
64 bytes from 1.1.1.2: icmp_seq=3 ttl=64 time=0.459 ms
64 bytes from 1.1.1.2: icmp_seq=4 ttl=64 time=0.455 ms
64 bytes from 1.1.1.2: icmp_seq=5 ttl=64 time=0.252 ms

usleep_range(1000, 1100)
kni_single CPU usage: 2%
64 bytes from 1.1.1.2: icmp_seq=1 ttl=64 time=2.22 ms
64 bytes from 1.1.1.2: icmp_seq=2 ttl=64 time=1.17 ms
64 bytes from 1.1.1.2: icmp_seq=3 ttl=64 time=1.17 ms
64 bytes from 1.1.1.2: icmp_seq=4 ttl=64 time=1.17 ms
64 bytes from 1.1.1.2: icmp_seq=5 ttl=64 time=1.15 ms

Upon testing, usleep_range(1000, 1100) seems roughly equivalent in
latency and cpu usage to the variant with schedule_timeout_interruptible(),
while usleep_range(100, 200) seems to give a decent tradeoff between
latency and cpu usage, while allowing users to tweak the limits for
improved precision if they have such use cases.

Disabling RTE_KNI_PREEMPT_DEFAULT, interestingly seems to lead to a
softlockup on my kernel.

Kernel panic - not syncing: softlockup: hung tasks
CPU: 0 PID: 1226 Comm: kni_single Tainted: G        W  O 3.10 #1
 <IRQ>  [<ffffffff814f84de>] dump_stack+0x19/0x1b
 [<ffffffff814f7891>] panic+0xcd/0x1e0
 [<ffffffff810993b0>] watchdog_timer_fn+0x160/0x160
 [<ffffffff810644b2>] __run_hrtimer.isra.4+0x42/0xd0
 [<ffffffff81064b57>] hrtimer_interrupt+0xe7/0x1f0
 [<ffffffff8102cd57>] smp_apic_timer_interrupt+0x67/0xa0
 [<ffffffff8150321d>] apic_timer_interrupt+0x6d/0x80

This patch also attempts to remove this option.

References:
[1] https://www.kernel.org/doc/Documentation/timers/timers-howto.txt

Signed-off-by: Tudor Cornea <tudor.cornea@gmail.com>
Acked-by: Padraig Connolly <Padraig.J.Connolly@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2022-02-02 20:45:18 +01:00
Qi Zhang
affa9de474 doc: update matching versions in ice guide
Add recommended matching list for ice PMD in DPDK 21.08 and DPDK 21.11.

Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2022-01-28 09:55:25 +01:00
Nobuhiro Miki
adcf2717cb net/tap: forbid different Rx/Tx queue number
Users can create the desired number of RxQ and TxQ in DPDK. For
example, if the number of RxQ = 2 and the number of TxQ = 5,
a total of 8 file descriptors will be created for a tap device,
including RxQ, TxQ, and one for keepalive. The RxQ and TxQ
with the same ID are paired by dup(2).

In this scenario, Kernel will have 3 RxQ where packets are
incoming but not read. The reason for this is that there are only
2 RxQ that are polled by DPDK, while there are 5 queues in Kernel.
This patch add a checking if DPDK has appropriate numbers of
queues to avoid unexpected packet drop.

Signed-off-by: Nobuhiro Miki <nmiki@yahoo-corp.jp>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2022-01-26 17:18:31 +01:00
Min Hu (Connor)
3ca3dcd651 net/hns3: fix vector Rx/Tx when PTP enabled
If hardware supports IEEE 1588 PTP, PTP capability will be set.
Currently, vec and sve burst is unsupported when PTP capability is set.

For sake of Rx/Tx performance, IEEE 1588 PTP is not supported in sve or
vec burst mode. When enabling IEEE 1588 PTP, Rx/Tx burst mode should be
simple or common. Rx/Tx burst mode could be set like this, for example:
-a 0000:35:00.0,rx_func_hint=common,tx_func_hint=common

This patch supports vec and sve burst when PTP is disabled. And only
support simple or common burst When PTP is enabled.

Fixes: 38b539d96eb6 ("net/hns3: support IEEE 1588 PTP")
Cc: stable@dpdk.org

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2022-01-26 15:52:09 +01:00
Kiran Kumar K
5bffab53f1 net/cnxk: support pre L2 switch header type
Adding changes to configure switch header type pre_l2 for cnxk.
pre_l2 headers are custom headers placed before the ethernet
header. Along with switch header type, user needs to provide the
offset within the custom header that holds the size of the
custom header and mask for the size within the size offset.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Reviewed-by: Satheesh Paul <psatheesh@marvell.com>
2022-01-22 15:05:28 +01:00
Rahul Bhansali
1873218901 net/cnxk: support getting queue status
Provides ethdev callback support of rx_queue_count,
rx_descriptor_status and tx_descriptor_status.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-01-20 07:38:28 +01:00
Hyong Youb Kim
ee806eea59 net/enic: support GENEVE flow item
Recent VIC models can parse GENEVE, including options, and inner
packet headers. Enable GENEVE header and option flow items. Currently,
only the first option that follows the GENEVE header can be matched,
and the GENEVE header item must specify option length.

Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
2022-01-20 16:28:40 +01:00
Gagandeep Singh
72100f0dee net/dpaa2: support level 2 in traffic management
This patch adds support for level 2 for QoS shaping.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2022-01-20 16:24:08 +01:00
Ferruh Yigit
b1cb30352d ethdev: mark old macros as deprecated
Old macros kept for backward compatibility, but this cause old macro
usage to sneak in silently.

Marking old macros as deprecated. Downside is this will cause some noise
for applications that are using old macros.

Fixes: 295968d17407 ("ethdev: add namespace")

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2022-01-13 17:56:20 +01:00
Qi Zhang
fd5ad5638e net/ice: fix Tx checksum offload capability
Add missing capability for outer UDP Tx checksum.
Also fixed the feature list in ice_dcf.ini

Fixes: bf89db4409bb ("net/ice: complete device info get in DCF")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-01-02 09:25:26 +01:00
Satheesh Paul
18652b0f78 net/cnxk: add devargs for configuring SDP channel mask
This patch adds support to configure channel mask which will
be used by rte flow when adding flow rules on SDP interfaces.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-12-21 11:18:53 +01:00
Anoob Joseph
759b5e6535 crypto/cnxk: support AES-CMAC
Add support for AES CMAC auth algorithm.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-01-21 10:17:35 +01:00
Anoob Joseph
7f4977e889 crypto/cnxk: support AES-XCBC and null cipher
Add support for AES XCBC and NULL cipher.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-01-21 10:17:35 +01:00
Tejasree Kondoj
538bf10043 crypto/cnxk: support lookaside IPsec AES-CTR
Adding AES-CTR support to cnxk CPT in
lookaside IPsec mode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-01-21 10:17:35 +01:00
Tejasree Kondoj
09e5c772fa crypto/cnxk: support lookaside IPsec HMAC-SHA384/512
Adding HMAC-SHA384/512 support to cnxk lookaside IPsec.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-01-21 09:40:01 +01:00
Tejasree Kondoj
6dc3f45fd4 crypto/cnxk: support lookaside IPsec AES-CBC-HMAC-SHA256
Adding AES-CBC-HMAC-SHA256 support to lookaside IPsec PMD.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-01-21 09:40:01 +01:00
Naga Harish K S V
6ff2363130 eventdev/eth_rx: add event port get API
This patch introduces new api for retrieving event port id
of eth rx adapter.

Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
2022-01-23 16:29:43 +01:00
Pavan Nikhilesh
8bdbae66b2 event/cnxk: add external clock support for timer
Add external clock support for cnxk timer adapter.

External clock mapping is as follows:
RTE_EVENT_TIMER_ADAPTER_EXT_CLK0 = TIM_CLK_SRC_10NS,
RTE_EVENT_TIMER_ADAPTER_EXT_CLK1 = TIM_CLK_SRC_GPIO,
RTE_EVENT_TIMER_ADAPTER_EXT_CLK2 = TIM_CLK_SRC_PTP,
RTE_EVENT_TIMER_ADAPTER_EXT_CLK3 = TIM_CLK_SRC_SYNCE,

TIM supports clock input from external GPIO, PTP, SYNCE clocks.
Input resolution is adjusted based on CNTVCT frequency for better
estimation.

Since TIM is unaware of input clock frequency, application is
expected to pass the frequency.
Example:
	-a 0002:0e:00.0,tim_eclk_freq=122880000-0-0

The order of frequencies above is GPIO-PTP-SYNCE.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-01-20 14:44:59 +01:00
Rashmi Shetty
7fe2d346af doc: fix dlb2 guide
Number of direct credits, atomic inflight and history list are
updated to DLB2.0 supported sizes. As DLB2.0 does not provide
dev arg to override the default per-queue atomic inflight
allocation, it is removed from the documentation.

Fixes: f3cad285bb88 ("event/dlb2: add infos get and configure")
Cc: stable@dpdk.org

Signed-off-by: Rashmi Shetty <rashmi.shetty@intel.com>
Reviewed-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-01-20 12:46:06 +01:00
Ferruh Yigit
1dcbc676d5 examples/performance-thread: remove
Remove sample application which is not clear if it is still relevant.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
2022-01-20 14:30:59 +01:00
Bruce Richardson
cadb255e25 eal: add OS defines for C conditional checks
Define a set of macros in the build configuration to allow C runtime
code to check the current OS environment. This saves the user having to
use ifdefs for e.g. disabling particular tests on Windows.
See included documentation changes for usage examples.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-01-17 19:26:42 +01:00
Jerin Jacob
33e71acf3d drivers: remove octeontx2 drivers
As per the deprecation notice,  In the view of enabling unified driver
for octeontx2(cn9k)/octeontx3(cn10k), removing drivers/octeontx2
drivers and replace with drivers/cnxk/ which
supports both octeontx2(cn9k) and octeontx3(cn10k) SoCs.

This patch does the following

- Replace drivers/common/octeontx2/ with drivers/common/cnxk/
- Replace drivers/mempool/octeontx2/ with drivers/mempool/cnxk/
- Replace drivers/net/octeontx2/ with drivers/net/cnxk/
- Replace drivers/event/octeontx2/ with drivers/event/cnxk/
- Replace drivers/crypto/octeontx2/ with drivers/crypto/cnxk/
- Rename config/arm/arm64_octeontx2_linux_gcc as
  config/arm/arm64_cn9k_linux_gcc
- Update the documentation and MAINTAINERS to reflect the same.
- Change the reference to OCTEONTX2 as OCTEON 9. Old release notes and
the kernel related documentation is not accounted for this change.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
2022-01-12 15:36:32 +01:00
Liron Himi
72c00ae9db regex/cn9k: use cnxk infrastructure
update driver to use the REE cnxk code
replace octeontx2/otx2 with cn9k

Signed-off-by: Liron Himi <lironh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-01-12 15:33:49 +01:00
Kevin Traynor
3f993907ee doc: update LTS release cadence
Regular LTS releases have previously aligned to DPDK main branch
releases so that fixes being backported have already gone through
DPDK main branch release validation.

Now that DPDK main branch has moved to 3 releases per year, the LTS
releases should continue to align with it and follow a similar release
cadence.

Update stable docs to reflect this.

Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
2022-01-11 17:52:11 +01:00
Thomas Monjalon
2654ce5c56 doc: replace deprecated distutils version parsing
When using Python 3.10, this warning appears:
  DeprecationWarning: The distutils package is deprecated
  and slated for removal in Python 3.12.
  Use setuptools or check PEP 632 for potential alternatives

The PEP 632 recommends replacing "distutils.version" with "packaging".

Bugzilla ID: 914
Cc: stable@dpdk.org

Reported-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Tested-by: Jerin Jacob <jerinj@marvell.com>
2022-01-11 14:33:09 +01:00
Josh Soref
7be78d0279 fix spelling in comments and strings
The tool comes from https://github.com/jsoref

Signed-off-by: Josh Soref <jsoref@gmail.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2022-01-11 12:16:53 +01:00
David Marchand
042f5a355a version: 22.03-rc0
Start a new release cycle with empty release notes.
Bump version and ABI minor.
Enable ABI checks.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-12-02 21:36:19 +01:00
Viacheslav Ovsiienko
bef7c9ff28 ethdev: announce migration to generic flow modify action
The generic RTE_FLOW_ACTION_TYPE_MODIFY_FIELD action was
introduced by [1]. This action provides an unified way
to perform various arithmetic and transfer operations over
packet network header fields and packet metadata.

[1] 73b68f4c54a0 ("ethdev: introduce generic modify flow action")

On other side there are a bunch of multiple legacy actions,
that can be superseded by the generic MODIFY_FIELD action:

RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL
RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL
RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL
RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL      sfc
RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT
RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN
RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC       bnxt, cxgbe, mlx5
RTE_FLOW_ACTION_TYPE_SET_IPV4_DST       bnxt, cxgbe, mlx5
RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC       cxgbe, mlx5
RTE_FLOW_ACTION_TYPE_SET_IPV6_DST       cxgbe, mlx5
RTE_FLOW_ACTION_TYPE_SET_TP_SRC         cxgbe, mlx5
RTE_FLOW_ACTION_TYPE_SET_TP_DST         cxgbe, mlx5
RTE_FLOW_ACTION_TYPE_DEC_TTL            mlx5, sfc
RTE_FLOW_ACTION_TYPE_SET_TTL            mlx5
RTE_FLOW_ACTION_TYPE_SET_MAC_SRC        cxgbe, mlx5
RTE_FLOW_ACTION_TYPE_SET_MAC_DST        cxgbe, mlx5
RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ        mlx5
RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ        mlx5
RTE_FLOW_ACTION_TYPE_INC_TCP_ACK        mlx5
RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK        mlx5
RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP      mlx5
RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP      mlx5
RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID    bnxt, cnxk, cxgbe, enic,
                                        mlx5, octeontx2, sfc
RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP    bnxt, cnxk, cxgbe, enic,
                                        mlx5, octeontx2, sfc
RTE_FLOW_ACTION_TYPE_SET_TAG            mlx5
RTE_FLOW_ACTION_TYPE_SET_META           mlx5

This note deprecates the following RTE Flow actions,
as not supported by any of PMDs:

RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL
RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL
RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL
RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT
RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN

The following actions are supposed to be deprecated in 22.07
and replaced by generic field modify action:

RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL
RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC
RTE_FLOW_ACTION_TYPE_SET_IPV4_DST
RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC
RTE_FLOW_ACTION_TYPE_SET_IPV6_DST
RTE_FLOW_ACTION_TYPE_SET_TP_SRC
RTE_FLOW_ACTION_TYPE_SET_TP_DST
RTE_FLOW_ACTION_TYPE_DEC_TTL
RTE_FLOW_ACTION_TYPE_SET_TTL
RTE_FLOW_ACTION_TYPE_SET_MAC_SRC
RTE_FLOW_ACTION_TYPE_SET_MAC_DST
RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ
RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ
RTE_FLOW_ACTION_TYPE_INC_TCP_ACK
RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK
RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP
RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP
RTE_FLOW_ACTION_TYPE_SET_TAG
RTE_FLOW_ACTION_TYPE_SET_META

The VLAN set actions are interrelated to VLAN header insertion/removal
and supported by multiple PMDs and widely used by applications and
not supposed to be deprecated due to potential large impact on
drivers and applications.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2021-11-26 18:02:49 +01:00
Ciara Power
bcafd1733e doc: add details for new test structure
The testing guide is now updated to include details about
using sub-testsuites.
Some example code is given to demonstrate how they can be used.

A note is also added to highlight the need for using vdev EAL args
when running cryptodev tests.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2021-11-26 17:51:17 +01:00
Aaron Conole
959710f16d doc: add a guide for developing unit tests
The DPDK testing infrastructure includes a comprehensive set of
libraries, utilities, and CI integrations for developers to test
their code changes.  This isn't well documented, however.

Document the basics for adding a test suite to the infrastructure
and enabling that test suite for continuous integration platforms
so that newer developers can understand how to develop test suites
and test cases.

Signed-off-by: Aaron Conole <aconole@redhat.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2021-11-26 17:50:09 +01:00
Sunil Kumar Kori
f2577859be doc: add eventdev feature matrices
Patch adds feature matrices for event dev, Rx/Tx, Crypto
and Timer adapters.

Along with, .ini files are added for all supported PMDs.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-11-26 16:29:25 +01:00
Vladimir Medvedkin
f3aa363df2 doc: add RIB and FIB programmer guides
Currently, programmer's guide for the RIB and FIB libraries are missing.
This commit adds them.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Reviewed-by: Conor Walsh <conor.walsh@intel.com>
2021-11-26 15:47:23 +01:00
Kefu Chai
6c16a05c8c doc: fix a typo in EAL guide
Change from "how many segments each segment can have" to
"how many segments each segment list can have".

Fixes: b31739328354 ("doc: update guides for memory subsystem")
Cc: stable@dpdk.org

Signed-off-by: Kefu Chai <tchaikov@gmail.com>
2021-11-26 15:20:50 +01:00
Juraj Linkeš
9cd9c57061 doc: replace machine option in build guide
Update the docs to reflect the two new variables, cpu_instruction_set
for non-arm builds and platform for arm builds.

Fixes: bf66003b51ec ("build: use platform for generic and native builds")

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
2021-11-26 15:10:16 +01:00
Jerin Jacob
44f44b803b doc: add traffic metering API walk-through
Added a diagram to document meter library components
and added text for steps performed by the application to
configure the traffic meter and policing library.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2021-11-26 15:09:15 +01:00
Ray Kinsella
a2a43d3a3d doc: fix typos in examples code
Fix documentation typos that are generating spurious CI warnings.

Fixes: 9a212dc06c7a ("doc: use code snippets in sample app guides")

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Aaron Conole <aconole@redhat.com>
Reviewed-by: Conor Walsh <conor.walsh@intel.com>
2021-11-26 14:41:31 +01:00
Raslan Darawsheh
b34bf915c1 doc: add tested platforms with Mellanox NICs
Add tested platforms with Mellanox NICs to the 21.11 release notes.

Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
2021-11-26 14:41:31 +01:00
Apeksha Gupta
32e06ccfd8 doc: add tested platforms with NXP SoCs
Add tested NXP platform to v21.11 release note for NXP enetfec PMD.

Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
2021-11-26 14:41:31 +01:00
David Hunt
7580f97338 doc: add power management scale mode reaction time note
When using PMD Power Management, scale mode reacts slower than
monitor mode and pause mode. Add note in user guide to this
effect.

Signed-off-by: David Hunt <david.hunt@intel.com>
2021-11-26 14:24:23 +01:00
Dariusz Sosnowski
6965091e0b doc: fix typo in coding style
This patch fixes a typo in DPDK Coding Style, in Return Values section,
i.e. replaces "indicated may" with "indicated by".

Fixes: 36032e46be40 ("doc: add coding style")
Cc: stable@dpdk.org

Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-11-26 11:28:34 +01:00
Sean Morrissey
35bd0a5c58 doc: capitalise PMD
The doc's contain references to pmd but the proper use is to use PMD.

Cc: stable@dpdk.org

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Reviewed-by: Conor Walsh <conor.walsh@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-11-26 11:28:34 +01:00
Sean Morrissey
f8dbaebbf1 fix PMD wording
Removing the use of driver following PMD as its unnecessary.

Cc: stable@dpdk.org

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
Signed-off-by: Conor Fogarty <conor.fogarty@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Reviewed-by: Conor Walsh <conor.walsh@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-11-26 11:28:34 +01:00
Bruce Richardson
8f86ffa631 devtools: clarify that lines up to 100 characters are ok
Since we allow line lengths of up to 100, and the CI checkpatches job
only check for that amount, the rest of our tooling and docs should
reflect this reality. Therefore we can:

* adjust the editorconfig to use that value, to save editors (e.g. vim)
  from automatically wrapping lines at 80 characters when typing.
  [Since python checkers all seem to expect 79 character lines max, add
  for python only a 79-char max line length.]

* change the default line length setting in checkpatches script to 100
  so as it matches CI and pre-merge checks.

* update the docs to clarify that while 80 chars is recommended, up to
  100 characters is acceptable.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Conor Walsh <conor.walsh@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-11-25 11:51:24 +01:00