Commit Graph

332 Commits

Author SHA1 Message Date
Qi Zhang
e15b319bd3 net/ice/base: fix NVGRE switch rule programming
Correct for GRE/NVGRE training packets to include the
correct protocol IDs for TCP and UDP respectively.

Fixes: b83a0c2903 ("net/ice/base: fix inner TCP and UDP support for GRE")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
2048f3a965 net/ice/base: fix adding PPPoE switch rule
Update VLAN protocol ID to correct value for single VXLAN scenario.
Fix the missing ethertype offset for PPPoE dummy packet offset to
allow matching the corresponding field.

Fixes: d1c2f76b44 ("net/ice/base: support GTP and PPPoE protocols")

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Gavin Hu
8669e6ae05 net/ice: use relaxed and remove duplicate barrier
To guarantee the orderings of successive stores to CIO and MMIO memory,
a lighter weight rte_io_wmb [1] can be used instead of rte_wmb, and since
the ICE_PCI_REG_WRITE API already has an inclusive rte_io_wmb, this
explicit call can even be saved.

[1] http://git.dpdk.org/dpdk/tree/lib/librte_eal/common/include/generic/
rte_atomic.h#n98

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-08 12:14:30 +02:00
Stephen Hemminger
c67c8c5c14 net/ice: use dynamic log type for Tx/Rx debug
The generic RTE_LOGTYPE_PMD is a historical relic and should
not be used. Every driver must dynamic log types.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 15:00:58 +02:00
Chenxu Di
bd513ece3c net/ice: release port upon close
Set RTE_ETH_DEV_CLOSE_REMOVE upon probe so all the private resources
 for the port can be freed by rte_eth_dev_close().

Signed-off-by: Chenxu Di <chenxux.di@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:57 +02:00
Haiyue Wang
13676bd300 net/ice: remove legacy Rx descriptor definition
Since now the ice PMD only handles Rx Flex descriptor, so remove the
legacy descriptor definition.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Leyi Rong
4ab7dbb0a0 net/ice: switch to Rx flexible descriptor in AVX path
Switch to Rx flexible descriptor format instead of legacy
descriptor format.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Wenzhuo Lu
ece1f8a8f1 net/ice: switch to flexible descriptor in SSE path
With this path, the flexible descriptor is supported
in SSE path. And the legacy descriptor is not supported.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Haiyue Wang
7e124ff12c net/ice: support protocol extraction per Rx queue
The ice has the feature to extract protocol fields into flex descriptor
by programming per queue. Currently, the ice PMD will put the protocol
fields into rte_mbuf::udata64 with different type format. Application
can access the protocol fields quickly.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Haiyue Wang
dbf3c0e77a net/ice: handle Rx flex descriptor
Set the RXDID with flex descriptor type by default, change the Rx
function to support new descriptor handling.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Haiyue Wang
ae2e9514ee net/ice: add Rx flex descriptor definition
The Rx flex descriptor has 16B and 32B size, with different
field definitions compared to legacy type.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
3ac83b1141 net/ice/base: remove unused code
Remove unused code.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
53c4d83e41 net/ice/base: support switch for IPv6 TC field
Add support for IPv6 traffic class (tc) field for switch rule.
Correct ice_ipv6_hdr based on the IPv6 Protocol using bitfields.
Add big/little endian convert for tc field before it is inserted,
since tc is only one byte and also does not have a byte-aligned
offset.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
f19c0a84c5 net/ice/base: fix packet type bitmap
Before this patch, IPv4 and UDP inner hash rule will be over
written by later rules after RSS initialization phase. This is
because the PTYPE bitmap table cover some PTYPEs belong to another
PTGs. And some PTYPEs are reserved. Remove these PTYPEs in TCP,
UDP, SCTP and ipv4 bitmap table.

Fixes: aa1cd410fa ("net/ice/base: add flow module")

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
8dad92662b net/ice/base: fix alignment
As title says, fix an alignment issue.

Fixes: 51d04e4933 ("net/ice/base: add flexible pipeline module")
Cc: stable@dpdk.org

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
fadf46b1ee net/ice/base: use bitmap copy where appropriate
ice_cp_bitmap() already exists and should be used instead of
using ice_memcpy().  Note, there are a couple comments that suggest
using a bitmap-specific copy function, but those are not correct
since the source block of memory is not a bitmap.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
737dcad0f8 net/ice/base: remove unnecessary error log
Remove the error log message when attempting to download a
package that has an unsupported version.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
4831259477 net/ice/base: fix 4 bytes alignment for PPPoE dummy packet
Add two bytes to meet the requirement of 4 bytes alignment for dummy
packet for creating switch rule for PPPoE.

Fixes: d1c2f76b44 ("net/ice/base: support GTP and PPPoE protocols")

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
2ed5eb0caa net/ice/base: search field vector indices for result slots
Previously, switch code would use only pre-reserved index
slots at the end of each field vector for recipe result index
locations. This patch adds code that detects other internal
empty index slots that could potentially be used. For each
recipe that is added, a determ ination is made as to whether
any of these additional index slots alige with all the profiles
selected for the recipe; if alignment is achieved, then these
result index slots can be used.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
ef2bf3dee2 net/ice/base: remove unused DDP package macros
Macros no longer be used and can be removed

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
0dc55879ce net/ice/base: fix segment in remove existing RSS rule
Before this patch, RSS tunneled rules can not be destroyed at runtime.
This is because it can not find the existing matching profile for tunnels.
segs[0] should always be zero and all matched, segs[1] for inner part.
It only construct one segment.

This patch modifies construct segment in ice_rem_rss_cfg_sync() to
match ice_add_rss_cfg_sync().

Fixes: b7d34ccc47 ("net/ice/base: packet encapsulation for RSS")

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
7818106ce6 net/ice/base: fix bitmap for TCP in RSS
Before this patch, if set rule for IPv4 first and then set rule
for TCP with IPv4. The first rule for inner IP will be overwritten
by TCP rule. This is because MAC_IPV6_TUN_MAC_IPV4_PAY using the
same ptgs PTG_TUN_INNER_IPV4_OTHER with MAC_IPV4_TUN_MAC_IPV4_PAY,
this ptype should not in TCP bitmap.
Remove this bit in TCP bitmap.

Fixes: aa1cd410fa ("net/ice/base: add flow module")
Cc: stable@dpdk.org

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
b5c274f4e2 net/ice/base: support FDIR for GTPU QFI field
Add GTPU qfi field support for flow director. Note that for GTPU pkt,
only qfi field (6 bits) can be set for FD. The supported GTPU pkts are
defined as:
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER (FRAG and PAY belong to this)

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
3a010f01d3 net/ice/base: replace alloc-followed-by-copy with memdup
ice_memdup() is preferred over an alloc immediately followed by a copy.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
ddae044035 net/ice/base: enable symmetric hash for RSS
Add parameter "symm" to rss configuration APIs.
When symm is 1, Symmetric Teoplitz Hash can be enabled by
configuring GLQF_HSYMM properly.

NOTE:
Symmetric Teoplitz hash will work only if hash schema of
VSIQF_HASH_CTL be configured to 01b and it is assumed be enabled
in PMD.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
29897f43a1 net/ice/base: update FW API minor version
Update FW API minor version to align to current value advertised
by FW in NVM images.

Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
bf8d075f73 net/ice/base: support destination MAC field for FDIR
Add dest MAC address support so that this field can be matched when
we set Flow Director filter with dst addr for MAC.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
70b14768e3 net/ice/base: enable setting up FDIR counters
Enable getting value from input to set up flow director counters,
so that the FDIR counters can count none, packets only, bytes only
or both packets and bytes as demanded.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
34c6724765 net/ice/base: enable FDIR queue region
Add fdir queue region support.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
b2ad03452a net/ice/base: enable RSS for PPPoE with SCTP
Add two ptypes(MAC_PPPOE_IPV4_SCTP and MAC_PPPOE_IPV6_SCTP) in
sctp ptype bitmap to enable rss.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
d6eed0ddb4 net/ice/base: associate switch recipe to profiles
Properly associate switch recipes to profiles. Previous code was
using the wrong bitfield for updating the associations, which was
causing other PFs to not properly identify and use existing
recipes. This sometimes resulted in rules not being added when it
should have been possible.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
a4b14d3939 net/ice/base: refactor data structure
When declaring the ice_prot_ext, and ice_prot_id_tbl structure,
we can use a fixed length array instead of a variable length one
which helps us catch future code changes that might desynchronize
the enum ice_protocol_type and the structs.  This change also
necessitates removing the last member of the structs which was
just there to be a placeholder.

Also reorder the ice_prot_ext struct to match the ordering in the
associated enum ice_protocol_type.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
5037444203 net/ice/base: support switch rule about VLAN PPPoE
Add support for switch rule about single-VLAN-PPPoE. Note that double
VLAN is not supported by the hardware at this point, therefore only
single-VLAN support for PPPoE is added.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
333e5c9d43 net/ice/base: remove RSS code as iavf host
The DPDK PF doesn't support SRIOV so remove the related iavf host
code.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
cfaeec82d2 net/ice/base: remove null check of port info
The code in ice_sched_cleanup_all checks whether the port info is NULL
prior to calling ice_sched_clear_port.

More importantly, it also checks whether the port structure has been
initialized by checking its port_state field as well.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
bb8851a31d net/ice/base: propagate errors from functions
There could be an error returned from ice_fill_adv_dummy_packet()
so we need to propagate that to the caller. Additionally, the
call to ice_flow_xtract_pkt_flags() could also return an error so
we need to propagate it as well.

Also add in the correct offsets for GENEVE and VXLAN_GPE to the
dummy packets.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
e7858c8b4a net/ice/base: fix mask for checking protocol header
Before this patch, the logic of protocol header checking only support
non-tunneled packet. This patch remove the inner protocol in L3/L4 RSS
seg hdr mask and change the protocol header validation to reflect this.
So, for ice_add_rss_cfg(), the last parameter addl_hdrs could specify
the protocol header for tunnel.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
b726c1a865 net/ice/base: add non-word aligned IPv6 field support
Add non-word aligned field support for IPv6 with hlim, tc and proto.
All these fields are one byte within one word. In order to match
bytes within the IPv6 header for flow director we need to use a mask.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
04e0690800 net/ice/base: add non-word aligned IPv4 field support
Add non-word aligned field support for ipv4 with ttl, tos and proto.
All these fields are one byte within one word. In order to match
bytes within the IPv4 header for flow director we need to use a mask.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
f344a9e11d net/ice/base: support tunnel packets
Add VXLAN tunnel training packets to flow director and change the
interface to support tunnel packets.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
6b1172d4dc net/ice/base: remove redundant empty lines
Remove redundant empty lines

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Ivan Ilchenko
ca041cd44f ethdev: change allmulticast callbacks to return status
Enabling/disabling of allmulticast mode is not always successful and
it should be taken into account to be able to handle it properly.

When correct return status is unclear from driver code, -EAGAIN is used.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
2019-10-07 15:00:55 +02:00
Igor Romanov
9970a9ad07 ethdev: make stats and xstats reset callbacks return int
Change return value of the callbacks from void to int. Make
implementations across all drivers return negative errno
values in case of error conditions.

Both callbacks are updated together because a large number of
drivers assign the same function to both callbacks.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 15:00:54 +02:00
Andrew Rybchenko
9039c81257 ethdev: change promiscuous callbacks to return status
Enabling/disabling of promiscuous mode is not always successful and
it should be taken into account to be able to handle it properly.

When correct return status is unclear from driver code, -EAGAIN is used.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
2019-10-07 15:00:54 +02:00
Ting Xu
03a05924da net/ice: support device-specific DDP package loading
This patch adds the feature that supports loading DDP package
according to the device serial number. Prior to loading the
default DDP package (ice.pkg), the driver will check for the
presence of a device-specific DDP package with the name containing
64-bit PCIe Device Serial Number (ice-xxxxxxxxxxxxxxxx.pkg)
during initialization. Users can use "lspci -vs" to get the device
serial number.
The pkg search path are /lib/firmware/updates/intel/ice/ddp/
and /lib/firmware/intel/ice/ddp/. If the package exists,
the driver will download it to the device instead of the default
one. The loaded package type (OS default and COMMS) will be
stored in ice_adapter->active_pkg_type. The package version is
stored in ice_hw->active_pkg_ver.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
3ba381eb65 net/ice/base: ignore inverse switch recipes
When looking for an existing recipes, never choose an inverse
recipe as these are used for anti-spoofing. Choosing inverse
recipes for source MAC address rules was causing errors while
adding the rule.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
8c1c61f970 net/ice/base: update profile to recipe bitmap array
Correctly update profile to recipe bitmap array after adding and
associating recipes. This fixes an issue where determining unused
recipe result index slots was incorrect.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
9b6f0c969b net/ice/base: add GENEVE offset
Add Geneve offset for tunneled packets to allow dummy packets to be
properly created.

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
c5adb3c448 net/ice/base: enable RSS with ether layer for PPPoE
Add these two ptype(MAC_PPPOD_PAY and MAC_PPPOE_PAY) in outer mac
bitmap, so it can hash for outer mac.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
661264d19f net/ice/base: remove Rx flex descriptor programming
Removing Rx flex descriptor metadata and flag programming from the code,
these registers cannot be written to as they are read only.
The programming for all fields per RxDID is now handled differently.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00