7 Commits

Author SHA1 Message Date
Ori Kam
0253af30c7 doc: limit FW support for mlx5 regex driver
MLX5 RegEx is only supported with FW version XX.30.1004 or lower.

Signed-off-by: Ori Kam <orika@nvidia.com>
Acked-by: Asaf Penso <asafp@nvidia.com>
2021-08-04 11:46:49 +02:00
Henry Nadeau
9c30a6f3c9 doc: fix spelling
Spell checked and corrected documentation.
If there are any errors, or I have changed something that wasn't an error
please reach out to me so I can update the dictionary.

Cc: stable@dpdk.org

Signed-off-by: Henry Nadeau <hnadeau@iol.unh.edu>
2021-07-31 20:03:47 +02:00
Suanming Mou
330a70b773 regex/mlx5: add data path scattered mbuf process
UMR (User-Mode Memory Registration) WQE can present data buffers
scattered within multiple mbufs with single indirect mkey. Take
advantage of the UMR WQE, scattered mbuf in one operation can be
presented to an indirect mkey. The RegEx which only accepts one
mkey can now process the whole scattered mbuf in one operation.

The maximum scattered mbuf can be supported in one UMR WQE is now
defined as 64. The mbufs from multiple operations can be combined
into one UMR WQE as well if there is enough space in the KLM array,
since the operations can address their own mbuf's content by the
mkey's address and length. However, one operation's scattered mbuf's
can't be placed in two different UMR WQE's KLM array, if the UMR
WQE's KLM does not has enough free space for one operation, the
extra UMR WQE will be engaged.

In case the UMR WQE's indirect mkey will be over wrapped by the SQ's
WQE move, the mkey's index used by the UMR WQE should be the index
of last the RegEX WQE in the operations. As one operation consumes
one WQE set, build the RegEx WQE by reverse helps address the mkey
more efficiently. Once the operations in one burst consumes multiple
mkeys, when the mkey KLM array is full, the reverse WQE set index
will always be the last of the new mkey's for the new UMR WQE.

In GGA mode, the SQ WQE's memory layout becomes UMR/NOP and RegEx
WQE by interleave. The UMR and RegEx WQE can be called as WQE set.
The SQ's pi and ci will also be increased as WQE set not as WQE.

For operations don't have scattered mbuf, uses the mbuf's mkey directly,
the WQE set combination is NOP + RegEx.
For operations have scattered mbuf but share the UMR WQE with others,
the WQE set combination is NOP + RegEx.
For operations complete the UMR WQE, the WQE set combination is UMR +
RegEx.

Signed-off-by: John Hurley <jhurley@nvidia.com>
Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-04-08 22:52:55 +02:00
Bruce Richardson
8809f78c7d doc: fix driver names
Since the built driver filenames have changed in DPDK 20.11, we need to
update the driver doc to match.

Most drivers start their section with the driver filename highlighted in
bold, while a number were missing the highlight. When updating the names,
add the markers for bold text to any missing it, so as to have things more
consistent.

Fixes: a20b2c01a7a1 ("build: standardize component names and defines")

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-11-03 16:23:03 +01:00
Guy Kaneti
09f84c9a6a usertools: add OCTEON TX2 REE device binding
Update the devbind script with new section of regex devices, also
added OCTEONTX2 REE device ID to regex device list

Signed-off-by: Guy Kaneti <guyk@marvell.com>
2020-10-14 10:41:26 +02:00
Guy Kaneti
4cd1c5fd9e regex/octeontx2: introduce REE driver
Add meson based build infrastructure along with the
OTX2 regexdev (REE) device functions.
Add Marvell OCTEON TX2 regex guide.

Signed-off-by: Guy Kaneti <guyk@marvell.com>
2020-10-14 10:41:21 +02:00
Yuval Avnery
cf9b3c36e5 regex/mlx5: introduce driver for BlueField 2
This commit introduce the RegEx poll mode drivers class, and
adds Mellanox RegEx PMD.

Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
Signed-off-by: Ori Kam <orika@mellanox.com>
2020-07-21 19:04:05 +02:00