Bruce Richardson
4ad4b20a79
drivers: change indentation in build files
...
Switch from using tabs to 4 spaces for meson.build indentation.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-21 14:04:09 +02:00
Pallavi Kadam
b9d60b5434
drivers/net: build i40e and mlx5 on Windows
...
Allows i40e and mlx5 PMDs to compile on Windows and disable other drivers.
Disable few i40e warnings with Clang such as comparison of integers of
different signs and macro redefinitions.
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Tal Shnaiderman <talshn@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-01-14 23:51:24 +01:00
Alvin Zhang
746664d546
net/igc: support flow API
...
Below type of flows are supported:
ether-type filter, 2-tuple filter, SYN filter, RSS.
Update docs too.
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:08 +02:00
Alvin Zhang
a5aeb2b9e2
net/igc: support Rx and Tx
...
Below ops are added too:
mac_addr_add
mac_addr_remove
mac_addr_set
set_mc_addr_list
mtu_set
promiscuous_enable
promiscuous_disable
allmulticast_enable
allmulticast_disable
rx_queue_setup
rx_queue_release
rx_queue_count
rx_descriptor_done
rx_descriptor_status
tx_descriptor_status
tx_queue_setup
tx_queue_release
tx_done_cleanup
rxq_info_get
txq_info_get
dev_supported_ptypes_get
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
Alvin Zhang
8cb7c57d9b
net/igc: support device initialization
...
Update base codes, add readme.
Add OS specific functions and definitions.
Add device initialization codes.
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
Alvin Zhang
66fde1b943
net/igc: add skeleton
...
Implement device detection and loading.
Add igc driver guide docs.
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
