dcf43d2412
Used a common directory for the ACC PMDs Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
148 lines
6.8 KiB
C
148 lines
6.8 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2017 Intel Corporation
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*/
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#ifndef ACC100_PF_ENUM_H
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#define ACC100_PF_ENUM_H
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/*
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* ACC100 Register mapping on PF BAR0
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* This is automatically generated from RDL, format may change with new RDL
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* Release.
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* Variable names are as is
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*/
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enum {
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HWPfQmgrEgressQueuesTemplate = 0x0007FE00,
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HWPfQmgrIngressAq = 0x00080000,
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HWPfQmgrDepthLog2Grp = 0x00A00200,
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HWPfQmgrTholdGrp = 0x00A00300,
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HWPfQmgrGrpTmplateReg0Indx = 0x00A00600,
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HWPfQmgrGrpTmplateReg1Indx = 0x00A00680,
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HWPfQmgrGrpTmplateReg2indx = 0x00A00700,
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HWPfQmgrGrpTmplateReg3Indx = 0x00A00780,
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HWPfQmgrGrpTmplateReg4Indx = 0x00A00800,
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HWPfQmgrVfBaseAddr = 0x00A01000,
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HWPfQmgrArbQDepthGrp = 0x00A02F00,
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HWPfQmgrGrpFunction0 = 0x00A02F40,
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HWPfQmgrGrpPriority = 0x00A02F48,
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HWPfQmgrAqEnableVf = 0x00A10000,
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HWPfQmgrRingSizeVf = 0x00A20004,
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HWPfQmgrGrpDepthLog20Vf = 0x00A20008,
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HWPfQmgrGrpDepthLog21Vf = 0x00A2000C,
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HWPfDmaConfig0Reg = 0x00B80000,
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HWPfDmaConfig1Reg = 0x00B80004,
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HWPfDmaQmgrAddrReg = 0x00B80008,
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HWPfDmaAxcacheReg = 0x00B80010,
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HWPfDmaAxiControl = 0x00B8002C,
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HWPfDmaQmanen = 0x00B80040,
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HWPfDmaInboundDrainDataSize = 0x00B800C0,
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HWPfDmaVfDdrBaseRw = 0x00B80400,
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HWPfDmaDescriptorSignatuture = 0x00B80868,
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HWPfDmaErrorDetectionEn = 0x00B80870,
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HWPfDmaFec5GulDescBaseLoRegVf = 0x00B88020,
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HWPfDmaFec5GulDescBaseHiRegVf = 0x00B88024,
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HWPfDmaFec5GulRespPtrLoRegVf = 0x00B88028,
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HWPfDmaFec5GulRespPtrHiRegVf = 0x00B8802C,
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HWPfDmaFec5GdlDescBaseLoRegVf = 0x00B88040,
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HWPfDmaFec5GdlDescBaseHiRegVf = 0x00B88044,
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HWPfDmaFec5GdlRespPtrLoRegVf = 0x00B88048,
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HWPfDmaFec5GdlRespPtrHiRegVf = 0x00B8804C,
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HWPfDmaFec4GulDescBaseLoRegVf = 0x00B88060,
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HWPfDmaFec4GulDescBaseHiRegVf = 0x00B88064,
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HWPfDmaFec4GulRespPtrLoRegVf = 0x00B88068,
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HWPfDmaFec4GulRespPtrHiRegVf = 0x00B8806C,
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HWPfDmaFec4GdlDescBaseLoRegVf = 0x00B88080,
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HWPfDmaFec4GdlDescBaseHiRegVf = 0x00B88084,
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HWPfDmaFec4GdlRespPtrLoRegVf = 0x00B88088,
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HWPfDmaFec4GdlRespPtrHiRegVf = 0x00B8808C,
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HWPfQosmonAEvalOverflow0 = 0x00B90008,
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HWPfPermonACntrlRegVf = 0x00B98000,
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HWPfQosmonBEvalOverflow0 = 0x00BA0008,
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HWPfPermonBCntrlRegVf = 0x00BA8000,
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HWPfFabricMode = 0x00BB1000,
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HWPfFecUl5gCntrlReg = 0x00BC0000,
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HwPfFecUl5gIbDebugReg = 0x00BC0200,
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HWPfChaDl5gPllPhshft0 = 0x00C40098,
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HWPfChaDdrStDoneStatus = 0x00C40434,
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HWPfChaDdrWbRstCfg = 0x00C40438,
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HWPfChaDdrApbRstCfg = 0x00C4043C,
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HWPfChaDdrPhyRstCfg = 0x00C40440,
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HWPfChaDdrCpuRstCfg = 0x00C40444,
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HWPfChaDdrSifRstCfg = 0x00C40448,
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HWPfHi5GHardResetReg = 0x00C8400C,
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HWPfHiInfoRingBaseLoRegPf = 0x00C84010,
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HWPfHiInfoRingBaseHiRegPf = 0x00C84014,
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HWPfHiInfoRingPointerRegPf = 0x00C84018,
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HWPfHiInfoRingIntWrEnRegPf = 0x00C84020,
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HWPfHiInfoRingVf2pfLoWrEnReg = 0x00C84024,
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HWPfHiBlockTransmitOnErrorEn = 0x00C84038,
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HWPfHiCfgMsiIntWrEnRegPf = 0x00C84040,
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HWPfHiCfgMsiVf2pfLoWrEnReg = 0x00C84044,
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HWPfHiPfMode = 0x00C84108,
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HWPfHiClkGateHystReg = 0x00C8410C,
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HWPfHiMsiDropEnableReg = 0x00C84114,
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HWPfDdrUmmcCtrl = 0x00D00020,
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HWPfDdrMemInitPhyTrng0 = 0x00D00240,
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HWPfDdrBcDram = 0x00D003C0,
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HWPfDdrBcAddrMap = 0x00D003D0,
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HWPfDdrBcRef = 0x00D003E0,
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HWPfDdrBcTim0 = 0x00D00400,
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HWPfDdrBcTim1 = 0x00D00410,
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HWPfDdrBcTim2 = 0x00D00420,
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HWPfDdrBcTim3 = 0x00D00430,
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HWPfDdrBcTim4 = 0x00D00440,
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HWPfDdrBcTim5 = 0x00D00450,
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HWPfDdrBcTim6 = 0x00D00460,
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HWPfDdrBcTim7 = 0x00D00470,
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HWPfDdrBcTim8 = 0x00D00480,
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HWPfDdrBcTim9 = 0x00D00490,
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HWPfDdrBcTim10 = 0x00D004A0,
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HWPfDdrDfiInit = 0x00D004D0,
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HWPfDdrDfiTim0 = 0x00D004F0,
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HWPfDdrDfiTim1 = 0x00D00500,
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HWPfDdrDfiPhyUpdEn = 0x00D00530,
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HWPfDdrUmmcIntEn = 0x00D00570,
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HWPfDdrPhyRdLatency = 0x00D48400,
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HWPfDdrPhyRdLatencyDbi = 0x00D48410,
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HWPfDdrPhyWrLatency = 0x00D48420,
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HWPfDdrPhyTrngType = 0x00D48430,
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HWPfDdrPhyMr01Dimm = 0x00D484C0,
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HWPfDdrPhyMr01DimmDbi = 0x00D484D0,
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HWPfDdrPhyMr23Dimm = 0x00D484E0,
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HWPfDdrPhyMr45Dimm = 0x00D484F0,
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HWPfDdrPhyMr67Dimm = 0x00D48500,
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HWPfDdrPhyWrlvlWwRdlvlRr = 0x00D48510,
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HWPfDdrPhyIdletimeout = 0x00D48560,
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HWPfDdrPhyDqsCountMax = 0x00D485D0,
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HWPfDdrPhyDqsCountNum = 0x00D485E0,
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HWPfDdrPhyIdtmFwVersion = 0x00D6C410,
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HWPfDdrPhyDqsCount = 0x00D70020,
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HwPfPcieLnAdaptctrl = 0x00D80108,
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HwPfPciePcsEqControl = 0x00D81098,
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HwPfPcieGpexBridgeControl = 0x00D90808,
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HwPfPcieGpexAxiPioControl = 0x00D90840,
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HwPfPcieGpexAxiAddrMappingWindowPexBaseHigh = 0x00D90BAC,
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};
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/* TIP PF Interrupt numbers */
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enum {
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ACC100_PF_INT_QMGR_AQ_OVERFLOW = 0,
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ACC100_PF_INT_DOORBELL_VF_2_PF = 1,
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ACC100_PF_INT_DMA_DL_DESC_IRQ = 2,
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ACC100_PF_INT_DMA_UL_DESC_IRQ = 3,
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ACC100_PF_INT_DMA_MLD_DESC_IRQ = 4,
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ACC100_PF_INT_DMA_UL5G_DESC_IRQ = 5,
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ACC100_PF_INT_DMA_DL5G_DESC_IRQ = 6,
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ACC100_PF_INT_ILLEGAL_FORMAT = 7,
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ACC100_PF_INT_QMGR_DISABLED_ACCESS = 8,
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ACC100_PF_INT_QMGR_AQ_OVERTHRESHOLD = 9,
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ACC100_PF_INT_ARAM_ACCESS_ERR = 10,
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ACC100_PF_INT_ARAM_ECC_1BIT_ERR = 11,
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ACC100_PF_INT_PARITY_ERR = 12,
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ACC100_PF_INT_QMGR_ERR = 13,
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ACC100_PF_INT_INT_REQ_OVERFLOW = 14,
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ACC100_PF_INT_APB_TIMEOUT = 15,
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};
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#endif /* ACC100_PF_ENUM_H */
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