05fa3d4a65
Defined FPGA-BUS for Acceleration Drivers of AFUs 1. FPGA PCI Scan (1st Scan) follows DPDK UIO/VFIO PCI Scan Process, probe Intel FPGA Rawdev Driver, it will be covered in following patches. 2. AFU Scan(2nd Scan) bind DPDK driver to FPGA Partial-Bitstream. This scan is trigged by hotplug of IFPGA Rawdev probe, in this scan the AFUs will be created and their drivers are also probed. This patch will introduce rte_afu_device which describe the AFU device listed in the FPGA-BUS. Signed-off-by: Rosen Xu <rosen.xu@intel.com> Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
32 lines
845 B
C
32 lines
845 B
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2018 Intel Corporation
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*/
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#ifndef _IFPGA_LOGS_H_
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#define _IFPGA_LOGS_H_
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#include <rte_log.h>
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extern int ifpga_bus_logtype;
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#define IFPGA_LOG(level, fmt, args...) \
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rte_log(RTE_LOG_ ## level, ifpga_bus_logtype, "%s(): " fmt "\n", \
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__func__, ##args)
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#define IFPGA_BUS_LOG(level, fmt, args...) \
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rte_log(RTE_LOG_ ## level, ifpga_bus_logtype, "%s(): " fmt "\n", \
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__func__, ##args)
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#define IFPGA_BUS_FUNC_TRACE() IFPGA_BUS_LOG(DEBUG, ">>")
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#define IFPGA_BUS_DEBUG(fmt, args...) \
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IFPGA_BUS_LOG(DEBUG, fmt, ## args)
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#define IFPGA_BUS_INFO(fmt, args...) \
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IFPGA_BUS_LOG(INFO, fmt, ## args)
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#define IFPGA_BUS_ERR(fmt, args...) \
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IFPGA_BUS_LOG(ERR, fmt, ## args)
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#define IFPGA_BUS_WARN(fmt, args...) \
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IFPGA_BUS_LOG(WARNING, fmt, ## args)
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#endif /* _IFPGA_BUS_LOGS_H_ */
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