aedd054c5c
This patch fixes coverity issue by adding a check for negative value to
avoid bad bit shift operation and other invalid use of file descriptors.
Coverity issue: 373717, 373697, 373685
Coverity issue: 373723, 373720, 373719, 373718, 373715, 373714, 373713
Coverity issue: 373710, 373707, 373706, 373705, 373704, 373701, 373700
Coverity issue: 373698, 373695, 373692, 373690, 373689
Coverity issue: 373722, 373721, 373709, 373702, 373696
Fixes: d61138d4f0
("drivers: remove direct access to interrupt handle")
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
247 lines
5.7 KiB
C
247 lines
5.7 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2015 Intel Corporation
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*/
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#include <fcntl.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <sys/mman.h>
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#include <rte_eal.h>
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#include <rte_pci.h>
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#include <rte_bus_pci.h>
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#include <rte_tailq.h>
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#include <rte_log.h>
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#include <rte_malloc.h>
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#include "private.h"
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static struct rte_tailq_elem rte_uio_tailq = {
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.name = "UIO_RESOURCE_LIST",
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};
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EAL_REGISTER_TAILQ(rte_uio_tailq)
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static int
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pci_uio_map_secondary(struct rte_pci_device *dev)
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{
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int fd, i, j;
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struct mapped_pci_resource *uio_res;
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struct mapped_pci_res_list *uio_res_list =
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RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);
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TAILQ_FOREACH(uio_res, uio_res_list, next) {
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/* skip this element if it doesn't match our PCI address */
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if (rte_pci_addr_cmp(&uio_res->pci_addr, &dev->addr))
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continue;
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for (i = 0; i != uio_res->nb_maps; i++) {
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/*
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* open devname, to mmap it
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*/
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fd = open(uio_res->maps[i].path, O_RDWR);
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if (fd < 0) {
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RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
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uio_res->maps[i].path, strerror(errno));
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return -1;
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}
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void *mapaddr = pci_map_resource(uio_res->maps[i].addr,
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fd, (off_t)uio_res->maps[i].offset,
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(size_t)uio_res->maps[i].size, 0);
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/* fd is not needed in secondary process, close it */
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close(fd);
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if (mapaddr != uio_res->maps[i].addr) {
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RTE_LOG(ERR, EAL,
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"Cannot mmap device resource file %s to address: %p\n",
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uio_res->maps[i].path,
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uio_res->maps[i].addr);
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if (mapaddr != NULL) {
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/* unmap addrs correctly mapped */
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for (j = 0; j < i; j++)
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pci_unmap_resource(
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uio_res->maps[j].addr,
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(size_t)uio_res->maps[j].size);
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/* unmap addr wrongly mapped */
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pci_unmap_resource(mapaddr,
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(size_t)uio_res->maps[i].size);
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}
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return -1;
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}
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dev->mem_resource[i].addr = mapaddr;
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}
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return 0;
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}
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RTE_LOG(ERR, EAL, "Cannot find resource for device\n");
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return 1;
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}
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/* map the PCI resource of a PCI device in virtual memory */
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int
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pci_uio_map_resource(struct rte_pci_device *dev)
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{
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int i, map_idx = 0, ret;
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uint64_t phaddr;
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struct mapped_pci_resource *uio_res = NULL;
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struct mapped_pci_res_list *uio_res_list =
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RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);
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if (rte_intr_fd_set(dev->intr_handle, -1))
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return -1;
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if (rte_intr_dev_fd_set(dev->intr_handle, -1))
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return -1;
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/* secondary processes - use already recorded details */
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return pci_uio_map_secondary(dev);
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/* allocate uio resource */
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ret = pci_uio_alloc_resource(dev, &uio_res);
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if (ret)
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return ret;
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/* Map all BARs */
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for (i = 0; i != PCI_MAX_RESOURCE; i++) {
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/* skip empty BAR */
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phaddr = dev->mem_resource[i].phys_addr;
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if (phaddr == 0)
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continue;
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ret = pci_uio_map_resource_by_index(dev, i,
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uio_res, map_idx);
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if (ret)
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goto error;
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map_idx++;
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}
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uio_res->nb_maps = map_idx;
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TAILQ_INSERT_TAIL(uio_res_list, uio_res, next);
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return 0;
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error:
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for (i = 0; i < map_idx; i++) {
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pci_unmap_resource(uio_res->maps[i].addr,
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(size_t)uio_res->maps[i].size);
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rte_free(uio_res->maps[i].path);
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}
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pci_uio_free_resource(dev, uio_res);
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return -1;
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}
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static void
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pci_uio_unmap(struct mapped_pci_resource *uio_res)
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{
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int i;
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if (uio_res == NULL)
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return;
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for (i = 0; i != uio_res->nb_maps; i++) {
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pci_unmap_resource(uio_res->maps[i].addr,
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(size_t)uio_res->maps[i].size);
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if (rte_eal_process_type() == RTE_PROC_PRIMARY)
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rte_free(uio_res->maps[i].path);
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}
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}
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/* remap the PCI resource of a PCI device in anonymous virtual memory */
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int
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pci_uio_remap_resource(struct rte_pci_device *dev)
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{
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int i;
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void *map_address;
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if (dev == NULL)
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return -1;
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/* Remap all BARs */
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for (i = 0; i != PCI_MAX_RESOURCE; i++) {
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/* skip empty BAR */
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if (dev->mem_resource[i].phys_addr == 0)
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continue;
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map_address = mmap(dev->mem_resource[i].addr,
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(size_t)dev->mem_resource[i].len,
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PROT_READ | PROT_WRITE,
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MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0);
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if (map_address == MAP_FAILED) {
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RTE_LOG(ERR, EAL,
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"Cannot remap resource for device %s\n",
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dev->name);
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return -1;
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}
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RTE_LOG(INFO, EAL,
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"Successful remap resource for device %s\n",
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dev->name);
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}
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return 0;
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}
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static struct mapped_pci_resource *
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pci_uio_find_resource(struct rte_pci_device *dev)
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{
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struct mapped_pci_resource *uio_res;
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struct mapped_pci_res_list *uio_res_list =
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RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);
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if (dev == NULL)
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return NULL;
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TAILQ_FOREACH(uio_res, uio_res_list, next) {
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/* skip this element if it doesn't match our PCI address */
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if (!rte_pci_addr_cmp(&uio_res->pci_addr, &dev->addr))
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return uio_res;
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}
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return NULL;
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}
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/* unmap the PCI resource of a PCI device in virtual memory */
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void
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pci_uio_unmap_resource(struct rte_pci_device *dev)
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{
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struct mapped_pci_resource *uio_res;
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struct mapped_pci_res_list *uio_res_list =
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RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);
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int uio_cfg_fd;
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if (dev == NULL)
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return;
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/* find an entry for the device */
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uio_res = pci_uio_find_resource(dev);
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if (uio_res == NULL)
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return;
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/* secondary processes - just free maps */
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return pci_uio_unmap(uio_res);
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TAILQ_REMOVE(uio_res_list, uio_res, next);
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/* unmap all resources */
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pci_uio_unmap(uio_res);
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/* free uio resource */
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rte_free(uio_res);
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/* close fd if in primary process */
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if (rte_intr_fd_get(dev->intr_handle) >= 0)
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close(rte_intr_fd_get(dev->intr_handle));
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uio_cfg_fd = rte_intr_dev_fd_get(dev->intr_handle);
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if (uio_cfg_fd >= 0) {
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close(uio_cfg_fd);
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rte_intr_dev_fd_set(dev->intr_handle, -1);
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}
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rte_intr_fd_set(dev->intr_handle, -1);
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rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);
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}
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