1f37cb2bb4
The pci bus interface is for drivers only. Mark as internal and move the header in the driver headers list. While at it, cleanup the code: - fix indentation, - remove unneeded reference to bus specific singleton object, - remove unneeded list head structure type, - reorder the definitions and macro manipulating the bus singleton object, - remove inclusion of rte_bus.h and fix the code that relied on implicit inclusion, Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Acked-by: Rosen Xu <rosen.xu@intel.com>
279 lines
6.9 KiB
C
279 lines
6.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Cavium, Inc
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*/
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#ifndef _RTE_OCTEONTX_ZIP_VF_H_
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#define _RTE_OCTEONTX_ZIP_VF_H_
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#include <unistd.h>
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#include <bus_pci_driver.h>
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#include <rte_comp.h>
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#include <rte_compressdev.h>
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#include <rte_compressdev_pmd.h>
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#include <rte_malloc.h>
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#include <rte_memory.h>
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#include <rte_spinlock.h>
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#include <zip_regs.h>
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extern int octtx_zip_logtype_driver;
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/* ZIP VF Control/Status registers (CSRs): */
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/* VF_BAR0: */
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#define ZIP_VQ_ENA (0x10)
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#define ZIP_VQ_SBUF_ADDR (0x20)
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#define ZIP_VF_PF_MBOXX(x) (0x400 | (x)<<3)
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#define ZIP_VQ_DOORBELL (0x1000)
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/**< Vendor ID */
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#define PCI_VENDOR_ID_CAVIUM 0x177D
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/**< PCI device id of ZIP VF */
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#define PCI_DEVICE_ID_OCTEONTX_ZIPVF 0xA037
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#define PCI_DEVICE_ID_OCTEONTX2_ZIPVF 0xA083
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/* maximum number of zip vf devices */
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#define ZIP_MAX_VFS 8
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/* max size of one chunk */
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#define ZIP_MAX_CHUNK_SIZE 8192
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/* each instruction is fixed 128 bytes */
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#define ZIP_CMD_SIZE 128
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#define ZIP_CMD_SIZE_WORDS (ZIP_CMD_SIZE >> 3) /* 16 64_bit words */
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/* size of next chunk buffer pointer */
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#define ZIP_MAX_NCBP_SIZE 8
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/* size of instruction queue in units of instruction size */
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#define ZIP_MAX_NUM_CMDS ((ZIP_MAX_CHUNK_SIZE - ZIP_MAX_NCBP_SIZE) / \
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ZIP_CMD_SIZE) /* 63 */
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/* size of instruct queue in bytes */
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#define ZIP_MAX_CMDQ_SIZE ((ZIP_MAX_NUM_CMDS * ZIP_CMD_SIZE) + \
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ZIP_MAX_NCBP_SIZE)/* ~8072ull */
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#define ZIP_BUF_SIZE 256
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#define ZIP_SGPTR_ALIGN 16
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#define ZIP_CMDQ_ALIGN 128
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#define MAX_SG_LEN ((ZIP_BUF_SIZE - ZIP_SGPTR_ALIGN) / sizeof(void *))
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/**< ZIP PMD specified queue pairs */
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#define ZIP_MAX_VF_QUEUE 1
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#define ZIP_ALIGN_ROUNDUP(x, _align) \
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((_align) * (((x) + (_align) - 1) / (_align)))
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/**< ZIP PMD device name */
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#define COMPRESSDEV_NAME_ZIP_PMD compress_octeonx
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#define ZIP_PMD_LOG(level, fmt, args...) \
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rte_log(RTE_LOG_ ## level, \
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octtx_zip_logtype_driver, "%s(): "fmt "\n", \
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__func__, ##args)
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#define ZIP_PMD_INFO(fmt, args...) \
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ZIP_PMD_LOG(INFO, fmt, ## args)
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#define ZIP_PMD_ERR(fmt, args...) \
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ZIP_PMD_LOG(ERR, fmt, ## args)
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/* resources required to process stream */
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enum NUM_BUFS_PER_STREAM {
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RES_BUF = 0,
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CMD_BUF,
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HASH_CTX_BUF,
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DECOMP_CTX_BUF,
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IN_DATA_BUF,
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OUT_DATA_BUF,
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HISTORY_DATA_BUF,
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MAX_BUFS_PER_STREAM
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};
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struct zip_stream;
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struct zipvf_qp;
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/* Algorithm handler function prototype */
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typedef int (*comp_func_t)(struct rte_comp_op *op,
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struct zipvf_qp *qp, struct zip_stream *zstrm);
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/**
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* ZIP private stream structure
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*/
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struct zip_stream {
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union zip_inst_s *inst;
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/* zip instruction pointer */
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comp_func_t func;
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/* function to process comp operation */
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void *bufs[MAX_BUFS_PER_STREAM];
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} __rte_cache_aligned;
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/**
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* ZIP instruction Queue
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*/
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struct zipvf_cmdq {
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rte_spinlock_t qlock;
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/* queue lock */
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uint64_t *sw_head;
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/* pointer to start of 8-byte word length queue-head */
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uint8_t *va;
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/* pointer to instruction queue virtual address */
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rte_iova_t iova;
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/* iova addr of cmdq head*/
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};
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/**
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* ZIP device queue structure
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*/
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struct zipvf_qp {
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struct zipvf_cmdq cmdq;
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/* Hardware instruction queue structure */
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struct rte_ring *processed_pkts;
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/* Ring for placing processed packets */
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struct rte_compressdev_stats qp_stats;
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/* Queue pair statistics */
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uint16_t id;
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/* Queue Pair Identifier */
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const char *name;
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/* Unique Queue Pair Name */
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struct zip_vf *vf;
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/* pointer to device, queue belongs to */
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} __rte_cache_aligned;
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/**
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* ZIP VF device structure.
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*/
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struct zip_vf {
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int vfid;
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/* vf index */
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struct rte_pci_device *pdev;
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/* pci device */
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void *vbar0;
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/* CSR base address for underlying BAR0 VF.*/
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uint64_t dom_sdom;
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/* Storing mbox domain and subdomain id for app rerun*/
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uint32_t max_nb_queue_pairs;
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/* pointer to device qps */
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struct rte_mempool *zip_mp;
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/* pointer to pools */
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} __rte_cache_aligned;
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static inline void
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zipvf_prepare_in_buf(struct zip_stream *zstrm, struct rte_comp_op *op)
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{
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uint32_t offset, inlen;
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struct rte_mbuf *m_src;
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union zip_inst_s *inst = zstrm->inst;
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inlen = op->src.length;
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offset = op->src.offset;
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m_src = op->m_src;
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/* Prepare direct input data pointer */
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inst->s.dg = 0;
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inst->s.inp_ptr_addr.s.addr =
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rte_pktmbuf_iova_offset(m_src, offset);
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inst->s.inp_ptr_ctl.s.length = inlen;
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}
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static inline void
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zipvf_prepare_out_buf(struct zip_stream *zstrm, struct rte_comp_op *op)
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{
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uint32_t offset;
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struct rte_mbuf *m_dst;
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union zip_inst_s *inst = zstrm->inst;
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offset = op->dst.offset;
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m_dst = op->m_dst;
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/* Prepare direct input data pointer */
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inst->s.ds = 0;
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inst->s.out_ptr_addr.s.addr =
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rte_pktmbuf_iova_offset(m_dst, offset);
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inst->s.totaloutputlength = rte_pktmbuf_pkt_len(m_dst) -
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op->dst.offset;
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inst->s.out_ptr_ctl.s.length = inst->s.totaloutputlength;
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}
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static inline void
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zipvf_prepare_cmd_stateless(struct rte_comp_op *op, struct zip_stream *zstrm)
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{
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union zip_inst_s *inst = zstrm->inst;
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/* set flush flag to always 1*/
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inst->s.ef = 1;
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if (inst->s.op == ZIP_OP_E_DECOMP)
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inst->s.sf = 1;
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else
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inst->s.sf = 0;
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/* Set input checksum */
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inst->s.adlercrc32 = op->input_chksum;
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/* Prepare gather buffers */
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zipvf_prepare_in_buf(zstrm, op);
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zipvf_prepare_out_buf(zstrm, op);
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}
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#ifdef ZIP_DBG
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static inline void
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zip_dump_instruction(void *inst)
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{
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union zip_inst_s *cmd83 = (union zip_inst_s *)inst;
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printf("####### START ########\n");
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printf("doneint:%d totaloutputlength:%d\n", cmd83->s.doneint,
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cmd83->s.totaloutputlength);
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printf("exnum:%d iv:%d exbits:%d hmif:%d halg:%d\n", cmd83->s.exn,
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cmd83->s.iv, cmd83->s.exbits, cmd83->s.hmif, cmd83->s.halg);
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printf("flush:%d speed:%d cc:%d\n", cmd83->s.sf,
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cmd83->s.ss, cmd83->s.cc);
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printf("eof:%d bof:%d op:%d dscatter:%d dgather:%d hgather:%d\n",
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cmd83->s.ef, cmd83->s.bf, cmd83->s.op, cmd83->s.ds,
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cmd83->s.dg, cmd83->s.hg);
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printf("historylength:%d adler32:%d\n", cmd83->s.historylength,
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cmd83->s.adlercrc32);
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printf("ctx_ptr.addr:0x%"PRIx64"\n", cmd83->s.ctx_ptr_addr.s.addr);
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printf("ctx_ptr.len:%d\n", cmd83->s.ctx_ptr_ctl.s.length);
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printf("history_ptr.addr:0x%"PRIx64"\n", cmd83->s.his_ptr_addr.s.addr);
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printf("history_ptr.len:%d\n", cmd83->s.his_ptr_ctl.s.length);
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printf("inp_ptr.addr:0x%"PRIx64"\n", cmd83->s.inp_ptr_addr.s.addr);
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printf("inp_ptr.len:%d\n", cmd83->s.inp_ptr_ctl.s.length);
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printf("out_ptr.addr:0x%"PRIx64"\n", cmd83->s.out_ptr_addr.s.addr);
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printf("out_ptr.len:%d\n", cmd83->s.out_ptr_ctl.s.length);
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printf("result_ptr.len:%d\n", cmd83->s.res_ptr_ctl.s.length);
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printf("####### END ########\n");
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}
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#endif
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int
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zipvf_create(struct rte_compressdev *compressdev);
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int
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zipvf_destroy(struct rte_compressdev *compressdev);
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int
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zipvf_q_init(struct zipvf_qp *qp);
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int
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zipvf_q_term(struct zipvf_qp *qp);
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void
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zipvf_push_command(struct zipvf_qp *qp, union zip_inst_s *zcmd);
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int
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zip_process_op(struct rte_comp_op *op,
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struct zipvf_qp *qp,
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struct zip_stream *zstrm);
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uint64_t
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zip_reg_read64(uint8_t *hw_addr, uint64_t offset);
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void
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zip_reg_write64(uint8_t *hw_addr, uint64_t offset, uint64_t val);
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#endif /* _RTE_ZIP_VF_H_ */
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