8a6eb404c4
ASAN reports a memory leak for the 'pci' pointer in the 'idxd_dmadev'
struct.
This is fixed by free'ing the struct when the last queue on the PCI
device is being closed.
Fixes: 9449330a84 ("dma/idxd: create dmadev instances on PCI probe")
Cc: stable@dpdk.org
Reported-by: Xingguang He <xingguang.he@intel.com>
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
112 lines
3.6 KiB
C
112 lines
3.6 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2021 Intel Corporation
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*/
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#ifndef _IDXD_INTERNAL_H_
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#define _IDXD_INTERNAL_H_
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#include <rte_dmadev_pmd.h>
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#include <rte_spinlock.h>
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#include <rte_atomic.h>
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#include "idxd_hw_defs.h"
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/**
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* @file idxd_internal.h
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*
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* Internal data structures for the idxd/DSA driver for dmadev
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*
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* @warning
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* @b EXPERIMENTAL: these structures and APIs may change without prior notice
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*/
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extern int idxd_pmd_logtype;
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#define IDXD_PMD_LOG(level, fmt, args...) rte_log(RTE_LOG_ ## level, \
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idxd_pmd_logtype, "IDXD: %s(): " fmt "\n", __func__, ##args)
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#define IDXD_PMD_DEBUG(fmt, args...) IDXD_PMD_LOG(DEBUG, fmt, ## args)
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#define IDXD_PMD_INFO(fmt, args...) IDXD_PMD_LOG(INFO, fmt, ## args)
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#define IDXD_PMD_ERR(fmt, args...) IDXD_PMD_LOG(ERR, fmt, ## args)
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#define IDXD_PMD_WARN(fmt, args...) IDXD_PMD_LOG(WARNING, fmt, ## args)
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struct idxd_pci_common {
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rte_spinlock_t lk;
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uint8_t wq_cfg_sz;
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rte_atomic16_t ref_count;
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volatile struct rte_idxd_bar0 *regs;
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volatile uint32_t *wq_regs_base;
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volatile struct rte_idxd_grpcfg *grp_regs;
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volatile void *portals;
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};
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struct idxd_dmadev {
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struct idxd_hw_desc *desc_ring;
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/* counters to track the batches */
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unsigned short max_batches;
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unsigned short batch_idx_read;
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unsigned short batch_idx_write;
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/* track descriptors and handles */
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unsigned short desc_ring_mask;
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unsigned short ids_avail; /* handles for ops completed */
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unsigned short ids_returned; /* the read pointer for hdls/desc rings */
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unsigned short batch_start; /* start+size == write pointer for hdls/desc */
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unsigned short batch_size;
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void *portal; /* address to write the batch descriptor */
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struct idxd_completion *batch_comp_ring;
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unsigned short *batch_idx_ring; /* store where each batch ends */
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struct rte_dma_stats stats;
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rte_iova_t batch_iova; /* base address of the batch comp ring */
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rte_iova_t desc_iova; /* base address of desc ring, needed for completions */
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unsigned short max_batch_size;
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struct rte_dma_dev *dmadev;
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struct rte_dma_vchan_conf qcfg;
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uint8_t sva_support;
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uint8_t qid;
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union {
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struct {
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unsigned int dsa_id;
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} bus;
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struct idxd_pci_common *pci;
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} u;
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};
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int idxd_dmadev_create(const char *name, struct rte_device *dev,
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const struct idxd_dmadev *base_idxd, const struct rte_dma_dev_ops *ops);
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int idxd_dump(const struct rte_dma_dev *dev, FILE *f);
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int idxd_configure(struct rte_dma_dev *dev, const struct rte_dma_conf *dev_conf,
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uint32_t conf_sz);
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int idxd_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
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const struct rte_dma_vchan_conf *qconf, uint32_t qconf_sz);
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int idxd_info_get(const struct rte_dma_dev *dev, struct rte_dma_info *dev_info,
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uint32_t size);
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int idxd_enqueue_copy(void *dev_private, uint16_t qid, rte_iova_t src,
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rte_iova_t dst, unsigned int length, uint64_t flags);
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int idxd_enqueue_fill(void *dev_private, uint16_t qid, uint64_t pattern,
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rte_iova_t dst, unsigned int length, uint64_t flags);
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int idxd_submit(void *dev_private, uint16_t qid);
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uint16_t idxd_completed(void *dev_private, uint16_t qid, uint16_t max_ops,
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uint16_t *last_idx, bool *has_error);
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uint16_t idxd_completed_status(void *dev_private, uint16_t qid __rte_unused,
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uint16_t max_ops, uint16_t *last_idx,
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enum rte_dma_status_code *status);
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int idxd_stats_get(const struct rte_dma_dev *dev, uint16_t vchan,
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struct rte_dma_stats *stats, uint32_t stats_sz);
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int idxd_stats_reset(struct rte_dma_dev *dev, uint16_t vchan);
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int idxd_vchan_status(const struct rte_dma_dev *dev, uint16_t vchan,
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enum rte_dma_vchan_status *status);
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uint16_t idxd_burst_capacity(const void *dev_private, uint16_t vchan);
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#endif /* _IDXD_INTERNAL_H_ */
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