38a4657ea4
- New firmware version for DDM (Downstream Data Mover) - Remove device-level start, stop, and reset operations - Add queue-based start, stop and reset as required by firmware Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
443 lines
11 KiB
C
443 lines
11 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (c) 2015-2021 Atomic Rules LLC
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*/
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#include <unistd.h>
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#include "ark_ethdev_tx.h"
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#include "ark_global.h"
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#include "ark_mpu.h"
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#include "ark_ddm.h"
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#include "ark_logs.h"
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#define ARK_TX_META_SIZE 32
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#define ARK_TX_META_OFFSET (RTE_PKTMBUF_HEADROOM - ARK_TX_META_SIZE)
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#define ARK_TX_MAX_NOCHAIN (RTE_MBUF_DEFAULT_DATAROOM)
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#ifndef RTE_LIBRTE_ARK_MIN_TX_PKTLEN
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#define ARK_MIN_TX_PKTLEN 0
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#else
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#define ARK_MIN_TX_PKTLEN RTE_LIBRTE_ARK_MIN_TX_PKTLEN
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#endif
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/* ************************************************************************* */
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struct ark_tx_queue {
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union ark_tx_meta *meta_q;
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struct rte_mbuf **bufs;
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/* handles for hw objects */
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struct ark_mpu_t *mpu;
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struct ark_ddm_t *ddm;
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/* Stats HW tracks bytes and packets, need to count send errors */
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uint64_t tx_errors;
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tx_user_meta_hook_fn tx_user_meta_hook;
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void *ext_user_data;
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uint32_t queue_size;
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uint32_t queue_mask;
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/* 3 indexes to the paired data rings. */
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int32_t prod_index; /* where to put the next one */
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int32_t free_index; /* mbuf has been freed */
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/* The queue Id is used to identify the HW Q */
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uint16_t phys_qid;
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/* The queue Index within the dpdk device structures */
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uint16_t queue_index;
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/* next cache line - fields written by device */
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RTE_MARKER cacheline1 __rte_cache_min_aligned;
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volatile int32_t cons_index; /* hw is done, can be freed */
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} __rte_cache_aligned;
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/* Forward declarations */
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static int eth_ark_tx_jumbo(struct ark_tx_queue *queue,
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struct rte_mbuf *mbuf,
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uint32_t *user_meta, uint8_t meta_cnt);
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static int eth_ark_tx_hw_queue_config(struct ark_tx_queue *queue);
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static void free_completed_tx(struct ark_tx_queue *queue);
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/* ************************************************************************* */
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static inline void
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eth_ark_tx_desc_fill(struct ark_tx_queue *queue,
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struct rte_mbuf *mbuf,
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uint8_t flags,
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uint32_t *user_meta,
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uint8_t meta_cnt /* 0 to 5 */
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)
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{
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uint32_t tx_idx;
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union ark_tx_meta *meta;
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uint8_t m;
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/* Header */
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tx_idx = queue->prod_index & queue->queue_mask;
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meta = &queue->meta_q[tx_idx];
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meta->data_len = rte_pktmbuf_data_len(mbuf);
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meta->flags = flags;
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meta->meta_cnt = meta_cnt / 2;
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meta->user1 = meta_cnt ? (*user_meta++) : 0;
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queue->prod_index++;
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queue->bufs[tx_idx] = mbuf;
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/* 1 or 2 user meta data entries, user words 1,2 and 3,4 */
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for (m = 1; m < meta_cnt; m += 2) {
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tx_idx = queue->prod_index & queue->queue_mask;
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meta = &queue->meta_q[tx_idx];
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meta->usermeta0 = *user_meta++;
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meta->usermeta1 = *user_meta++;
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queue->prod_index++;
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}
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tx_idx = queue->prod_index & queue->queue_mask;
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meta = &queue->meta_q[tx_idx];
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meta->physaddr = rte_mbuf_data_iova(mbuf);
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queue->prod_index++;
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}
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/* ************************************************************************* */
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uint16_t
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eth_ark_xmit_pkts(void *vtxq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
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{
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struct ark_tx_queue *queue;
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struct rte_mbuf *mbuf;
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uint32_t user_meta[5];
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int stat;
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int32_t prod_index_limit;
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uint16_t nb;
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uint8_t user_len = 0;
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const uint32_t min_pkt_len = ARK_MIN_TX_PKTLEN;
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tx_user_meta_hook_fn tx_user_meta_hook;
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queue = (struct ark_tx_queue *)vtxq;
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tx_user_meta_hook = queue->tx_user_meta_hook;
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/* free any packets after the HW is done with them */
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free_completed_tx(queue);
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/* leave 4 elements mpu data */
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prod_index_limit = queue->queue_size + queue->free_index - 4;
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for (nb = 0;
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(nb < nb_pkts) && (prod_index_limit - queue->prod_index) > 0;
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++nb) {
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mbuf = tx_pkts[nb];
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if (min_pkt_len &&
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unlikely(rte_pktmbuf_pkt_len(mbuf) < min_pkt_len)) {
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/* this packet even if it is small can be split,
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* be sure to add to the end mbuf
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*/
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uint16_t to_add = min_pkt_len -
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rte_pktmbuf_pkt_len(mbuf);
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char *appended =
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rte_pktmbuf_append(mbuf, to_add);
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if (appended == 0) {
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/* This packet is in error,
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* we cannot send it so just
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* count it and delete it.
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*/
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queue->tx_errors += 1;
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rte_pktmbuf_free(mbuf);
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continue;
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}
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memset(appended, 0, to_add);
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}
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if (tx_user_meta_hook)
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tx_user_meta_hook(mbuf, user_meta, &user_len,
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queue->ext_user_data);
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if (unlikely(mbuf->nb_segs != 1)) {
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stat = eth_ark_tx_jumbo(queue, mbuf,
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user_meta, user_len);
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if (unlikely(stat != 0))
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break; /* Queue is full */
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} else {
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eth_ark_tx_desc_fill(queue, mbuf,
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ARK_DDM_SOP | ARK_DDM_EOP,
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user_meta, user_len);
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}
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}
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if (ARK_DEBUG_CORE && nb != nb_pkts) {
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ARK_PMD_LOG(DEBUG, "TX: Failure to send:"
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" req: %" PRIU32
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" sent: %" PRIU32
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" prod: %" PRIU32
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" cons: %" PRIU32
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" free: %" PRIU32 "\n",
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nb_pkts, nb,
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queue->prod_index,
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queue->cons_index,
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queue->free_index);
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ark_mpu_dump(queue->mpu,
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"TX Failure MPU: ",
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queue->phys_qid);
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}
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/* let FPGA know producer index. */
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if (likely(nb != 0))
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ark_mpu_set_producer(queue->mpu, queue->prod_index);
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return nb;
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}
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/* ************************************************************************* */
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static int
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eth_ark_tx_jumbo(struct ark_tx_queue *queue, struct rte_mbuf *mbuf,
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uint32_t *user_meta, uint8_t meta_cnt)
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{
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struct rte_mbuf *next;
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int32_t free_queue_space;
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uint8_t flags = ARK_DDM_SOP;
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free_queue_space = queue->queue_mask -
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(queue->prod_index - queue->free_index);
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/* We need up to 4 mbufs for first header and 2 for subsequent ones */
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if (unlikely(free_queue_space < (2 + (2 * mbuf->nb_segs))))
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return -1;
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while (mbuf != NULL) {
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next = mbuf->next;
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flags |= (next == NULL) ? ARK_DDM_EOP : 0;
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eth_ark_tx_desc_fill(queue, mbuf, flags, user_meta, meta_cnt);
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flags &= ~ARK_DDM_SOP; /* drop SOP flags */
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meta_cnt = 0; /* Meta only on SOP */
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mbuf = next;
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}
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return 0;
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}
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/* ************************************************************************* */
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int
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eth_ark_tx_queue_setup(struct rte_eth_dev *dev,
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uint16_t queue_idx,
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uint16_t nb_desc,
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unsigned int socket_id,
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const struct rte_eth_txconf *tx_conf __rte_unused)
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{
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struct ark_adapter *ark = dev->data->dev_private;
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struct ark_tx_queue *queue;
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int status;
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int qidx = queue_idx;
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if (!rte_is_power_of_2(nb_desc)) {
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ARK_PMD_LOG(ERR,
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"DPDK Arkville configuration queue size"
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" must be power of two %u (%s)\n",
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nb_desc, __func__);
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return -1;
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}
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/* Each packet requires at least 2 mpu elements - double desc count */
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nb_desc = 2 * nb_desc;
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/* Allocate queue struct */
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queue = rte_zmalloc_socket("Ark_txqueue",
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sizeof(struct ark_tx_queue),
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64,
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socket_id);
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if (queue == 0) {
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ARK_PMD_LOG(ERR, "Failed to allocate tx "
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"queue memory in %s\n",
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__func__);
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return -ENOMEM;
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}
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/* we use zmalloc no need to initialize fields */
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queue->queue_size = nb_desc;
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queue->queue_mask = nb_desc - 1;
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queue->phys_qid = qidx;
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queue->queue_index = queue_idx;
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dev->data->tx_queues[queue_idx] = queue;
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queue->tx_user_meta_hook = ark->user_ext.tx_user_meta_hook;
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queue->ext_user_data = ark->user_data[dev->data->port_id];
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queue->meta_q =
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rte_zmalloc_socket("Ark_txqueue meta",
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nb_desc * sizeof(union ark_tx_meta),
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64,
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socket_id);
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queue->bufs =
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rte_zmalloc_socket("Ark_txqueue bufs",
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nb_desc * sizeof(struct rte_mbuf *),
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64,
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socket_id);
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if (queue->meta_q == 0 || queue->bufs == 0) {
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ARK_PMD_LOG(ERR, "Failed to allocate "
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"queue memory in %s\n", __func__);
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rte_free(queue->meta_q);
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rte_free(queue->bufs);
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rte_free(queue);
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return -ENOMEM;
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}
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queue->ddm = RTE_PTR_ADD(ark->ddm.v, qidx * ARK_DDM_QOFFSET);
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queue->mpu = RTE_PTR_ADD(ark->mputx.v, qidx * ARK_MPU_QOFFSET);
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status = eth_ark_tx_hw_queue_config(queue);
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if (unlikely(status != 0)) {
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rte_free(queue->meta_q);
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rte_free(queue->bufs);
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rte_free(queue);
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return -1; /* ERROR CODE */
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}
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return 0;
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}
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/* ************************************************************************* */
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static int
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eth_ark_tx_hw_queue_config(struct ark_tx_queue *queue)
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{
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rte_iova_t queue_base, ring_base, cons_index_addr;
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/* Verify HW -- MPU */
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if (ark_mpu_verify(queue->mpu, sizeof(union ark_tx_meta)))
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return -1;
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queue_base = rte_malloc_virt2iova(queue);
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ring_base = rte_malloc_virt2iova(queue->meta_q);
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cons_index_addr =
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queue_base + offsetof(struct ark_tx_queue, cons_index);
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ark_mpu_stop(queue->mpu);
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ark_mpu_reset(queue->mpu);
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/* Stop and Reset and configure MPU */
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ark_mpu_configure(queue->mpu, ring_base, queue->queue_size, 1);
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/* Completion address in UDM */
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ark_ddm_queue_setup(queue->ddm, cons_index_addr);
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ark_ddm_queue_reset_stats(queue->ddm);
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return 0;
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}
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/* ************************************************************************* */
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void
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eth_ark_tx_queue_release(void *vtx_queue)
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{
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struct ark_tx_queue *queue;
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queue = (struct ark_tx_queue *)vtx_queue;
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ark_ddm_queue_enable(queue->ddm, 0);
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ark_mpu_stop(queue->mpu);
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queue->cons_index = queue->prod_index;
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free_completed_tx(queue);
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rte_free(queue->meta_q);
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rte_free(queue->bufs);
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rte_free(queue);
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}
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/* ************************************************************************* */
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int
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eth_ark_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
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{
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struct ark_tx_queue *queue;
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int cnt = 0;
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queue = dev->data->tx_queues[queue_id];
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/* Wait for DDM to send out all packets. */
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while (queue->cons_index != queue->prod_index) {
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usleep(100);
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if (cnt++ > 10000)
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return -1;
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}
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ark_ddm_queue_enable(queue->ddm, 0);
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ark_mpu_stop(queue->mpu);
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free_completed_tx(queue);
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dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
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return 0;
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}
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int
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eth_ark_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
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{
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struct ark_tx_queue *queue;
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queue = dev->data->tx_queues[queue_id];
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if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_STARTED)
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return 0;
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ark_mpu_start(queue->mpu);
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ark_ddm_queue_enable(queue->ddm, 1);
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dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
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return 0;
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}
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/* ************************************************************************* */
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static void
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free_completed_tx(struct ark_tx_queue *queue)
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{
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struct rte_mbuf *mbuf;
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union ark_tx_meta *meta;
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int32_t top_index;
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top_index = queue->cons_index; /* read once */
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while ((top_index - queue->free_index) > 0) {
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meta = &queue->meta_q[queue->free_index & queue->queue_mask];
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if (likely((meta->flags & ARK_DDM_SOP) != 0)) {
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mbuf = queue->bufs[queue->free_index &
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queue->queue_mask];
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/* ref count of the mbuf is checked in this call. */
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rte_pktmbuf_free(mbuf);
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}
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queue->free_index += (meta->meta_cnt + 2);
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}
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}
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/* ************************************************************************* */
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void
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eth_tx_queue_stats_get(void *vqueue, struct rte_eth_stats *stats)
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{
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struct ark_tx_queue *queue;
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struct ark_ddm_t *ddm;
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uint64_t bytes, pkts;
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queue = vqueue;
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ddm = queue->ddm;
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bytes = ark_ddm_queue_byte_count(ddm);
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pkts = ark_ddm_queue_pkt_count(ddm);
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stats->q_opackets[queue->queue_index] = pkts;
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stats->q_obytes[queue->queue_index] = bytes;
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stats->opackets += pkts;
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stats->obytes += bytes;
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stats->oerrors += queue->tx_errors;
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}
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void
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eth_tx_queue_stats_reset(void *vqueue)
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{
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struct ark_tx_queue *queue;
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struct ark_ddm_t *ddm;
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queue = vqueue;
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ddm = queue->ddm;
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ark_ddm_queue_reset_stats(ddm);
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queue->tx_errors = 0;
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}
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