25cf263074
Multiple drivers are defining macros for VLAN header length, to remove the redundancy defining macro in the ether header. And updated drivers to use the new macro. Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Acked-by: Haiyue Wang <haiyue.wang@intel.com> Acked-by: Rosen Xu <rosen.xu@intel.com> Acked-by: Jiawen Wu <jiawenwu@trustnetic.com>
260 lines
5.5 KiB
C
260 lines
5.5 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2014-2018 Chelsio Communications.
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* All rights reserved.
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*/
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#ifndef _CXGBE_COMPAT_H_
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#define _CXGBE_COMPAT_H_
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#include <string.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <stdbool.h>
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#include <rte_common.h>
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#include <rte_memcpy.h>
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#include <rte_byteorder.h>
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#include <rte_cycles.h>
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#include <rte_spinlock.h>
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#include <rte_log.h>
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#include <rte_io.h>
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#include <rte_net.h>
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extern int cxgbe_logtype;
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extern int cxgbe_mbox_logtype;
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#define dev_printf(level, logtype, fmt, ...) \
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rte_log(RTE_LOG_ ## level, logtype, \
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"rte_cxgbe_pmd: " fmt, ##__VA_ARGS__)
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#define dev_err(x, fmt, ...) \
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dev_printf(ERR, cxgbe_logtype, fmt, ##__VA_ARGS__)
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#define dev_info(x, fmt, ...) \
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dev_printf(INFO, cxgbe_logtype, fmt, ##__VA_ARGS__)
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#define dev_warn(x, fmt, ...) \
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dev_printf(WARNING, cxgbe_logtype, fmt, ##__VA_ARGS__)
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#define dev_debug(x, fmt, ...) \
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dev_printf(DEBUG, cxgbe_logtype, fmt, ##__VA_ARGS__)
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#define CXGBE_DEBUG_MBOX(x, fmt, ...) \
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dev_printf(DEBUG, cxgbe_mbox_logtype, "MBOX:" fmt, ##__VA_ARGS__)
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#define CXGBE_FUNC_TRACE() \
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dev_printf(DEBUG, cxgbe_logtype, "CXGBE trace: %s\n", __func__)
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#define pr_err(fmt, ...) dev_err(0, fmt, ##__VA_ARGS__)
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#define pr_warn(fmt, ...) dev_warn(0, fmt, ##__VA_ARGS__)
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#define pr_info(fmt, ...) dev_info(0, fmt, ##__VA_ARGS__)
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#define BUG() pr_err("BUG at %s:%d", __func__, __LINE__)
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#define ASSERT(x) do {\
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if (!(x)) \
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rte_panic("CXGBE: x"); \
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} while (0)
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#define BUG_ON(x) ASSERT(!(x))
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#ifndef WARN_ON
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#define WARN_ON(x) do { \
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int ret = !!(x); \
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if (unlikely(ret)) \
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pr_warn("WARN_ON: \"" #x "\" at %s:%d\n", __func__, __LINE__); \
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} while (0)
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#endif
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#define __iomem
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#ifndef BIT
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#define BIT(n) (1 << (n))
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#endif
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#define L1_CACHE_SHIFT 6
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#define L1_CACHE_BYTES BIT(L1_CACHE_SHIFT)
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#define PAGE_SHIFT 12
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#define CXGBE_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
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#define PTR_ALIGN(p, a) ((typeof(p))CXGBE_ALIGN((unsigned long)(p), (a)))
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#define ETHER_ADDR_LEN 6
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#define rmb() rte_rmb() /* dpdk rte provided rmb */
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#define wmb() rte_wmb() /* dpdk rte provided wmb */
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typedef uint8_t u8;
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typedef int8_t s8;
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typedef uint16_t u16;
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typedef uint32_t u32;
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typedef int32_t s32;
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typedef uint64_t u64;
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typedef uint64_t dma_addr_t;
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#ifndef __le16
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#define __le16 uint16_t
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#endif
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#ifndef __le32
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#define __le32 uint32_t
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#endif
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#ifndef __le64
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#define __le64 uint64_t
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#endif
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#ifndef __be16
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#define __be16 uint16_t
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#endif
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#ifndef __be32
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#define __be32 uint32_t
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#endif
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#ifndef __be64
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#define __be64 uint64_t
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#endif
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#ifndef __u8
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#define __u8 uint8_t
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#endif
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#ifndef __u16
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#define __u16 uint16_t
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#endif
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#ifndef __u32
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#define __u32 uint32_t
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#endif
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#ifndef __u64
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#define __u64 uint64_t
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#endif
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#define FALSE 0
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#define TRUE 1
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#ifndef min
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#define min(a, b) RTE_MIN(a, b)
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#endif
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#ifndef max
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#define max(a, b) RTE_MAX(a, b)
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#endif
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/*
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* round up val _p to a power of 2 size _s
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*/
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#define cxgbe_roundup(_p, _s) (((unsigned long)(_p) + (_s - 1)) & ~(_s - 1))
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#ifndef container_of
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#define container_of(ptr, type, member) ({ \
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typeof(((type *)0)->member)(*__mptr) = (ptr); \
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(type *)((char *)__mptr - offsetof(type, member)); })
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#endif
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#define ARRAY_SIZE(arr) RTE_DIM(arr)
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#define cpu_to_be16(o) rte_cpu_to_be_16(o)
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#define cpu_to_be32(o) rte_cpu_to_be_32(o)
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#define cpu_to_be64(o) rte_cpu_to_be_64(o)
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#define cpu_to_le32(o) rte_cpu_to_le_32(o)
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#define be16_to_cpu(o) rte_be_to_cpu_16(o)
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#define be32_to_cpu(o) rte_be_to_cpu_32(o)
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#define be64_to_cpu(o) rte_be_to_cpu_64(o)
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#define le32_to_cpu(o) rte_le_to_cpu_32(o)
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#ifndef ntohs
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#define ntohs(o) be16_to_cpu(o)
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#endif
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#ifndef ntohl
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#define ntohl(o) be32_to_cpu(o)
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#endif
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#ifndef htons
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#define htons(o) cpu_to_be16(o)
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#endif
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#ifndef htonl
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#define htonl(o) cpu_to_be32(o)
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#endif
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#ifndef caddr_t
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typedef char *caddr_t;
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#endif
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#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
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#define DELAY(x) rte_delay_us(x)
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#define udelay(x) DELAY(x)
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#define msleep(x) DELAY(1000 * (x))
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#define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
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static inline uint8_t hweight32(uint32_t word32)
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{
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uint32_t res = word32 - ((word32 >> 1) & 0x55555555);
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res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
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res = (res + (res >> 4)) & 0x0F0F0F0F;
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res = res + (res >> 8);
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return (res + (res >> 16)) & 0x000000FF;
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} /* weight32 */
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/**
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* cxgbe_fls - find last (most-significant) bit set
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* @x: the word to search
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*
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* This is defined the same way as ffs.
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* Note cxgbe_fls(0) = 0, cxgbe_fls(1) = 1, cxgbe_fls(0x80000000) = 32.
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*/
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static inline int cxgbe_fls(int x)
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{
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return x ? sizeof(x) * 8 - __builtin_clz(x) : 0;
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}
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static inline unsigned long ilog2(unsigned long n)
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{
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unsigned int e = 0;
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while (n) {
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if (n & ~((1 << 8) - 1)) {
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e += 8;
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n >>= 8;
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continue;
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}
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if (n & ~((1 << 4) - 1)) {
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e += 4;
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n >>= 4;
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}
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for (;;) {
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n >>= 1;
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if (n == 0)
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break;
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e++;
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}
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}
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return e;
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}
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static inline void writel(unsigned int val, volatile void __iomem *addr)
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{
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rte_write32(val, addr);
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}
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static inline void writeq(u64 val, volatile void __iomem *addr)
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{
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writel(val, addr);
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writel(val >> 32, (void *)((uintptr_t)addr + 4));
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}
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static inline void writel_relaxed(unsigned int val, volatile void __iomem *addr)
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{
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rte_write32_relaxed(val, addr);
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}
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/*
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* Multiplies an integer by a fraction, while avoiding unnecessary
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* overflow or loss of precision.
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*/
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static inline unsigned int mult_frac(unsigned int x, unsigned int numer,
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unsigned int denom)
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{
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unsigned int quot = x / denom;
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unsigned int rem = x % denom;
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return (quot * numer) + ((rem * numer) / denom);
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}
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#endif /* _CXGBE_COMPAT_H_ */
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