72100f0dee
This patch adds support for level 2 for QoS shaping. Signed-off-by: Gagandeep Singh <g.singh@nxp.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
48 lines
883 B
C
48 lines
883 B
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2020-2021 NXP
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*/
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#ifndef _DPAA2_TM_H_
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#define _DPAA2_TM_H_
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#include <rte_tm.h>
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enum node_type {
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NON_LEAF_NODE = 0,
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LEAF_NODE
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};
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enum level_type {
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LNI_LEVEL = 0,
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CHANNEL_LEVEL,
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QUEUE_LEVEL,
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MAX_LEVEL
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};
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struct dpaa2_tm_shaper_profile {
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LIST_ENTRY(dpaa2_tm_shaper_profile) next;
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uint32_t id;
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int refcnt;
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struct rte_tm_shaper_params params;
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};
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struct dpaa2_tm_node {
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LIST_ENTRY(dpaa2_tm_node) next;
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uint32_t id;
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uint32_t type;
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uint32_t level_id;
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uint16_t channel_id; /* Only for level 1 nodes */
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uint16_t tc_id; /* Only for level 1 nodes */
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int refcnt;
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struct dpaa2_tm_node *parent;
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struct dpaa2_tm_shaper_profile *profile;
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uint32_t weight;
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uint32_t priority;
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uint64_t stats_mask;
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};
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int dpaa2_tm_init(struct rte_eth_dev *dev);
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void dpaa2_tm_deinit(struct rte_eth_dev *dev);
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#endif /* _DPAA2_TM_H_ */
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