d9a42a69fe
Some DPDK applications wrongly assume these requirements:
- no hotplug, i.e. ports are never detached
- all allocated ports are available to the application
Such application iterates over ports by its own mean.
The most common pattern is to request the port count and
assume ports with index in the range [0..count[ can be used.
In order to fix this common mistake in all external applications,
the function rte_eth_dev_count is deprecated, while introducing
the new functions rte_eth_dev_count_avail and rte_eth_dev_count_total.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
839 lines
20 KiB
C
839 lines
20 KiB
C
/*
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* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2014 Intel Corporation
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* Copyright 2017 Cavium, Inc.
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*/
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#include "pipeline_common.h"
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static __rte_always_inline void
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worker_fwd_event(struct rte_event *ev, uint8_t sched)
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{
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ev->event_type = RTE_EVENT_TYPE_CPU;
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ev->op = RTE_EVENT_OP_FORWARD;
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ev->sched_type = sched;
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}
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static __rte_always_inline void
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worker_event_enqueue(const uint8_t dev, const uint8_t port,
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struct rte_event *ev)
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{
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while (rte_event_enqueue_burst(dev, port, ev, 1) != 1)
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rte_pause();
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}
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static __rte_always_inline void
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worker_event_enqueue_burst(const uint8_t dev, const uint8_t port,
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struct rte_event *ev, const uint16_t nb_rx)
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{
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uint16_t enq;
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enq = rte_event_enqueue_burst(dev, port, ev, nb_rx);
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while (enq < nb_rx) {
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enq += rte_event_enqueue_burst(dev, port,
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ev + enq, nb_rx - enq);
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}
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}
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static __rte_always_inline void
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worker_tx_pkt(struct rte_mbuf *mbuf)
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{
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exchange_mac(mbuf);
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while (rte_eth_tx_burst(mbuf->port, 0, &mbuf, 1) != 1)
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rte_pause();
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}
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/* Single stage pipeline workers */
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static int
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worker_do_tx_single(void *arg)
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{
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struct worker_data *data = (struct worker_data *)arg;
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const uint8_t dev = data->dev_id;
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const uint8_t port = data->port_id;
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size_t fwd = 0, received = 0, tx = 0;
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struct rte_event ev;
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while (!fdata->done) {
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if (!rte_event_dequeue_burst(dev, port, &ev, 1, 0)) {
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rte_pause();
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continue;
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}
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received++;
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if (ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
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worker_tx_pkt(ev.mbuf);
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tx++;
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continue;
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}
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work();
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ev.queue_id++;
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worker_fwd_event(&ev, RTE_SCHED_TYPE_ATOMIC);
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worker_event_enqueue(dev, port, &ev);
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fwd++;
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}
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if (!cdata.quiet)
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printf(" worker %u thread done. RX=%zu FWD=%zu TX=%zu\n",
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rte_lcore_id(), received, fwd, tx);
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return 0;
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}
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static int
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worker_do_tx_single_atq(void *arg)
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{
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struct worker_data *data = (struct worker_data *)arg;
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const uint8_t dev = data->dev_id;
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const uint8_t port = data->port_id;
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size_t fwd = 0, received = 0, tx = 0;
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struct rte_event ev;
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while (!fdata->done) {
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if (!rte_event_dequeue_burst(dev, port, &ev, 1, 0)) {
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rte_pause();
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continue;
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}
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received++;
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if (ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
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worker_tx_pkt(ev.mbuf);
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tx++;
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continue;
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}
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work();
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worker_fwd_event(&ev, RTE_SCHED_TYPE_ATOMIC);
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worker_event_enqueue(dev, port, &ev);
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fwd++;
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}
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if (!cdata.quiet)
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printf(" worker %u thread done. RX=%zu FWD=%zu TX=%zu\n",
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rte_lcore_id(), received, fwd, tx);
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return 0;
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}
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static int
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worker_do_tx_single_burst(void *arg)
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{
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struct rte_event ev[BATCH_SIZE + 1];
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struct worker_data *data = (struct worker_data *)arg;
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const uint8_t dev = data->dev_id;
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const uint8_t port = data->port_id;
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size_t fwd = 0, received = 0, tx = 0;
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while (!fdata->done) {
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uint16_t i;
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uint16_t nb_rx = rte_event_dequeue_burst(dev, port, ev,
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BATCH_SIZE, 0);
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if (!nb_rx) {
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rte_pause();
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continue;
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}
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received += nb_rx;
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for (i = 0; i < nb_rx; i++) {
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rte_prefetch0(ev[i + 1].mbuf);
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if (ev[i].sched_type == RTE_SCHED_TYPE_ATOMIC) {
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worker_tx_pkt(ev[i].mbuf);
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ev[i].op = RTE_EVENT_OP_RELEASE;
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tx++;
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} else {
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ev[i].queue_id++;
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worker_fwd_event(&ev[i], RTE_SCHED_TYPE_ATOMIC);
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}
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work();
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}
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worker_event_enqueue_burst(dev, port, ev, nb_rx);
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fwd += nb_rx;
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}
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if (!cdata.quiet)
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printf(" worker %u thread done. RX=%zu FWD=%zu TX=%zu\n",
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rte_lcore_id(), received, fwd, tx);
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return 0;
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}
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static int
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worker_do_tx_single_burst_atq(void *arg)
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{
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struct rte_event ev[BATCH_SIZE + 1];
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struct worker_data *data = (struct worker_data *)arg;
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const uint8_t dev = data->dev_id;
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const uint8_t port = data->port_id;
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size_t fwd = 0, received = 0, tx = 0;
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while (!fdata->done) {
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uint16_t i;
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uint16_t nb_rx = rte_event_dequeue_burst(dev, port, ev,
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BATCH_SIZE, 0);
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if (!nb_rx) {
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rte_pause();
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continue;
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}
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received += nb_rx;
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for (i = 0; i < nb_rx; i++) {
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rte_prefetch0(ev[i + 1].mbuf);
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if (ev[i].sched_type == RTE_SCHED_TYPE_ATOMIC) {
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worker_tx_pkt(ev[i].mbuf);
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ev[i].op = RTE_EVENT_OP_RELEASE;
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tx++;
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} else
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worker_fwd_event(&ev[i], RTE_SCHED_TYPE_ATOMIC);
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work();
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}
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worker_event_enqueue_burst(dev, port, ev, nb_rx);
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fwd += nb_rx;
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}
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if (!cdata.quiet)
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printf(" worker %u thread done. RX=%zu FWD=%zu TX=%zu\n",
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rte_lcore_id(), received, fwd, tx);
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return 0;
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}
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/* Multi stage Pipeline Workers */
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static int
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worker_do_tx(void *arg)
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{
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struct rte_event ev;
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struct worker_data *data = (struct worker_data *)arg;
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const uint8_t dev = data->dev_id;
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const uint8_t port = data->port_id;
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const uint8_t lst_qid = cdata.num_stages - 1;
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size_t fwd = 0, received = 0, tx = 0;
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while (!fdata->done) {
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if (!rte_event_dequeue_burst(dev, port, &ev, 1, 0)) {
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rte_pause();
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continue;
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}
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received++;
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const uint8_t cq_id = ev.queue_id % cdata.num_stages;
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if (cq_id >= lst_qid) {
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if (ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
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worker_tx_pkt(ev.mbuf);
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tx++;
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continue;
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}
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worker_fwd_event(&ev, RTE_SCHED_TYPE_ATOMIC);
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ev.queue_id = (cq_id == lst_qid) ?
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cdata.next_qid[ev.queue_id] : ev.queue_id;
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} else {
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ev.queue_id = cdata.next_qid[ev.queue_id];
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worker_fwd_event(&ev, cdata.queue_type);
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}
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work();
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worker_event_enqueue(dev, port, &ev);
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fwd++;
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}
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if (!cdata.quiet)
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printf(" worker %u thread done. RX=%zu FWD=%zu TX=%zu\n",
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rte_lcore_id(), received, fwd, tx);
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return 0;
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}
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static int
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worker_do_tx_atq(void *arg)
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{
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struct rte_event ev;
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struct worker_data *data = (struct worker_data *)arg;
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const uint8_t dev = data->dev_id;
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const uint8_t port = data->port_id;
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const uint8_t lst_qid = cdata.num_stages - 1;
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size_t fwd = 0, received = 0, tx = 0;
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while (!fdata->done) {
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if (!rte_event_dequeue_burst(dev, port, &ev, 1, 0)) {
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rte_pause();
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continue;
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}
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received++;
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const uint8_t cq_id = ev.sub_event_type % cdata.num_stages;
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if (cq_id == lst_qid) {
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if (ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
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worker_tx_pkt(ev.mbuf);
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tx++;
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continue;
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}
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worker_fwd_event(&ev, RTE_SCHED_TYPE_ATOMIC);
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} else {
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ev.sub_event_type++;
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worker_fwd_event(&ev, cdata.queue_type);
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}
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work();
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worker_event_enqueue(dev, port, &ev);
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fwd++;
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}
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if (!cdata.quiet)
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printf(" worker %u thread done. RX=%zu FWD=%zu TX=%zu\n",
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rte_lcore_id(), received, fwd, tx);
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return 0;
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}
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static int
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worker_do_tx_burst(void *arg)
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{
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struct rte_event ev[BATCH_SIZE];
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struct worker_data *data = (struct worker_data *)arg;
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uint8_t dev = data->dev_id;
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uint8_t port = data->port_id;
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uint8_t lst_qid = cdata.num_stages - 1;
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size_t fwd = 0, received = 0, tx = 0;
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while (!fdata->done) {
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uint16_t i;
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const uint16_t nb_rx = rte_event_dequeue_burst(dev, port,
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ev, BATCH_SIZE, 0);
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if (nb_rx == 0) {
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rte_pause();
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continue;
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}
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received += nb_rx;
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for (i = 0; i < nb_rx; i++) {
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const uint8_t cq_id = ev[i].queue_id % cdata.num_stages;
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if (cq_id >= lst_qid) {
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if (ev[i].sched_type == RTE_SCHED_TYPE_ATOMIC) {
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worker_tx_pkt(ev[i].mbuf);
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tx++;
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ev[i].op = RTE_EVENT_OP_RELEASE;
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continue;
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}
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ev[i].queue_id = (cq_id == lst_qid) ?
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cdata.next_qid[ev[i].queue_id] :
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ev[i].queue_id;
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worker_fwd_event(&ev[i], RTE_SCHED_TYPE_ATOMIC);
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} else {
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ev[i].queue_id = cdata.next_qid[ev[i].queue_id];
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worker_fwd_event(&ev[i], cdata.queue_type);
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}
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work();
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}
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worker_event_enqueue_burst(dev, port, ev, nb_rx);
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fwd += nb_rx;
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}
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if (!cdata.quiet)
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printf(" worker %u thread done. RX=%zu FWD=%zu TX=%zu\n",
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rte_lcore_id(), received, fwd, tx);
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return 0;
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}
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static int
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worker_do_tx_burst_atq(void *arg)
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{
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struct rte_event ev[BATCH_SIZE];
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struct worker_data *data = (struct worker_data *)arg;
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uint8_t dev = data->dev_id;
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uint8_t port = data->port_id;
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uint8_t lst_qid = cdata.num_stages - 1;
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size_t fwd = 0, received = 0, tx = 0;
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while (!fdata->done) {
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uint16_t i;
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const uint16_t nb_rx = rte_event_dequeue_burst(dev, port,
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ev, BATCH_SIZE, 0);
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if (nb_rx == 0) {
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rte_pause();
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continue;
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}
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received += nb_rx;
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for (i = 0; i < nb_rx; i++) {
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const uint8_t cq_id = ev[i].sub_event_type %
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cdata.num_stages;
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if (cq_id == lst_qid) {
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if (ev[i].sched_type == RTE_SCHED_TYPE_ATOMIC) {
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worker_tx_pkt(ev[i].mbuf);
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tx++;
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ev[i].op = RTE_EVENT_OP_RELEASE;
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continue;
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}
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worker_fwd_event(&ev[i], RTE_SCHED_TYPE_ATOMIC);
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} else {
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ev[i].sub_event_type++;
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worker_fwd_event(&ev[i], cdata.queue_type);
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}
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work();
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}
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worker_event_enqueue_burst(dev, port, ev, nb_rx);
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fwd += nb_rx;
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}
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if (!cdata.quiet)
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printf(" worker %u thread done. RX=%zu FWD=%zu TX=%zu\n",
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rte_lcore_id(), received, fwd, tx);
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return 0;
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}
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static int
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setup_eventdev_worker_tx(struct cons_data *cons_data,
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struct worker_data *worker_data)
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{
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RTE_SET_USED(cons_data);
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uint8_t i;
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const uint8_t atq = cdata.all_type_queues ? 1 : 0;
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const uint8_t dev_id = 0;
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const uint8_t nb_ports = cdata.num_workers;
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uint8_t nb_slots = 0;
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uint8_t nb_queues = rte_eth_dev_count_avail();
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/*
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* In case where all type queues are not enabled, use queues equal to
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* number of stages * eth_dev_count and one extra queue per pipeline
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* for Tx.
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*/
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if (!atq) {
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nb_queues *= cdata.num_stages;
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nb_queues += rte_eth_dev_count_avail();
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}
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struct rte_event_dev_config config = {
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.nb_event_queues = nb_queues,
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.nb_event_ports = nb_ports,
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.nb_events_limit = 4096,
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.nb_event_queue_flows = 1024,
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.nb_event_port_dequeue_depth = 128,
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.nb_event_port_enqueue_depth = 128,
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};
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struct rte_event_port_conf wkr_p_conf = {
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.dequeue_depth = cdata.worker_cq_depth,
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.enqueue_depth = 64,
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.new_event_threshold = 4096,
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};
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struct rte_event_queue_conf wkr_q_conf = {
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.schedule_type = cdata.queue_type,
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.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
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.nb_atomic_flows = 1024,
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.nb_atomic_order_sequences = 1024,
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};
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|
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int ret, ndev = rte_event_dev_count();
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|
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if (ndev < 1) {
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printf("%d: No Eventdev Devices Found\n", __LINE__);
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return -1;
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}
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struct rte_event_dev_info dev_info;
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ret = rte_event_dev_info_get(dev_id, &dev_info);
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printf("\tEventdev %d: %s\n", dev_id, dev_info.driver_name);
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if (dev_info.max_event_port_dequeue_depth <
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config.nb_event_port_dequeue_depth)
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config.nb_event_port_dequeue_depth =
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dev_info.max_event_port_dequeue_depth;
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if (dev_info.max_event_port_enqueue_depth <
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config.nb_event_port_enqueue_depth)
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config.nb_event_port_enqueue_depth =
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dev_info.max_event_port_enqueue_depth;
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ret = rte_event_dev_configure(dev_id, &config);
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if (ret < 0) {
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printf("%d: Error configuring device\n", __LINE__);
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return -1;
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}
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printf(" Stages:\n");
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for (i = 0; i < nb_queues; i++) {
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if (atq) {
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nb_slots = cdata.num_stages;
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wkr_q_conf.event_queue_cfg =
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RTE_EVENT_QUEUE_CFG_ALL_TYPES;
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} else {
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uint8_t slot;
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nb_slots = cdata.num_stages + 1;
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slot = i % nb_slots;
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wkr_q_conf.schedule_type = slot == cdata.num_stages ?
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RTE_SCHED_TYPE_ATOMIC : cdata.queue_type;
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}
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if (rte_event_queue_setup(dev_id, i, &wkr_q_conf) < 0) {
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printf("%d: error creating qid %d\n", __LINE__, i);
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return -1;
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}
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cdata.qid[i] = i;
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cdata.next_qid[i] = i+1;
|
|
if (cdata.enable_queue_priorities) {
|
|
const uint32_t prio_delta =
|
|
(RTE_EVENT_DEV_PRIORITY_LOWEST) /
|
|
nb_slots;
|
|
|
|
/* higher priority for queues closer to tx */
|
|
wkr_q_conf.priority =
|
|
RTE_EVENT_DEV_PRIORITY_LOWEST - prio_delta *
|
|
(i % nb_slots);
|
|
}
|
|
|
|
const char *type_str = "Atomic";
|
|
switch (wkr_q_conf.schedule_type) {
|
|
case RTE_SCHED_TYPE_ORDERED:
|
|
type_str = "Ordered";
|
|
break;
|
|
case RTE_SCHED_TYPE_PARALLEL:
|
|
type_str = "Parallel";
|
|
break;
|
|
}
|
|
printf("\tStage %d, Type %s\tPriority = %d\n", i, type_str,
|
|
wkr_q_conf.priority);
|
|
}
|
|
|
|
printf("\n");
|
|
if (wkr_p_conf.dequeue_depth > config.nb_event_port_dequeue_depth)
|
|
wkr_p_conf.dequeue_depth = config.nb_event_port_dequeue_depth;
|
|
if (wkr_p_conf.enqueue_depth > config.nb_event_port_enqueue_depth)
|
|
wkr_p_conf.enqueue_depth = config.nb_event_port_enqueue_depth;
|
|
|
|
/* set up one port per worker, linking to all stage queues */
|
|
for (i = 0; i < cdata.num_workers; i++) {
|
|
struct worker_data *w = &worker_data[i];
|
|
w->dev_id = dev_id;
|
|
if (rte_event_port_setup(dev_id, i, &wkr_p_conf) < 0) {
|
|
printf("Error setting up port %d\n", i);
|
|
return -1;
|
|
}
|
|
|
|
if (rte_event_port_link(dev_id, i, NULL, NULL, 0)
|
|
!= nb_queues) {
|
|
printf("%d: error creating link for port %d\n",
|
|
__LINE__, i);
|
|
return -1;
|
|
}
|
|
w->port_id = i;
|
|
}
|
|
/*
|
|
* Reduce the load on ingress event queue by splitting the traffic
|
|
* across multiple event queues.
|
|
* for example, nb_stages = 2 and nb_ethdev = 2 then
|
|
*
|
|
* nb_queues = (2 * 2) + 2 = 6 (non atq)
|
|
* rx_stride = 3
|
|
*
|
|
* So, traffic is split across queue 0 and queue 3 since queue id for
|
|
* rx adapter is chosen <ethport_id> * <rx_stride> i.e in the above
|
|
* case eth port 0, 1 will inject packets into event queue 0, 3
|
|
* respectively.
|
|
*
|
|
* This forms two set of queue pipelines 0->1->2->tx and 3->4->5->tx.
|
|
*/
|
|
cdata.rx_stride = atq ? 1 : nb_slots;
|
|
ret = rte_event_dev_service_id_get(dev_id,
|
|
&fdata->evdev_service_id);
|
|
if (ret != -ESRCH && ret != 0) {
|
|
printf("Error getting the service ID\n");
|
|
return -1;
|
|
}
|
|
rte_service_runstate_set(fdata->evdev_service_id, 1);
|
|
rte_service_set_runstate_mapped_check(fdata->evdev_service_id, 0);
|
|
if (rte_event_dev_start(dev_id) < 0) {
|
|
printf("Error starting eventdev\n");
|
|
return -1;
|
|
}
|
|
|
|
return dev_id;
|
|
}
|
|
|
|
|
|
struct rx_adptr_services {
|
|
uint16_t nb_rx_adptrs;
|
|
uint32_t *rx_adpt_arr;
|
|
};
|
|
|
|
static int32_t
|
|
service_rx_adapter(void *arg)
|
|
{
|
|
int i;
|
|
struct rx_adptr_services *adptr_services = arg;
|
|
|
|
for (i = 0; i < adptr_services->nb_rx_adptrs; i++)
|
|
rte_service_run_iter_on_app_lcore(
|
|
adptr_services->rx_adpt_arr[i], 1);
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
init_rx_adapter(uint16_t nb_ports)
|
|
{
|
|
int i;
|
|
int ret;
|
|
uint8_t evdev_id = 0;
|
|
struct rx_adptr_services *adptr_services = NULL;
|
|
struct rte_event_dev_info dev_info;
|
|
|
|
ret = rte_event_dev_info_get(evdev_id, &dev_info);
|
|
adptr_services = rte_zmalloc(NULL, sizeof(struct rx_adptr_services), 0);
|
|
|
|
struct rte_event_port_conf rx_p_conf = {
|
|
.dequeue_depth = 8,
|
|
.enqueue_depth = 8,
|
|
.new_event_threshold = 1200,
|
|
};
|
|
|
|
if (rx_p_conf.dequeue_depth > dev_info.max_event_port_dequeue_depth)
|
|
rx_p_conf.dequeue_depth = dev_info.max_event_port_dequeue_depth;
|
|
if (rx_p_conf.enqueue_depth > dev_info.max_event_port_enqueue_depth)
|
|
rx_p_conf.enqueue_depth = dev_info.max_event_port_enqueue_depth;
|
|
|
|
|
|
struct rte_event_eth_rx_adapter_queue_conf queue_conf;
|
|
memset(&queue_conf, 0, sizeof(queue_conf));
|
|
queue_conf.ev.sched_type = cdata.queue_type;
|
|
|
|
for (i = 0; i < nb_ports; i++) {
|
|
uint32_t cap;
|
|
uint32_t service_id;
|
|
|
|
ret = rte_event_eth_rx_adapter_create(i, evdev_id, &rx_p_conf);
|
|
if (ret)
|
|
rte_exit(EXIT_FAILURE,
|
|
"failed to create rx adapter[%d]",
|
|
cdata.rx_adapter_id);
|
|
|
|
ret = rte_event_eth_rx_adapter_caps_get(evdev_id, i, &cap);
|
|
if (ret)
|
|
rte_exit(EXIT_FAILURE,
|
|
"failed to get event rx adapter "
|
|
"capabilities");
|
|
|
|
queue_conf.ev.queue_id = cdata.rx_stride ?
|
|
(i * cdata.rx_stride)
|
|
: (uint8_t)cdata.qid[0];
|
|
|
|
ret = rte_event_eth_rx_adapter_queue_add(i, i, -1, &queue_conf);
|
|
if (ret)
|
|
rte_exit(EXIT_FAILURE,
|
|
"Failed to add queues to Rx adapter");
|
|
|
|
|
|
/* Producer needs to be scheduled. */
|
|
if (!(cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT)) {
|
|
ret = rte_event_eth_rx_adapter_service_id_get(i,
|
|
&service_id);
|
|
if (ret != -ESRCH && ret != 0) {
|
|
rte_exit(EXIT_FAILURE,
|
|
"Error getting the service ID for rx adptr\n");
|
|
}
|
|
|
|
rte_service_runstate_set(service_id, 1);
|
|
rte_service_set_runstate_mapped_check(service_id, 0);
|
|
|
|
adptr_services->nb_rx_adptrs++;
|
|
adptr_services->rx_adpt_arr = rte_realloc(
|
|
adptr_services->rx_adpt_arr,
|
|
adptr_services->nb_rx_adptrs *
|
|
sizeof(uint32_t), 0);
|
|
adptr_services->rx_adpt_arr[
|
|
adptr_services->nb_rx_adptrs - 1] =
|
|
service_id;
|
|
}
|
|
|
|
ret = rte_event_eth_rx_adapter_start(i);
|
|
if (ret)
|
|
rte_exit(EXIT_FAILURE, "Rx adapter[%d] start failed",
|
|
cdata.rx_adapter_id);
|
|
}
|
|
|
|
if (adptr_services->nb_rx_adptrs) {
|
|
struct rte_service_spec service;
|
|
|
|
memset(&service, 0, sizeof(struct rte_service_spec));
|
|
snprintf(service.name, sizeof(service.name), "rx_service");
|
|
service.callback = service_rx_adapter;
|
|
service.callback_userdata = (void *)adptr_services;
|
|
|
|
int32_t ret = rte_service_component_register(&service,
|
|
&fdata->rxadptr_service_id);
|
|
if (ret)
|
|
rte_exit(EXIT_FAILURE,
|
|
"Rx adapter[%d] service register failed",
|
|
cdata.rx_adapter_id);
|
|
|
|
rte_service_runstate_set(fdata->rxadptr_service_id, 1);
|
|
rte_service_component_runstate_set(fdata->rxadptr_service_id,
|
|
1);
|
|
rte_service_set_runstate_mapped_check(fdata->rxadptr_service_id,
|
|
0);
|
|
} else {
|
|
memset(fdata->rx_core, 0, sizeof(unsigned int) * MAX_NUM_CORE);
|
|
rte_free(adptr_services);
|
|
}
|
|
|
|
if (!adptr_services->nb_rx_adptrs && fdata->cap.consumer == NULL &&
|
|
(dev_info.event_dev_cap &
|
|
RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED))
|
|
fdata->cap.scheduler = NULL;
|
|
|
|
if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED)
|
|
memset(fdata->sched_core, 0,
|
|
sizeof(unsigned int) * MAX_NUM_CORE);
|
|
}
|
|
|
|
static void
|
|
worker_tx_opt_check(void)
|
|
{
|
|
int i;
|
|
int ret;
|
|
uint32_t cap = 0;
|
|
uint8_t rx_needed = 0;
|
|
struct rte_event_dev_info eventdev_info;
|
|
|
|
memset(&eventdev_info, 0, sizeof(struct rte_event_dev_info));
|
|
rte_event_dev_info_get(0, &eventdev_info);
|
|
|
|
if (cdata.all_type_queues && !(eventdev_info.event_dev_cap &
|
|
RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES))
|
|
rte_exit(EXIT_FAILURE,
|
|
"Event dev doesn't support all type queues\n");
|
|
|
|
RTE_ETH_FOREACH_DEV(i) {
|
|
ret = rte_event_eth_rx_adapter_caps_get(0, i, &cap);
|
|
if (ret)
|
|
rte_exit(EXIT_FAILURE,
|
|
"failed to get event rx adapter "
|
|
"capabilities");
|
|
rx_needed |=
|
|
!(cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT);
|
|
}
|
|
|
|
if (cdata.worker_lcore_mask == 0 ||
|
|
(rx_needed && cdata.rx_lcore_mask == 0) ||
|
|
(cdata.sched_lcore_mask == 0 &&
|
|
!(eventdev_info.event_dev_cap &
|
|
RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED))) {
|
|
printf("Core part of pipeline was not assigned any cores. "
|
|
"This will stall the pipeline, please check core masks "
|
|
"(use -h for details on setting core masks):\n"
|
|
"\trx: %"PRIu64"\n\ttx: %"PRIu64"\n\tsched: %"PRIu64
|
|
"\n\tworkers: %"PRIu64"\n",
|
|
cdata.rx_lcore_mask, cdata.tx_lcore_mask,
|
|
cdata.sched_lcore_mask,
|
|
cdata.worker_lcore_mask);
|
|
rte_exit(-1, "Fix core masks\n");
|
|
}
|
|
}
|
|
|
|
static worker_loop
|
|
get_worker_loop_single_burst(uint8_t atq)
|
|
{
|
|
if (atq)
|
|
return worker_do_tx_single_burst_atq;
|
|
|
|
return worker_do_tx_single_burst;
|
|
}
|
|
|
|
static worker_loop
|
|
get_worker_loop_single_non_burst(uint8_t atq)
|
|
{
|
|
if (atq)
|
|
return worker_do_tx_single_atq;
|
|
|
|
return worker_do_tx_single;
|
|
}
|
|
|
|
static worker_loop
|
|
get_worker_loop_burst(uint8_t atq)
|
|
{
|
|
if (atq)
|
|
return worker_do_tx_burst_atq;
|
|
|
|
return worker_do_tx_burst;
|
|
}
|
|
|
|
static worker_loop
|
|
get_worker_loop_non_burst(uint8_t atq)
|
|
{
|
|
if (atq)
|
|
return worker_do_tx_atq;
|
|
|
|
return worker_do_tx;
|
|
}
|
|
|
|
static worker_loop
|
|
get_worker_single_stage(bool burst)
|
|
{
|
|
uint8_t atq = cdata.all_type_queues ? 1 : 0;
|
|
|
|
if (burst)
|
|
return get_worker_loop_single_burst(atq);
|
|
|
|
return get_worker_loop_single_non_burst(atq);
|
|
}
|
|
|
|
static worker_loop
|
|
get_worker_multi_stage(bool burst)
|
|
{
|
|
uint8_t atq = cdata.all_type_queues ? 1 : 0;
|
|
|
|
if (burst)
|
|
return get_worker_loop_burst(atq);
|
|
|
|
return get_worker_loop_non_burst(atq);
|
|
}
|
|
|
|
void
|
|
set_worker_tx_setup_data(struct setup_data *caps, bool burst)
|
|
{
|
|
if (cdata.num_stages == 1)
|
|
caps->worker = get_worker_single_stage(burst);
|
|
else
|
|
caps->worker = get_worker_multi_stage(burst);
|
|
|
|
memset(fdata->tx_core, 0, sizeof(unsigned int) * MAX_NUM_CORE);
|
|
|
|
caps->check_opt = worker_tx_opt_check;
|
|
caps->consumer = NULL;
|
|
caps->scheduler = schedule_devices;
|
|
caps->evdev_setup = setup_eventdev_worker_tx;
|
|
caps->adptr_setup = init_rx_adapter;
|
|
}
|