98d26ef7b8
Bump copyright year to 2021. Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
359 lines
9.8 KiB
C
359 lines
9.8 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2019-2021 Xilinx, Inc.
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* Copyright(c) 2016-2019 Solarflare Communications Inc.
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*
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* This software was jointly developed between OKTET Labs (under contract
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* for Solarflare) and Solarflare Communications, Inc.
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*/
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#ifndef _SFC_DP_TX_H
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#define _SFC_DP_TX_H
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#include <ethdev_driver.h>
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#include "sfc_dp.h"
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#include "sfc_debug.h"
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#include "sfc_tso.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Generic transmit queue information used on data path.
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* It must be kept as small as it is possible since it is built into
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* the structure used on datapath.
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*/
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struct sfc_dp_txq {
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struct sfc_dp_queue dpq;
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};
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/** Datapath transmit queue descriptor number limitations */
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struct sfc_dp_tx_hw_limits {
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unsigned int txq_max_entries;
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unsigned int txq_min_entries;
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};
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/**
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* Datapath transmit queue creation information.
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*
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* The structure is used just to pass information from control path to
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* datapath. It could be just function arguments, but it would be hardly
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* readable.
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*/
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struct sfc_dp_tx_qcreate_info {
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/** Maximum number of pushed Tx descriptors */
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unsigned int max_fill_level;
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/** Minimum number of unused Tx descriptors to do reap */
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unsigned int free_thresh;
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/** Offloads enabled on the transmit queue */
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uint64_t offloads;
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/** Tx queue size */
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unsigned int txq_entries;
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/** Maximum size of data in the DMA descriptor */
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uint16_t dma_desc_size_max;
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/** DMA-mapped Tx descriptors ring */
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void *txq_hw_ring;
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/** Associated event queue size */
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unsigned int evq_entries;
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/** Hardware event ring */
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void *evq_hw_ring;
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/** The queue index in hardware (required to push right doorbell) */
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unsigned int hw_index;
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/** Virtual address of the memory-mapped BAR to push Tx doorbell */
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volatile void *mem_bar;
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/** VI window size shift */
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unsigned int vi_window_shift;
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/**
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* Maximum number of bytes into the packet the TCP header can start for
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* the hardware to apply TSO packet edits.
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*/
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uint16_t tso_tcp_header_offset_limit;
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/** Maximum number of header DMA descriptors per TSOv3 transaction */
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uint16_t tso_max_nb_header_descs;
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/** Maximum header length acceptable by TSOv3 transaction */
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uint16_t tso_max_header_len;
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/** Maximum number of payload DMA descriptors per TSOv3 transaction */
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uint16_t tso_max_nb_payload_descs;
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/** Maximum payload length per TSOv3 transaction */
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uint32_t tso_max_payload_len;
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/** Maximum number of frames to be generated per TSOv3 transaction */
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uint32_t tso_max_nb_outgoing_frames;
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};
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/**
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* Get Tx datapath specific device info.
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*
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* @param dev_info Device info to be adjusted
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*/
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typedef void (sfc_dp_tx_get_dev_info_t)(struct rte_eth_dev_info *dev_info);
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/**
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* Get size of transmit and event queue rings by the number of Tx
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* descriptors.
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*
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* @param nb_tx_desc Number of Tx descriptors
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* @param txq_entries Location for number of Tx ring entries
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* @param evq_entries Location for number of event ring entries
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* @param txq_max_fill_level Location for maximum Tx ring fill level
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*
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* @return 0 or positive errno.
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*/
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typedef int (sfc_dp_tx_qsize_up_rings_t)(uint16_t nb_tx_desc,
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struct sfc_dp_tx_hw_limits *limits,
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unsigned int *txq_entries,
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unsigned int *evq_entries,
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unsigned int *txq_max_fill_level);
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/**
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* Allocate and initialize datapath transmit queue.
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*
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* @param port_id The port identifier
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* @param queue_id The queue identifier
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* @param pci_addr PCI function address
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* @param socket_id Socket identifier to allocate memory
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* @param info Tx queue details wrapped in structure
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* @param dp_txqp Location for generic datapath transmit queue pointer
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*
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* @return 0 or positive errno.
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*/
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typedef int (sfc_dp_tx_qcreate_t)(uint16_t port_id, uint16_t queue_id,
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const struct rte_pci_addr *pci_addr,
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int socket_id,
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const struct sfc_dp_tx_qcreate_info *info,
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struct sfc_dp_txq **dp_txqp);
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/**
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* Free resources allocated for datapath transmit queue.
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*/
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typedef void (sfc_dp_tx_qdestroy_t)(struct sfc_dp_txq *dp_txq);
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/**
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* Transmit queue start callback.
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*
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* It handovers EvQ to the datapath.
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*/
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typedef int (sfc_dp_tx_qstart_t)(struct sfc_dp_txq *dp_txq,
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unsigned int evq_read_ptr,
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unsigned int txq_desc_index);
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/**
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* Transmit queue stop function called before the queue flush.
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*
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* It returns EvQ to the control path.
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*/
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typedef void (sfc_dp_tx_qstop_t)(struct sfc_dp_txq *dp_txq,
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unsigned int *evq_read_ptr);
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/**
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* Transmit event handler used during queue flush only.
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*/
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typedef bool (sfc_dp_tx_qtx_ev_t)(struct sfc_dp_txq *dp_txq, unsigned int id);
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/**
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* Transmit queue function called after the queue flush.
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*/
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typedef void (sfc_dp_tx_qreap_t)(struct sfc_dp_txq *dp_txq);
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/**
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* Check Tx descriptor status
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*/
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typedef int (sfc_dp_tx_qdesc_status_t)(struct sfc_dp_txq *dp_txq,
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uint16_t offset);
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/** Transmit datapath definition */
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struct sfc_dp_tx {
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struct sfc_dp dp;
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unsigned int features;
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#define SFC_DP_TX_FEAT_MULTI_PROCESS 0x1
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/**
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* Tx offload capabilities supported by the datapath on device
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* level only if HW/FW supports it.
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*/
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uint64_t dev_offload_capa;
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/**
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* Tx offload capabilities supported by the datapath per-queue
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* if HW/FW supports it.
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*/
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uint64_t queue_offload_capa;
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sfc_dp_tx_get_dev_info_t *get_dev_info;
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sfc_dp_tx_qsize_up_rings_t *qsize_up_rings;
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sfc_dp_tx_qcreate_t *qcreate;
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sfc_dp_tx_qdestroy_t *qdestroy;
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sfc_dp_tx_qstart_t *qstart;
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sfc_dp_tx_qstop_t *qstop;
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sfc_dp_tx_qtx_ev_t *qtx_ev;
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sfc_dp_tx_qreap_t *qreap;
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sfc_dp_tx_qdesc_status_t *qdesc_status;
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eth_tx_prep_t pkt_prepare;
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eth_tx_burst_t pkt_burst;
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};
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static inline struct sfc_dp_tx *
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sfc_dp_find_tx_by_name(struct sfc_dp_list *head, const char *name)
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{
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struct sfc_dp *p = sfc_dp_find_by_name(head, SFC_DP_TX, name);
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return (p == NULL) ? NULL : container_of(p, struct sfc_dp_tx, dp);
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}
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static inline struct sfc_dp_tx *
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sfc_dp_find_tx_by_caps(struct sfc_dp_list *head, unsigned int avail_caps)
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{
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struct sfc_dp *p = sfc_dp_find_by_caps(head, SFC_DP_TX, avail_caps);
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return (p == NULL) ? NULL : container_of(p, struct sfc_dp_tx, dp);
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}
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/** Get Tx datapath ops by the datapath TxQ handle */
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const struct sfc_dp_tx *sfc_dp_tx_by_dp_txq(const struct sfc_dp_txq *dp_txq);
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static inline uint64_t
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sfc_dp_tx_offload_capa(const struct sfc_dp_tx *dp_tx)
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{
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return dp_tx->dev_offload_capa | dp_tx->queue_offload_capa;
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}
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static inline unsigned int
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sfc_dp_tx_pkt_extra_hdr_segs(struct rte_mbuf **m_seg,
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unsigned int *header_len_remaining)
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{
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unsigned int nb_extra_header_segs = 0;
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while (rte_pktmbuf_data_len(*m_seg) < *header_len_remaining) {
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*header_len_remaining -= rte_pktmbuf_data_len(*m_seg);
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*m_seg = (*m_seg)->next;
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++nb_extra_header_segs;
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}
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return nb_extra_header_segs;
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}
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static inline int
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sfc_dp_tx_prepare_pkt(struct rte_mbuf *m,
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unsigned int max_nb_header_segs,
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unsigned int tso_bounce_buffer_len,
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uint32_t tso_tcp_header_offset_limit,
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unsigned int max_fill_level,
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unsigned int nb_tso_descs,
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unsigned int nb_vlan_descs)
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{
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unsigned int descs_required = m->nb_segs;
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unsigned int tcph_off = ((m->ol_flags & PKT_TX_TUNNEL_MASK) ?
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m->outer_l2_len + m->outer_l3_len : 0) +
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m->l2_len + m->l3_len;
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unsigned int header_len = tcph_off + m->l4_len;
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unsigned int header_len_remaining = header_len;
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unsigned int nb_header_segs = 1;
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struct rte_mbuf *m_seg = m;
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#ifdef RTE_LIBRTE_SFC_EFX_DEBUG
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int ret;
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ret = rte_validate_tx_offload(m);
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if (ret != 0) {
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/*
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* Negative error code is returned by rte_validate_tx_offload(),
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* but positive are used inside net/sfc PMD.
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*/
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SFC_ASSERT(ret < 0);
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return -ret;
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}
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#endif
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if (max_nb_header_segs != 0) {
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/* There is a limit on the number of header segments. */
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nb_header_segs +=
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sfc_dp_tx_pkt_extra_hdr_segs(&m_seg,
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&header_len_remaining);
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if (unlikely(nb_header_segs > max_nb_header_segs)) {
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/*
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* The number of header segments is too large.
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*
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* If TSO is requested and if the datapath supports
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* linearisation of TSO headers, allow the packet
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* to proceed with additional checks below.
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* Otherwise, throw an error.
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*/
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if ((m->ol_flags & PKT_TX_TCP_SEG) == 0 ||
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tso_bounce_buffer_len == 0)
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return EINVAL;
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}
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}
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if (m->ol_flags & PKT_TX_TCP_SEG) {
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switch (m->ol_flags & PKT_TX_TUNNEL_MASK) {
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case 0:
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break;
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case PKT_TX_TUNNEL_VXLAN:
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/* FALLTHROUGH */
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case PKT_TX_TUNNEL_GENEVE:
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if (!(m->ol_flags &
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(PKT_TX_OUTER_IPV4 | PKT_TX_OUTER_IPV6)))
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return EINVAL;
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}
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if (unlikely(tcph_off > tso_tcp_header_offset_limit))
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return EINVAL;
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descs_required += nb_tso_descs;
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/*
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* If headers segments are already counted above, here
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* nothing is done since remaining length is smaller
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* then current segment size.
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*/
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nb_header_segs +=
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sfc_dp_tx_pkt_extra_hdr_segs(&m_seg,
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&header_len_remaining);
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/*
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* Extra descriptor which is required when (a part of) payload
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* shares the same segment with (a part of) the header.
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*/
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if (rte_pktmbuf_data_len(m_seg) > header_len_remaining)
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descs_required++;
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if (tso_bounce_buffer_len != 0) {
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if (nb_header_segs > 1 &&
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unlikely(header_len > tso_bounce_buffer_len)) {
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/*
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* Header linearization is required and
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* the header is too big to be linearized
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*/
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return EINVAL;
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}
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}
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}
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/*
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* The number of VLAN descriptors is added regardless of requested
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* VLAN offload since VLAN is sticky and sending packet without VLAN
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* insertion may require VLAN descriptor to reset the sticky to 0.
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*/
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descs_required += nb_vlan_descs;
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/*
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* Max fill level must be sufficient to hold all required descriptors
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* to send the packet entirely.
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*/
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if (descs_required > max_fill_level)
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return ENOBUFS;
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return 0;
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}
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extern struct sfc_dp_tx sfc_efx_tx;
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extern struct sfc_dp_tx sfc_ef10_tx;
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extern struct sfc_dp_tx sfc_ef10_simple_tx;
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extern struct sfc_dp_tx sfc_ef100_tx;
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SFC_DP_TX_H */
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