66834f2974
Use RTM and WAITPKG instructions to perform a wait-for-writes similar to what UMWAIT does, but without the limitation of having to listen for just one event. This works because the optimized power state used by the TPAUSE instruction will cause a wake up on RTM transaction abort, so if we add the addresses we're interested in to the read-set, any write to those addresses will wake us up. Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Tested-by: David Hunt <david.hunt@intel.com>
52 lines
867 B
C
52 lines
867 B
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2021 Intel Corporation
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*/
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#include "rte_power_intrinsics.h"
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/**
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* This function is not supported on ARM.
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*/
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int
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rte_power_monitor(const struct rte_power_monitor_cond *pmc,
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const uint64_t tsc_timestamp)
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{
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RTE_SET_USED(pmc);
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RTE_SET_USED(tsc_timestamp);
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return -ENOTSUP;
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}
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/**
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* This function is not supported on ARM.
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*/
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int
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rte_power_pause(const uint64_t tsc_timestamp)
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{
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RTE_SET_USED(tsc_timestamp);
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return -ENOTSUP;
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}
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/**
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* This function is not supported on ARM.
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*/
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int
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rte_power_monitor_wakeup(const unsigned int lcore_id)
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{
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RTE_SET_USED(lcore_id);
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return -ENOTSUP;
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}
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int
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rte_power_monitor_multi(const struct rte_power_monitor_cond pmc[],
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const uint32_t num, const uint64_t tsc_timestamp)
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{
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RTE_SET_USED(pmc);
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RTE_SET_USED(num);
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RTE_SET_USED(tsc_timestamp);
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return -ENOTSUP;
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}
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