e4beb311d2
Add AES-GMAC algorithm in legacy mode to generation 4 devices. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
175 lines
4.7 KiB
C
175 lines
4.7 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2015-2019 Intel Corporation
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*/
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#ifndef _QAT_SYM_SESSION_H_
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#define _QAT_SYM_SESSION_H_
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#include <rte_crypto.h>
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#include <rte_cryptodev_pmd.h>
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#ifdef RTE_LIB_SECURITY
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#include <rte_security.h>
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#endif
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#include "qat_common.h"
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#include "icp_qat_hw.h"
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#include "icp_qat_fw.h"
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#include "icp_qat_fw_la.h"
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/*
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* Key Modifier (KM) value used in KASUMI algorithm in F9 mode to XOR
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* Integrity Key (IK)
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*/
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#define KASUMI_F9_KEY_MODIFIER_4_BYTES 0xAAAAAAAA
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#define KASUMI_F8_KEY_MODIFIER_4_BYTES 0x55555555
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/*
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* AES-GCM J0 length
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*/
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#define AES_GCM_J0_LEN 16
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/* 3DES key sizes */
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#define QAT_3DES_KEY_SZ_OPT1 24 /* Keys are independent */
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#define QAT_3DES_KEY_SZ_OPT2 16 /* K3=K1 */
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#define QAT_3DES_KEY_SZ_OPT3 8 /* K1=K2=K3 */
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/* 96-bit case of IV for CCP/GCM single pass algorithm */
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#define QAT_AES_GCM_SPC_IV_SIZE 12
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#define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
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ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
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ICP_QAT_HW_CIPHER_NO_CONVERT, \
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ICP_QAT_HW_CIPHER_ENCRYPT)
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#define QAT_AES_HW_CONFIG_CBC_DEC(alg) \
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ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
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ICP_QAT_HW_CIPHER_KEY_CONVERT, \
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ICP_QAT_HW_CIPHER_DECRYPT)
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#define QAT_AES_CMAC_CONST_RB 0x87
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#define QAT_CRYPTO_SLICE_SPC 1
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#define QAT_CRYPTO_SLICE_UCS 2
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#define QAT_CRYPTO_SLICE_WCP 4
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#define QAT_SESSION_IS_SLICE_SET(flags, flag) \
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(!!((flags) & (flag)))
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enum qat_sym_proto_flag {
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QAT_CRYPTO_PROTO_FLAG_NONE = 0,
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QAT_CRYPTO_PROTO_FLAG_CCM = 1,
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QAT_CRYPTO_PROTO_FLAG_GCM = 2,
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QAT_CRYPTO_PROTO_FLAG_SNOW3G = 3,
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QAT_CRYPTO_PROTO_FLAG_ZUC = 4
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};
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/* Common content descriptor */
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struct qat_sym_cd {
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struct icp_qat_hw_cipher_algo_blk cipher;
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struct icp_qat_hw_auth_algo_blk hash;
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} __rte_packed __rte_cache_aligned;
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struct qat_sym_session {
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enum icp_qat_fw_la_cmd_id qat_cmd;
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enum icp_qat_hw_cipher_algo qat_cipher_alg;
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enum icp_qat_hw_cipher_dir qat_dir;
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enum icp_qat_hw_cipher_mode qat_mode;
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enum icp_qat_hw_auth_algo qat_hash_alg;
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enum icp_qat_hw_auth_op auth_op;
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enum icp_qat_hw_auth_mode auth_mode;
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void *bpi_ctx;
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struct qat_sym_cd cd;
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uint8_t *cd_cur_ptr;
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phys_addr_t cd_paddr;
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struct icp_qat_fw_la_bulk_req fw_req;
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uint8_t aad_len;
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struct qat_crypto_instance *inst;
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struct {
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uint16_t offset;
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uint16_t length;
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} cipher_iv;
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struct {
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uint16_t offset;
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uint16_t length;
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} auth_iv;
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uint16_t auth_key_length;
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uint16_t digest_length;
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rte_spinlock_t lock; /* protects this struct */
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enum qat_device_gen min_qat_dev_gen;
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uint8_t aes_cmac;
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uint8_t is_single_pass;
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uint8_t is_single_pass_gmac;
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uint8_t is_ucs;
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uint8_t is_iv12B;
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uint8_t is_gmac;
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uint8_t is_auth;
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uint8_t is_cnt_zero;
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/* Some generations need different setup of counter */
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uint32_t slice_types;
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enum qat_sym_proto_flag qat_proto_flag;
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};
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int
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qat_sym_session_configure(struct rte_cryptodev *dev,
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struct rte_crypto_sym_xform *xform,
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struct rte_cryptodev_sym_session *sess,
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struct rte_mempool *mempool);
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int
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qat_sym_session_set_parameters(struct rte_cryptodev *dev,
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struct rte_crypto_sym_xform *xform, void *session_private);
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int
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qat_sym_session_configure_aead(struct rte_cryptodev *dev,
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struct rte_crypto_sym_xform *xform,
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struct qat_sym_session *session);
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int
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qat_sym_session_configure_cipher(struct rte_cryptodev *dev,
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struct rte_crypto_sym_xform *xform,
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struct qat_sym_session *session);
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int
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qat_sym_session_configure_auth(struct rte_cryptodev *dev,
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struct rte_crypto_sym_xform *xform,
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struct qat_sym_session *session);
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void
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qat_sym_session_clear(struct rte_cryptodev *dev,
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struct rte_cryptodev_sym_session *session);
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unsigned int
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qat_sym_session_get_private_size(struct rte_cryptodev *dev);
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void
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qat_sym_sesssion_init_common_hdr(struct qat_sym_session *session,
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struct icp_qat_fw_comn_req_hdr *header,
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enum qat_sym_proto_flag proto_flags);
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int
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qat_sym_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
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int
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qat_sym_validate_aes_docsisbpi_key(int key_len,
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enum icp_qat_hw_cipher_algo *alg);
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int
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qat_sym_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
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int
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qat_sym_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
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int
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qat_sym_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
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int
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qat_sym_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
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int
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qat_cipher_get_block_size(enum icp_qat_hw_cipher_algo qat_cipher_alg);
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int
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qat_sym_validate_zuc_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
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#ifdef RTE_LIB_SECURITY
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int
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qat_security_session_create(void *dev, struct rte_security_session_conf *conf,
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struct rte_security_session *sess, struct rte_mempool *mempool);
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int
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qat_security_session_destroy(void *dev, struct rte_security_session *sess);
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#endif
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#endif /* _QAT_SYM_SESSION_H_ */
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