323e7b667f
Removed DEV_RX_OFFLOAD_CRC_STRIP offload flag. Without any specific Rx offload flag, default behavior by PMDs is to strip CRC. PMDs that support keeping CRC should advertise DEV_RX_OFFLOAD_KEEP_CRC Rx offload capability. Applications that require keeping CRC should check PMD capability first and if it is supported can enable this feature by setting DEV_RX_OFFLOAD_KEEP_CRC in Rx offload flag in rte_eth_dev_configure() Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Acked-by: Tomasz Duszynski <tdu@semihalf.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Acked-by: Jan Remes <remes@netcope.com> Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
92 lines
1.9 KiB
C
92 lines
1.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2017 Cavium, Inc
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*/
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#ifndef __OCTEONTX_ETHDEV_H__
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#define __OCTEONTX_ETHDEV_H__
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#include <stdbool.h>
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#include <rte_common.h>
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#include <rte_ethdev_driver.h>
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#include <rte_eventdev.h>
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#include <rte_mempool.h>
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#include <rte_memory.h>
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#include <octeontx_fpavf.h>
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#include "base/octeontx_bgx.h"
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#include "base/octeontx_pki_var.h"
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#include "base/octeontx_pkivf.h"
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#include "base/octeontx_pkovf.h"
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#include "base/octeontx_io.h"
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#define OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 12
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#define OCTEONTX_VDEV_NR_PORT_ARG ("nr_port")
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#define OCTEONTX_MAX_NAME_LEN 32
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#define OCTEONTX_MAX_BGX_PORTS 4
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#define OCTEONTX_MAX_LMAC_PER_BGX 4
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#define OCTEONTX_RX_OFFLOADS DEV_RX_OFFLOAD_CHECKSUM
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#define OCTEONTX_TX_OFFLOADS DEV_TX_OFFLOAD_MT_LOCKFREE
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static inline struct octeontx_nic *
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octeontx_pmd_priv(struct rte_eth_dev *dev)
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{
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return dev->data->dev_private;
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}
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extern uint16_t
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rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
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/* Octeontx ethdev nic */
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struct octeontx_nic {
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struct rte_eth_dev *dev;
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int node;
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int port_id;
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int port_ena;
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int base_ichan;
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int num_ichans;
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int base_ochan;
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int num_ochans;
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uint8_t evdev;
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uint8_t bpen;
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uint8_t fcs_strip;
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uint8_t bcast_mode;
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uint8_t mcast_mode;
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uint16_t num_tx_queues;
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uint64_t hwcap;
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uint8_t link_up;
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uint8_t duplex;
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uint8_t speed;
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uint16_t mtu;
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uint8_t mac_addr[ETHER_ADDR_LEN];
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/* Rx port parameters */
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struct {
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bool classifier_enable;
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bool hash_enable;
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bool initialized;
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} pki;
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uint16_t ev_queues;
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uint16_t ev_ports;
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} __rte_cache_aligned;
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struct octeontx_txq {
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uint16_t queue_id;
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octeontx_dq_t dq;
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struct rte_eth_dev *eth_dev;
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} __rte_cache_aligned;
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struct octeontx_rxq {
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uint16_t queue_id;
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uint16_t port_id;
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uint8_t evdev;
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struct rte_eth_dev *eth_dev;
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uint16_t ev_queues;
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uint16_t ev_ports;
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} __rte_cache_aligned;
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#endif /* __OCTEONTX_ETHDEV_H__ */
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