a24af6361e
aDD tx queue setup and release for CN9K and CN10K. Release is common while setup is platform dependent due to differences in fast path Tx queue structures. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
37 lines
713 B
C
37 lines
713 B
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#ifndef __CN10K_ETHDEV_H__
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#define __CN10K_ETHDEV_H__
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#include <cnxk_ethdev.h>
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struct cn10k_eth_txq {
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uint64_t send_hdr_w0;
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uint64_t sg_w0;
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int64_t fc_cache_pkts;
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uint64_t *fc_mem;
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uintptr_t lmt_base;
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rte_iova_t io_addr;
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uint16_t sqes_per_sqb_log2;
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int16_t nb_sqb_bufs_adj;
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uint64_t cmd[4];
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uint64_t lso_tun_fmt;
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} __plt_cache_aligned;
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struct cn10k_eth_rxq {
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uint64_t mbuf_initializer;
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uintptr_t desc;
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void *lookup_mem;
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uintptr_t cq_door;
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uint64_t wdata;
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int64_t *cq_status;
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uint32_t head;
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uint32_t qmask;
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uint32_t available;
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uint16_t data_off;
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uint16_t rq;
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} __plt_cache_aligned;
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#endif /* __CN10K_ETHDEV_H__ */
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