fc00b664e7
Use virtual counter for estimating current bucket as PMU cannot be reliably used to estimate time. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
193 lines
4.7 KiB
C
193 lines
4.7 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#include "otx2_tim_evdev.h"
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#include "otx2_tim_worker.h"
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static inline int
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tim_arm_checks(const struct otx2_tim_ring * const tim_ring,
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struct rte_event_timer * const tim)
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{
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if (unlikely(tim->state)) {
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tim->state = RTE_EVENT_TIMER_ERROR;
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rte_errno = EALREADY;
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goto fail;
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}
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if (unlikely(!tim->timeout_ticks ||
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tim->timeout_ticks >= tim_ring->nb_bkts)) {
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tim->state = tim->timeout_ticks ? RTE_EVENT_TIMER_ERROR_TOOLATE
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: RTE_EVENT_TIMER_ERROR_TOOEARLY;
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rte_errno = EINVAL;
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goto fail;
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}
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return 0;
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fail:
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return -EINVAL;
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}
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static inline void
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tim_format_event(const struct rte_event_timer * const tim,
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struct otx2_tim_ent * const entry)
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{
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entry->w0 = (tim->ev.event & 0xFFC000000000) >> 6 |
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(tim->ev.event & 0xFFFFFFFFF);
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entry->wqe = tim->ev.u64;
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}
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static inline void
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tim_sync_start_cyc(struct otx2_tim_ring *tim_ring)
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{
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uint64_t cur_cyc = tim_cntvct();
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uint32_t real_bkt;
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if (cur_cyc - tim_ring->last_updt_cyc > tim_ring->tot_int) {
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real_bkt = otx2_read64(tim_ring->base + TIM_LF_RING_REL) >> 44;
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cur_cyc = tim_cntvct();
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tim_ring->ring_start_cyc = cur_cyc -
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(real_bkt * tim_ring->tck_int);
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tim_ring->last_updt_cyc = cur_cyc;
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}
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}
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static __rte_always_inline uint16_t
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tim_timer_arm_burst(const struct rte_event_timer_adapter *adptr,
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struct rte_event_timer **tim,
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const uint16_t nb_timers,
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const uint8_t flags)
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{
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struct otx2_tim_ring *tim_ring = adptr->data->adapter_priv;
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struct otx2_tim_ent entry;
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uint16_t index;
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int ret;
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tim_sync_start_cyc(tim_ring);
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for (index = 0; index < nb_timers; index++) {
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if (tim_arm_checks(tim_ring, tim[index]))
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break;
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tim_format_event(tim[index], &entry);
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if (flags & OTX2_TIM_SP)
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ret = tim_add_entry_sp(tim_ring,
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tim[index]->timeout_ticks,
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tim[index], &entry, flags);
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if (flags & OTX2_TIM_MP)
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ret = tim_add_entry_mp(tim_ring,
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tim[index]->timeout_ticks,
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tim[index], &entry, flags);
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if (unlikely(ret)) {
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rte_errno = -ret;
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break;
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}
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}
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if (flags & OTX2_TIM_ENA_STATS)
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__atomic_fetch_add(&tim_ring->arm_cnt, index, __ATOMIC_RELAXED);
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return index;
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}
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static __rte_always_inline uint16_t
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tim_timer_arm_tmo_brst(const struct rte_event_timer_adapter *adptr,
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struct rte_event_timer **tim,
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const uint64_t timeout_tick,
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const uint16_t nb_timers, const uint8_t flags)
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{
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struct otx2_tim_ent entry[OTX2_TIM_MAX_BURST] __rte_cache_aligned;
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struct otx2_tim_ring *tim_ring = adptr->data->adapter_priv;
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uint16_t set_timers = 0;
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uint16_t arr_idx = 0;
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uint16_t idx;
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int ret;
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if (unlikely(!timeout_tick || timeout_tick >= tim_ring->nb_bkts)) {
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const enum rte_event_timer_state state = timeout_tick ?
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RTE_EVENT_TIMER_ERROR_TOOLATE :
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RTE_EVENT_TIMER_ERROR_TOOEARLY;
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for (idx = 0; idx < nb_timers; idx++)
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tim[idx]->state = state;
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rte_errno = EINVAL;
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return 0;
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}
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tim_sync_start_cyc(tim_ring);
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while (arr_idx < nb_timers) {
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for (idx = 0; idx < OTX2_TIM_MAX_BURST && (arr_idx < nb_timers);
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idx++, arr_idx++) {
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tim_format_event(tim[arr_idx], &entry[idx]);
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}
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ret = tim_add_entry_brst(tim_ring, timeout_tick,
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&tim[set_timers], entry, idx, flags);
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set_timers += ret;
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if (ret != idx)
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break;
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}
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if (flags & OTX2_TIM_ENA_STATS)
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__atomic_fetch_add(&tim_ring->arm_cnt, set_timers,
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__ATOMIC_RELAXED);
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return set_timers;
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}
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#define FP(_name, _f3, _f2, _f1, _flags) \
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uint16_t __rte_noinline \
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otx2_tim_arm_burst_ ## _name(const struct rte_event_timer_adapter *adptr, \
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struct rte_event_timer **tim, \
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const uint16_t nb_timers) \
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{ \
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return tim_timer_arm_burst(adptr, tim, nb_timers, _flags); \
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}
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TIM_ARM_FASTPATH_MODES
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#undef FP
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#define FP(_name, _f2, _f1, _flags) \
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uint16_t __rte_noinline \
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otx2_tim_arm_tmo_tick_burst_ ## _name( \
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const struct rte_event_timer_adapter *adptr, \
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struct rte_event_timer **tim, \
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const uint64_t timeout_tick, \
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const uint16_t nb_timers) \
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{ \
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return tim_timer_arm_tmo_brst(adptr, tim, timeout_tick, \
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nb_timers, _flags); \
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}
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TIM_ARM_TMO_FASTPATH_MODES
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#undef FP
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uint16_t
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otx2_tim_timer_cancel_burst(const struct rte_event_timer_adapter *adptr,
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struct rte_event_timer **tim,
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const uint16_t nb_timers)
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{
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uint16_t index;
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int ret;
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RTE_SET_USED(adptr);
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rte_atomic_thread_fence(__ATOMIC_ACQUIRE);
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for (index = 0; index < nb_timers; index++) {
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if (tim[index]->state == RTE_EVENT_TIMER_CANCELED) {
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rte_errno = EALREADY;
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break;
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}
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if (tim[index]->state != RTE_EVENT_TIMER_ARMED) {
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rte_errno = EINVAL;
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break;
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}
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ret = tim_rm_entry(tim[index]);
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if (ret) {
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rte_errno = -ret;
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break;
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}
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}
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return index;
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}
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