3983583414
Add bnxt vector PMD support using NEON SIMD instructions. Also update the 20.08 release notes with this information. Signed-off-by: Lance Richardson <lance.richardson@broadcom.com> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
852 lines
23 KiB
C
852 lines
23 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2014-2018 Broadcom
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* All rights reserved.
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*/
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#include <rte_bitmap.h>
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#include <rte_memzone.h>
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#include <rte_malloc.h>
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#include <unistd.h>
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#include "bnxt.h"
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#include "bnxt_hwrm.h"
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#include "bnxt_ring.h"
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#include "bnxt_rxq.h"
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#include "bnxt_rxr.h"
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#include "bnxt_txq.h"
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#include "bnxt_txr.h"
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#include "hsi_struct_def_dpdk.h"
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/*
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* Generic ring handling
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*/
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void bnxt_free_ring(struct bnxt_ring *ring)
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{
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if (!ring)
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return;
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if (ring->vmem_size && *ring->vmem) {
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memset((char *)*ring->vmem, 0, ring->vmem_size);
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*ring->vmem = NULL;
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}
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ring->mem_zone = NULL;
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}
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/*
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* Ring groups
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*/
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static void bnxt_init_ring_grps(struct bnxt *bp)
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{
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unsigned int i;
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for (i = 0; i < bp->max_ring_grps; i++)
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memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
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sizeof(struct bnxt_ring_grp_info));
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}
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int bnxt_alloc_ring_grps(struct bnxt *bp)
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{
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if (bp->max_tx_rings == 0) {
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PMD_DRV_LOG(ERR, "No TX rings available!\n");
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return -EBUSY;
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}
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/* THOR does not support ring groups.
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* But we will use the array to save RSS context IDs.
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*/
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if (BNXT_CHIP_THOR(bp)) {
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bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_THOR;
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} else if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
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/* 1 ring is for default completion ring */
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PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
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return -ENOSPC;
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}
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if (BNXT_HAS_RING_GRPS(bp)) {
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bp->grp_info = rte_zmalloc("bnxt_grp_info",
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sizeof(*bp->grp_info) *
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bp->max_ring_grps, 0);
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if (!bp->grp_info) {
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PMD_DRV_LOG(ERR,
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"Failed to alloc grp info tbl.\n");
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return -ENOMEM;
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}
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bnxt_init_ring_grps(bp);
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}
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return 0;
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}
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/*
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* Allocates a completion ring with vmem and stats optionally also allocating
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* a TX and/or RX ring. Passing NULL as tx_ring_info and/or rx_ring_info
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* to not allocate them.
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*
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* Order in the allocation is:
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* stats - Always non-zero length
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* cp vmem - Always zero-length, supported for the bnxt_ring abstraction
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* tx vmem - Only non-zero length if tx_ring_info is not NULL
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* rx vmem - Only non-zero length if rx_ring_info is not NULL
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* cp bd ring - Always non-zero length
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* tx bd ring - Only non-zero length if tx_ring_info is not NULL
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* rx bd ring - Only non-zero length if rx_ring_info is not NULL
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*/
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int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
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struct bnxt_tx_queue *txq,
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struct bnxt_rx_queue *rxq,
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struct bnxt_cp_ring_info *cp_ring_info,
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struct bnxt_cp_ring_info *nq_ring_info,
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const char *suffix)
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{
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struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
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struct bnxt_rx_ring_info *rx_ring_info = rxq ? rxq->rx_ring : NULL;
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struct bnxt_tx_ring_info *tx_ring_info = txq ? txq->tx_ring : NULL;
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struct bnxt_ring *tx_ring;
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struct bnxt_ring *rx_ring;
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struct rte_pci_device *pdev = bp->pdev;
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uint64_t rx_offloads = bp->eth_dev->data->dev_conf.rxmode.offloads;
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const struct rte_memzone *mz = NULL;
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char mz_name[RTE_MEMZONE_NAMESIZE];
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rte_iova_t mz_phys_addr;
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int stats_len = (tx_ring_info || rx_ring_info) ?
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RTE_CACHE_LINE_ROUNDUP(sizeof(struct hwrm_stat_ctx_query_output) -
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sizeof (struct hwrm_resp_hdr)) : 0;
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stats_len = RTE_ALIGN(stats_len, 128);
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int cp_vmem_start = stats_len;
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int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
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cp_vmem_len = RTE_ALIGN(cp_vmem_len, 128);
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int nq_vmem_len = nq_ring_info ?
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RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size) : 0;
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nq_vmem_len = RTE_ALIGN(nq_vmem_len, 128);
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int nq_vmem_start = cp_vmem_start + cp_vmem_len;
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int tx_vmem_start = nq_vmem_start + nq_vmem_len;
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int tx_vmem_len =
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tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
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tx_ring_struct->vmem_size) : 0;
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tx_vmem_len = RTE_ALIGN(tx_vmem_len, 128);
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int rx_vmem_start = tx_vmem_start + tx_vmem_len;
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int rx_vmem_len = rx_ring_info ?
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RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
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rx_ring_struct->vmem_size) : 0;
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rx_vmem_len = RTE_ALIGN(rx_vmem_len, 128);
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int ag_vmem_start = 0;
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int ag_vmem_len = 0;
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int cp_ring_start = 0;
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int nq_ring_start = 0;
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ag_vmem_start = rx_vmem_start + rx_vmem_len;
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ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
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rx_ring_info->ag_ring_struct->vmem_size) : 0;
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cp_ring_start = ag_vmem_start + ag_vmem_len;
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cp_ring_start = RTE_ALIGN(cp_ring_start, 4096);
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int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
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sizeof(struct cmpl_base));
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cp_ring_len = RTE_ALIGN(cp_ring_len, 128);
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nq_ring_start = cp_ring_start + cp_ring_len;
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nq_ring_start = RTE_ALIGN(nq_ring_start, 4096);
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int nq_ring_len = nq_ring_info ? cp_ring_len : 0;
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int tx_ring_start = nq_ring_start + nq_ring_len;
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tx_ring_start = RTE_ALIGN(tx_ring_start, 4096);
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int tx_ring_len = tx_ring_info ?
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RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
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sizeof(struct tx_bd_long)) : 0;
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tx_ring_len = RTE_ALIGN(tx_ring_len, 4096);
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int rx_ring_start = tx_ring_start + tx_ring_len;
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rx_ring_start = RTE_ALIGN(rx_ring_start, 4096);
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int rx_ring_len = rx_ring_info ?
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RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
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sizeof(struct rx_prod_pkt_bd)) : 0;
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rx_ring_len = RTE_ALIGN(rx_ring_len, 4096);
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int ag_ring_start = rx_ring_start + rx_ring_len;
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ag_ring_start = RTE_ALIGN(ag_ring_start, 4096);
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int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR;
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ag_ring_len = RTE_ALIGN(ag_ring_len, 4096);
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int ag_bitmap_start = ag_ring_start + ag_ring_len;
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int ag_bitmap_len = rx_ring_info ?
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RTE_CACHE_LINE_ROUNDUP(rte_bitmap_get_memory_footprint(
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rx_ring_info->rx_ring_struct->ring_size *
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AGG_RING_SIZE_FACTOR)) : 0;
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int tpa_info_start = ag_bitmap_start + ag_bitmap_len;
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int tpa_info_len = 0;
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if (rx_ring_info && (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)) {
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int tpa_max = BNXT_TPA_MAX_AGGS(bp);
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tpa_info_len = tpa_max * sizeof(struct bnxt_tpa_info);
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tpa_info_len = RTE_CACHE_LINE_ROUNDUP(tpa_info_len);
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}
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int total_alloc_len = tpa_info_start;
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total_alloc_len += tpa_info_len;
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snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
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"bnxt_" PCI_PRI_FMT "-%04x_%s", pdev->addr.domain,
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pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
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suffix);
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mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
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mz = rte_memzone_lookup(mz_name);
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if (!mz) {
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mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
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SOCKET_ID_ANY,
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RTE_MEMZONE_2MB |
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RTE_MEMZONE_SIZE_HINT_ONLY |
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RTE_MEMZONE_IOVA_CONTIG,
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getpagesize());
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if (mz == NULL)
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return -ENOMEM;
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}
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memset(mz->addr, 0, mz->len);
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mz_phys_addr = mz->iova;
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if (tx_ring_info) {
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txq->mz = mz;
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tx_ring = tx_ring_info->tx_ring_struct;
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tx_ring->bd = ((char *)mz->addr + tx_ring_start);
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tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
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tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
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tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
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tx_ring->mem_zone = (const void *)mz;
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if (!tx_ring->bd)
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return -ENOMEM;
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if (tx_ring->vmem_size) {
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tx_ring->vmem =
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(void **)((char *)mz->addr + tx_vmem_start);
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tx_ring_info->tx_buf_ring =
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(struct bnxt_sw_tx_bd *)tx_ring->vmem;
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}
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}
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if (rx_ring_info) {
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rxq->mz = mz;
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rx_ring = rx_ring_info->rx_ring_struct;
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rx_ring->bd = ((char *)mz->addr + rx_ring_start);
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rx_ring_info->rx_desc_ring =
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(struct rx_prod_pkt_bd *)rx_ring->bd;
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rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
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rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
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rx_ring->mem_zone = (const void *)mz;
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if (!rx_ring->bd)
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return -ENOMEM;
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if (rx_ring->vmem_size) {
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rx_ring->vmem =
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(void **)((char *)mz->addr + rx_vmem_start);
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rx_ring_info->rx_buf_ring =
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(struct bnxt_sw_rx_bd *)rx_ring->vmem;
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}
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rx_ring = rx_ring_info->ag_ring_struct;
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rx_ring->bd = ((char *)mz->addr + ag_ring_start);
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rx_ring_info->ag_desc_ring =
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(struct rx_prod_pkt_bd *)rx_ring->bd;
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rx_ring->bd_dma = mz->iova + ag_ring_start;
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rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
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rx_ring->mem_zone = (const void *)mz;
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if (!rx_ring->bd)
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return -ENOMEM;
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if (rx_ring->vmem_size) {
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rx_ring->vmem =
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(void **)((char *)mz->addr + ag_vmem_start);
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rx_ring_info->ag_buf_ring =
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(struct bnxt_sw_rx_bd *)rx_ring->vmem;
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}
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rx_ring_info->ag_bitmap =
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rte_bitmap_init(rx_ring_info->rx_ring_struct->ring_size *
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AGG_RING_SIZE_FACTOR, (uint8_t *)mz->addr +
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ag_bitmap_start, ag_bitmap_len);
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/* TPA info */
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if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
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rx_ring_info->tpa_info =
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((struct bnxt_tpa_info *)((char *)mz->addr +
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tpa_info_start));
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}
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cp_ring->bd = ((char *)mz->addr + cp_ring_start);
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cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
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cp_ring_info->cp_desc_ring = cp_ring->bd;
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cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
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cp_ring->mem_zone = (const void *)mz;
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if (!cp_ring->bd)
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return -ENOMEM;
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if (cp_ring->vmem_size)
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*cp_ring->vmem = ((char *)mz->addr + stats_len);
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if (stats_len) {
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cp_ring_info->hw_stats = mz->addr;
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cp_ring_info->hw_stats_map = mz_phys_addr;
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}
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cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
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if (nq_ring_info) {
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struct bnxt_ring *nq_ring = nq_ring_info->cp_ring_struct;
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nq_ring->bd = (char *)mz->addr + nq_ring_start;
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nq_ring->bd_dma = mz_phys_addr + nq_ring_start;
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nq_ring_info->cp_desc_ring = nq_ring->bd;
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nq_ring_info->cp_desc_mapping = nq_ring->bd_dma;
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nq_ring->mem_zone = (const void *)mz;
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if (!nq_ring->bd)
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return -ENOMEM;
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if (nq_ring->vmem_size)
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*nq_ring->vmem = (char *)mz->addr + nq_vmem_start;
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nq_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
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}
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return 0;
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}
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static void bnxt_init_dflt_coal(struct bnxt_coal *coal)
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{
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/* Tick values in micro seconds.
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* 1 coal_buf x bufs_per_record = 1 completion record.
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*/
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coal->num_cmpl_aggr_int = BNXT_NUM_CMPL_AGGR_INT;
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/* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
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coal->num_cmpl_dma_aggr = BNXT_NUM_CMPL_DMA_AGGR;
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/* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
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coal->num_cmpl_dma_aggr_during_int = BNXT_NUM_CMPL_DMA_AGGR_DURING_INT;
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coal->int_lat_tmr_max = BNXT_INT_LAT_TMR_MAX;
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/* min timer set to 1/2 of interrupt timer */
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coal->int_lat_tmr_min = BNXT_INT_LAT_TMR_MIN;
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/* buf timer set to 1/4 of interrupt timer */
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coal->cmpl_aggr_dma_tmr = BNXT_CMPL_AGGR_DMA_TMR;
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coal->cmpl_aggr_dma_tmr_during_int = BNXT_CMPL_AGGR_DMA_TMR_DURING_INT;
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}
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static void bnxt_set_db(struct bnxt *bp,
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struct bnxt_db_info *db,
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uint32_t ring_type,
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uint32_t map_idx,
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uint32_t fid)
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{
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if (BNXT_CHIP_THOR(bp)) {
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if (BNXT_PF(bp))
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db->doorbell = (char *)bp->doorbell_base + 0x10000;
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else
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db->doorbell = (char *)bp->doorbell_base + 0x4000;
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switch (ring_type) {
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case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
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db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
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break;
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case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
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case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG:
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db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ;
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break;
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case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
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db->db_key64 = DBR_PATH_L2 | DBR_TYPE_CQ;
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break;
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case HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ:
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db->db_key64 = DBR_PATH_L2;
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break;
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}
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db->db_key64 |= (uint64_t)fid << DBR_XID_SFT;
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db->db_64 = true;
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} else {
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db->doorbell = (char *)bp->doorbell_base + map_idx * 0x80;
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switch (ring_type) {
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case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
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db->db_key32 = DB_KEY_TX;
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break;
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case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
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db->db_key32 = DB_KEY_RX;
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break;
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case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
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db->db_key32 = DB_KEY_CP;
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break;
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}
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db->db_64 = false;
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}
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}
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static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,
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struct bnxt_cp_ring_info *cpr)
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{
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struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
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uint32_t nq_ring_id = HWRM_NA_SIGNATURE;
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int cp_ring_index = queue_index + BNXT_RX_VEC_START;
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struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
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uint8_t ring_type;
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int rc = 0;
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ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
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if (BNXT_HAS_NQ(bp)) {
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if (nqr) {
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nq_ring_id = nqr->cp_ring_struct->fw_ring_id;
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} else {
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PMD_DRV_LOG(ERR, "NQ ring is NULL\n");
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return -EINVAL;
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}
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}
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rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, cp_ring_index,
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HWRM_NA_SIGNATURE, nq_ring_id, 0);
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if (rc)
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return rc;
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cpr->cp_cons = 0;
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bnxt_set_db(bp, &cpr->cp_db, ring_type, cp_ring_index,
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cp_ring->fw_ring_id);
|
|
bnxt_db_cq(cpr);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int bnxt_alloc_rxtx_nq_ring(struct bnxt *bp)
|
|
{
|
|
struct bnxt_cp_ring_info *nqr;
|
|
struct bnxt_ring *ring;
|
|
int ring_index = BNXT_NUM_ASYNC_CPR(bp);
|
|
unsigned int socket_id;
|
|
uint8_t ring_type;
|
|
int rc = 0;
|
|
|
|
if (!BNXT_HAS_NQ(bp) || bp->rxtx_nq_ring)
|
|
return 0;
|
|
|
|
socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
|
|
|
|
nqr = rte_zmalloc_socket("nqr",
|
|
sizeof(struct bnxt_cp_ring_info),
|
|
RTE_CACHE_LINE_SIZE, socket_id);
|
|
if (nqr == NULL)
|
|
return -ENOMEM;
|
|
|
|
ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
|
|
sizeof(struct bnxt_ring),
|
|
RTE_CACHE_LINE_SIZE, socket_id);
|
|
if (ring == NULL) {
|
|
rte_free(nqr);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
ring->bd = (void *)nqr->cp_desc_ring;
|
|
ring->bd_dma = nqr->cp_desc_mapping;
|
|
ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
|
|
ring->ring_mask = ring->ring_size - 1;
|
|
ring->vmem_size = 0;
|
|
ring->vmem = NULL;
|
|
|
|
nqr->cp_ring_struct = ring;
|
|
rc = bnxt_alloc_rings(bp, 0, NULL, NULL, nqr, NULL, "l2_nqr");
|
|
if (rc) {
|
|
rte_free(ring);
|
|
rte_free(nqr);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
|
|
|
|
rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, ring_index,
|
|
HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
|
|
if (rc) {
|
|
rte_free(ring);
|
|
rte_free(nqr);
|
|
return rc;
|
|
}
|
|
|
|
bnxt_set_db(bp, &nqr->cp_db, ring_type, ring_index,
|
|
ring->fw_ring_id);
|
|
bnxt_db_nq(nqr);
|
|
|
|
bp->rxtx_nq_ring = nqr;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Free RX/TX NQ ring. */
|
|
void bnxt_free_rxtx_nq_ring(struct bnxt *bp)
|
|
{
|
|
struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
|
|
|
|
if (!nqr)
|
|
return;
|
|
|
|
bnxt_free_nq_ring(bp, nqr);
|
|
|
|
bnxt_free_ring(nqr->cp_ring_struct);
|
|
rte_free(nqr->cp_ring_struct);
|
|
nqr->cp_ring_struct = NULL;
|
|
rte_free(nqr);
|
|
bp->rxtx_nq_ring = NULL;
|
|
}
|
|
|
|
static int bnxt_alloc_rx_ring(struct bnxt *bp, int queue_index)
|
|
{
|
|
struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
|
|
struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
|
|
struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
|
|
struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
|
|
struct bnxt_ring *ring = rxr->rx_ring_struct;
|
|
uint8_t ring_type;
|
|
int rc = 0;
|
|
|
|
ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
|
|
|
|
rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type,
|
|
queue_index, cpr->hw_stats_ctx_id,
|
|
cp_ring->fw_ring_id, 0);
|
|
if (rc)
|
|
return rc;
|
|
|
|
rxr->rx_prod = 0;
|
|
if (BNXT_HAS_RING_GRPS(bp))
|
|
bp->grp_info[queue_index].rx_fw_ring_id = ring->fw_ring_id;
|
|
bnxt_set_db(bp, &rxr->rx_db, ring_type, queue_index, ring->fw_ring_id);
|
|
bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bnxt_alloc_rx_agg_ring(struct bnxt *bp, int queue_index)
|
|
{
|
|
unsigned int map_idx = queue_index + bp->rx_cp_nr_rings;
|
|
struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
|
|
struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
|
|
struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
|
|
struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
|
|
struct bnxt_ring *ring = rxr->ag_ring_struct;
|
|
uint32_t hw_stats_ctx_id = HWRM_NA_SIGNATURE;
|
|
uint8_t ring_type;
|
|
int rc = 0;
|
|
|
|
ring->fw_rx_ring_id = rxr->rx_ring_struct->fw_ring_id;
|
|
|
|
if (BNXT_CHIP_THOR(bp)) {
|
|
ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG;
|
|
hw_stats_ctx_id = cpr->hw_stats_ctx_id;
|
|
} else {
|
|
ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
|
|
}
|
|
|
|
rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, map_idx,
|
|
hw_stats_ctx_id, cp_ring->fw_ring_id, 0);
|
|
|
|
if (rc)
|
|
return rc;
|
|
|
|
rxr->ag_prod = 0;
|
|
if (BNXT_HAS_RING_GRPS(bp))
|
|
bp->grp_info[queue_index].ag_fw_ring_id = ring->fw_ring_id;
|
|
bnxt_set_db(bp, &rxr->ag_db, ring_type, map_idx, ring->fw_ring_id);
|
|
bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
|
|
{
|
|
struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
|
|
struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
|
|
struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
|
|
struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
|
|
int rc;
|
|
|
|
rc = bnxt_alloc_cmpl_ring(bp, queue_index, cpr);
|
|
if (rc)
|
|
goto err_out;
|
|
|
|
if (BNXT_HAS_RING_GRPS(bp)) {
|
|
bp->grp_info[queue_index].fw_stats_ctx = cpr->hw_stats_ctx_id;
|
|
bp->grp_info[queue_index].cp_fw_ring_id = cp_ring->fw_ring_id;
|
|
}
|
|
|
|
if (!BNXT_NUM_ASYNC_CPR(bp) && !queue_index) {
|
|
/*
|
|
* If a dedicated async event completion ring is not enabled,
|
|
* use the first completion ring from PF or VF as the default
|
|
* completion ring for async event handling.
|
|
*/
|
|
bp->async_cp_ring = cpr;
|
|
rc = bnxt_hwrm_set_async_event_cr(bp);
|
|
if (rc)
|
|
goto err_out;
|
|
}
|
|
|
|
rc = bnxt_alloc_rx_ring(bp, queue_index);
|
|
if (rc)
|
|
goto err_out;
|
|
|
|
rc = bnxt_alloc_rx_agg_ring(bp, queue_index);
|
|
if (rc)
|
|
goto err_out;
|
|
|
|
if (rxq->rx_started) {
|
|
if (bnxt_init_one_rx_ring(rxq)) {
|
|
PMD_DRV_LOG(ERR,
|
|
"bnxt_init_one_rx_ring failed!\n");
|
|
bnxt_rx_queue_release_op(rxq);
|
|
rc = -ENOMEM;
|
|
goto err_out;
|
|
}
|
|
bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
|
|
bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
|
|
}
|
|
rxq->index = queue_index;
|
|
#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
|
|
bnxt_rxq_vec_setup(rxq);
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
err_out:
|
|
PMD_DRV_LOG(ERR,
|
|
"Failed to allocate receive queue %d, rc %d.\n",
|
|
queue_index, rc);
|
|
return rc;
|
|
}
|
|
|
|
/* Initialise all rings to -1, its used to free rings later if allocation
|
|
* of few rings fails.
|
|
*/
|
|
static void bnxt_init_all_rings(struct bnxt *bp)
|
|
{
|
|
unsigned int i = 0;
|
|
struct bnxt_rx_queue *rxq;
|
|
struct bnxt_ring *cp_ring;
|
|
struct bnxt_ring *ring;
|
|
struct bnxt_rx_ring_info *rxr;
|
|
struct bnxt_tx_queue *txq;
|
|
|
|
for (i = 0; i < bp->rx_cp_nr_rings; i++) {
|
|
rxq = bp->rx_queues[i];
|
|
/* Rx-compl */
|
|
cp_ring = rxq->cp_ring->cp_ring_struct;
|
|
cp_ring->fw_ring_id = INVALID_HW_RING_ID;
|
|
/* Rx-Reg */
|
|
rxr = rxq->rx_ring;
|
|
ring = rxr->rx_ring_struct;
|
|
ring->fw_ring_id = INVALID_HW_RING_ID;
|
|
/* Rx-AGG */
|
|
ring = rxr->ag_ring_struct;
|
|
ring->fw_ring_id = INVALID_HW_RING_ID;
|
|
}
|
|
for (i = 0; i < bp->tx_cp_nr_rings; i++) {
|
|
txq = bp->tx_queues[i];
|
|
/* Tx cmpl */
|
|
cp_ring = txq->cp_ring->cp_ring_struct;
|
|
cp_ring->fw_ring_id = INVALID_HW_RING_ID;
|
|
/*Tx Ring */
|
|
ring = txq->tx_ring->tx_ring_struct;
|
|
ring->fw_ring_id = INVALID_HW_RING_ID;
|
|
}
|
|
}
|
|
|
|
/* ring_grp usage:
|
|
* [0] = default completion ring
|
|
* [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
|
|
* [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
|
|
*/
|
|
int bnxt_alloc_hwrm_rings(struct bnxt *bp)
|
|
{
|
|
struct bnxt_coal coal;
|
|
unsigned int i;
|
|
uint8_t ring_type;
|
|
int rc = 0;
|
|
|
|
bnxt_init_dflt_coal(&coal);
|
|
bnxt_init_all_rings(bp);
|
|
|
|
for (i = 0; i < bp->rx_cp_nr_rings; i++) {
|
|
struct bnxt_rx_queue *rxq = bp->rx_queues[i];
|
|
struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
|
|
struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
|
|
struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
|
|
|
|
if (bnxt_alloc_cmpl_ring(bp, i, cpr))
|
|
goto err_out;
|
|
|
|
if (BNXT_HAS_RING_GRPS(bp)) {
|
|
bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
|
|
bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
|
|
}
|
|
|
|
bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
|
|
if (!BNXT_NUM_ASYNC_CPR(bp) && !i) {
|
|
/*
|
|
* If a dedicated async event completion ring is not
|
|
* enabled, use the first completion ring as the default
|
|
* completion ring for async event handling.
|
|
*/
|
|
bp->async_cp_ring = cpr;
|
|
rc = bnxt_hwrm_set_async_event_cr(bp);
|
|
if (rc)
|
|
goto err_out;
|
|
}
|
|
|
|
if (bnxt_alloc_rx_ring(bp, i))
|
|
goto err_out;
|
|
|
|
if (bnxt_alloc_rx_agg_ring(bp, i))
|
|
goto err_out;
|
|
|
|
if (bnxt_init_one_rx_ring(rxq)) {
|
|
PMD_DRV_LOG(ERR, "bnxt_init_one_rx_ring failed!\n");
|
|
bnxt_rx_queue_release_op(rxq);
|
|
return -ENOMEM;
|
|
}
|
|
bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
|
|
bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
|
|
rxq->index = i;
|
|
#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
|
|
bnxt_rxq_vec_setup(rxq);
|
|
#endif
|
|
}
|
|
|
|
for (i = 0; i < bp->tx_cp_nr_rings; i++) {
|
|
struct bnxt_tx_queue *txq = bp->tx_queues[i];
|
|
struct bnxt_cp_ring_info *cpr = txq->cp_ring;
|
|
struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
|
|
struct bnxt_tx_ring_info *txr = txq->tx_ring;
|
|
struct bnxt_ring *ring = txr->tx_ring_struct;
|
|
unsigned int idx = i + bp->rx_cp_nr_rings;
|
|
uint16_t tx_cosq_id = 0;
|
|
|
|
if (bnxt_alloc_cmpl_ring(bp, idx, cpr))
|
|
goto err_out;
|
|
|
|
if (bp->vnic_cap_flags & BNXT_VNIC_CAP_COS_CLASSIFY)
|
|
tx_cosq_id = bp->tx_cosq_id[i < bp->max_lltc ? i : 0];
|
|
else
|
|
tx_cosq_id = bp->tx_cosq_id[0];
|
|
/* Tx ring */
|
|
ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_TX;
|
|
rc = bnxt_hwrm_ring_alloc(bp, ring,
|
|
ring_type,
|
|
i, cpr->hw_stats_ctx_id,
|
|
cp_ring->fw_ring_id,
|
|
tx_cosq_id);
|
|
if (rc)
|
|
goto err_out;
|
|
|
|
bnxt_set_db(bp, &txr->tx_db, ring_type, i, ring->fw_ring_id);
|
|
txq->index = idx;
|
|
bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
|
|
}
|
|
|
|
err_out:
|
|
return rc;
|
|
}
|
|
|
|
/* Allocate dedicated async completion ring. */
|
|
int bnxt_alloc_async_cp_ring(struct bnxt *bp)
|
|
{
|
|
struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
|
|
struct bnxt_ring *cp_ring;
|
|
uint8_t ring_type;
|
|
int rc;
|
|
|
|
if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
|
|
return 0;
|
|
|
|
cp_ring = cpr->cp_ring_struct;
|
|
|
|
if (BNXT_HAS_NQ(bp))
|
|
ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
|
|
else
|
|
ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
|
|
|
|
rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, 0,
|
|
HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
|
|
|
|
if (rc)
|
|
return rc;
|
|
|
|
cpr->cp_cons = 0;
|
|
cpr->valid = 0;
|
|
bnxt_set_db(bp, &cpr->cp_db, ring_type, 0,
|
|
cp_ring->fw_ring_id);
|
|
|
|
if (BNXT_HAS_NQ(bp))
|
|
bnxt_db_nq(cpr);
|
|
else
|
|
bnxt_db_cq(cpr);
|
|
|
|
return bnxt_hwrm_set_async_event_cr(bp);
|
|
}
|
|
|
|
/* Free dedicated async completion ring. */
|
|
void bnxt_free_async_cp_ring(struct bnxt *bp)
|
|
{
|
|
struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
|
|
|
|
if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
|
|
return;
|
|
|
|
if (BNXT_HAS_NQ(bp))
|
|
bnxt_free_nq_ring(bp, cpr);
|
|
else
|
|
bnxt_free_cp_ring(bp, cpr);
|
|
|
|
bnxt_free_ring(cpr->cp_ring_struct);
|
|
rte_free(cpr->cp_ring_struct);
|
|
cpr->cp_ring_struct = NULL;
|
|
rte_free(cpr);
|
|
bp->async_cp_ring = NULL;
|
|
}
|
|
|
|
int bnxt_alloc_async_ring_struct(struct bnxt *bp)
|
|
{
|
|
struct bnxt_cp_ring_info *cpr = NULL;
|
|
struct bnxt_ring *ring = NULL;
|
|
unsigned int socket_id;
|
|
|
|
if (BNXT_NUM_ASYNC_CPR(bp) == 0)
|
|
return 0;
|
|
|
|
socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
|
|
|
|
cpr = rte_zmalloc_socket("cpr",
|
|
sizeof(struct bnxt_cp_ring_info),
|
|
RTE_CACHE_LINE_SIZE, socket_id);
|
|
if (cpr == NULL)
|
|
return -ENOMEM;
|
|
|
|
ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
|
|
sizeof(struct bnxt_ring),
|
|
RTE_CACHE_LINE_SIZE, socket_id);
|
|
if (ring == NULL) {
|
|
rte_free(cpr);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
ring->bd = (void *)cpr->cp_desc_ring;
|
|
ring->bd_dma = cpr->cp_desc_mapping;
|
|
ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
|
|
ring->ring_mask = ring->ring_size - 1;
|
|
ring->vmem_size = 0;
|
|
ring->vmem = NULL;
|
|
|
|
bp->async_cp_ring = cpr;
|
|
cpr->cp_ring_struct = ring;
|
|
|
|
return bnxt_alloc_rings(bp, 0, NULL, NULL,
|
|
bp->async_cp_ring, NULL,
|
|
"def_cp");
|
|
}
|