224cff4bba
When setting promiscuous or allmulticast mode, increase
multi-thread resource protection, because the patch
"net/bonding: prefer allmulti to promiscuous for LACP"
adds trying to use allmulti when adding a slave, and
EVS bond driver also sets promisc with another thread,
which may lead to thread reentry and cause failure to
set promiscuous mode.
Fixes: cb7b6606eb
("net/hinic: add RSS stats and promiscuous ops")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
354 lines
7.9 KiB
C
354 lines
7.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2017 Huawei Technologies Co., Ltd
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*/
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#ifndef _HINIC_PMD_ETHDEV_H_
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#define _HINIC_PMD_ETHDEV_H_
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#include <rte_ethdev.h>
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#include <rte_ethdev_core.h>
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#include "base/hinic_compat.h"
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#include "base/hinic_pmd_cfg.h"
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#define HINIC_DEV_NAME_LEN 32
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#define HINIC_MAX_RX_QUEUES 64
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/* mbuf pool for copy invalid mbuf segs */
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#define HINIC_COPY_MEMPOOL_DEPTH 128
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#define HINIC_COPY_MBUF_SIZE 4096
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#define SIZE_8BYTES(size) (ALIGN((u32)(size), 8) >> 3)
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#define HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev) \
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((struct hinic_nic_dev *)(dev)->data->dev_private)
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#define HINIC_MAX_QUEUE_DEPTH 4096
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#define HINIC_MIN_QUEUE_DEPTH 128
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#define HINIC_TXD_ALIGN 1
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#define HINIC_RXD_ALIGN 1
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#define HINIC_UINT32_BIT_SIZE (CHAR_BIT * sizeof(uint32_t))
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#define HINIC_VFTA_SIZE (4096 / HINIC_UINT32_BIT_SIZE)
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enum hinic_dev_status {
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HINIC_DEV_INIT,
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HINIC_DEV_CLOSE,
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HINIC_DEV_START,
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HINIC_DEV_INTR_EN,
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};
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#define HINIC_MAX_Q_FILTERS 64 /* hinic just support 64 filter types */
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#define HINIC_PKT_TYPE_FIND_ID(pkt_type) ((pkt_type) - HINIC_MAX_Q_FILTERS)
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/* 5tuple filter info */
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struct hinic_5tuple_filter_info {
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uint32_t dst_ip;
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uint32_t src_ip;
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uint16_t dst_port;
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uint16_t src_port;
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uint8_t proto; /* l4 protocol. */
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/*
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* seven levels (001b-111b), 111b is highest,
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* used when more than one filter matches.
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*/
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uint8_t priority;
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/* if mask is 1b, do not compare the response bit domain */
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uint8_t dst_ip_mask:1,
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src_ip_mask:1,
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dst_port_mask:1,
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src_port_mask:1,
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proto_mask:1;
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};
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/* 5tuple filter structure */
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struct hinic_5tuple_filter {
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TAILQ_ENTRY(hinic_5tuple_filter) entries;
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uint16_t index; /* the index of 5tuple filter */
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struct hinic_5tuple_filter_info filter_info;
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uint16_t queue; /* rx queue assigned to */
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};
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TAILQ_HEAD(hinic_5tuple_filter_list, hinic_5tuple_filter);
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/*
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* If this filter is added by configuration,
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* it should not be removed.
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*/
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struct hinic_pkt_filter {
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uint16_t pkt_proto;
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uint8_t qid;
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bool enable;
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};
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/* Structure to store filters' info. */
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struct hinic_filter_info {
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uint8_t pkt_type;
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uint8_t qid;
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uint64_t type_mask; /* Bit mask for every used filter */
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struct hinic_5tuple_filter_list fivetuple_list;
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struct hinic_pkt_filter pkt_filters[HINIC_MAX_Q_FILTERS];
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};
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/* Information about the fdir mode. */
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struct hinic_hw_fdir_mask {
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uint32_t src_ipv4_mask;
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uint32_t dst_ipv4_mask;
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uint16_t src_port_mask;
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uint16_t dst_port_mask;
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uint16_t proto_mask;
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uint16_t tunnel_flag;
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uint16_t tunnel_inner_src_port_mask;
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uint16_t tunnel_inner_dst_port_mask;
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uint16_t dst_ipv6_mask;
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};
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/* Flow Director attribute */
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struct hinic_atr_input {
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uint32_t dst_ip;
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uint32_t src_ip;
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uint16_t src_port;
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uint16_t dst_port;
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uint16_t proto;
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uint16_t tunnel_flag;
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uint16_t tunnel_inner_src_port;
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uint16_t tunnel_inner_dst_port;
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uint8_t dst_ipv6[16];
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};
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enum hinic_fdir_mode {
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HINIC_FDIR_MODE_NORMAL = 0,
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HINIC_FDIR_MODE_TCAM = 1,
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};
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#define HINIC_PF_MAX_TCAM_FILTERS 1024
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#define HINIC_VF_MAX_TCAM_FILTERS 128
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#define HINIC_SUPPORT_PF_MAX_NUM 4
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#define HINIC_TOTAL_PF_MAX_NUM 16
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#define HINIC_SUPPORT_VF_MAX_NUM 32
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#define HINIC_TCAM_BLOCK_TYPE_PF 0 /* 1024 tcam index of a block */
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#define HINIC_TCAM_BLOCK_TYPE_VF 1 /* 128 tcam index of a block */
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#define HINIC_PKT_VF_TCAM_INDEX_START(block_index) \
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(HINIC_PF_MAX_TCAM_FILTERS * HINIC_SUPPORT_PF_MAX_NUM + \
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HINIC_VF_MAX_TCAM_FILTERS * (block_index))
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TAILQ_HEAD(hinic_tcam_filter_list, hinic_tcam_filter);
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struct hinic_tcam_info {
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struct hinic_tcam_filter_list tcam_list;
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u8 tcam_index_array[HINIC_PF_MAX_TCAM_FILTERS];
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u16 tcam_block_index;
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u16 tcam_rule_nums;
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};
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struct tag_tcam_key_mem {
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#if (RTE_BYTE_ORDER == RTE_BIG_ENDIAN)
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u32 rsvd0:16;
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u32 function_id:16;
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u32 protocol:8;
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/*
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* tunnel packet, mask must be 0xff, spec value is 1;
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* normal packet, mask must be 0, spec value is 0;
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* if tunnal packet, ucode use
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* sip/dip/protocol/src_port/dst_dport from inner packet
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*/
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u32 tunnel_flag:8;
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u32 sip_h:16;
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u32 sip_l:16;
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u32 dip_h:16;
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u32 dip_l:16;
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u32 src_port:16;
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u32 dst_port:16;
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/*
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* tunnel packet and normal packet,
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* ext_dip mask must be 0xffffffff
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*/
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u32 ext_dip_h:16;
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u32 ext_dip_l:16;
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u32 rsvd2:16;
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#else
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u32 function_id:16;
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u32 rsvd0:16;
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u32 sip_h:16;
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u32 tunnel_flag:8;
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u32 protocol:8;
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u32 dip_h:16;
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u32 sip_l:16;
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u32 src_port:16;
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u32 dip_l:16;
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u32 ext_dip_h:16;
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u32 dst_port:16;
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u32 rsvd2:16;
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u32 ext_dip_l:16;
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#endif
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};
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struct tag_tcam_key_ipv6_mem {
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#if (RTE_BYTE_ORDER == RTE_BIG_ENDIAN)
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u32 rsvd0:16;
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u32 ipv6_flag:1;
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u32 protocol:7;
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u32 function_id:8;
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u32 dst_port:16;
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u32 ipv6_key0:16;
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u32 ipv6_key1:16;
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u32 ipv6_key2:16;
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u32 ipv6_key3:16;
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u32 ipv6_key4:16;
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u32 ipv6_key5:16;
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u32 ipv6_key6:16;
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u32 ipv6_key7:16;
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u32 rsvd2:16;
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#else
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u32 function_id:8;
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u32 protocol:7;
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u32 ipv6_flag:1;
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u32 rsvd0:16;
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u32 ipv6_key0:16;
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u32 dst_port:16;
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u32 ipv6_key2:16;
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u32 ipv6_key1:16;
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u32 ipv6_key4:16;
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u32 ipv6_key3:16;
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u32 ipv6_key6:16;
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u32 ipv6_key5:16;
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u32 rsvd2:16;
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u32 ipv6_key7:16;
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#endif
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};
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struct tag_tcam_key {
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union {
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struct tag_tcam_key_mem key_info;
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struct tag_tcam_key_ipv6_mem key_info_ipv6;
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};
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union {
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struct tag_tcam_key_mem key_mask;
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struct tag_tcam_key_ipv6_mem key_mask_ipv6;
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};
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};
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struct hinic_fdir_rule {
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struct hinic_hw_fdir_mask mask;
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struct hinic_atr_input hinic_fdir; /* key of fdir filter */
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uint8_t queue; /* queue assigned when matched */
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enum hinic_fdir_mode mode; /* fdir type */
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u16 tcam_index;
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};
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/* ntuple filter list structure */
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struct hinic_ntuple_filter_ele {
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TAILQ_ENTRY(hinic_ntuple_filter_ele) entries;
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struct rte_eth_ntuple_filter filter_info;
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};
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/* ethertype filter list structure */
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struct hinic_ethertype_filter_ele {
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TAILQ_ENTRY(hinic_ethertype_filter_ele) entries;
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struct rte_eth_ethertype_filter filter_info;
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};
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/* fdir filter list structure */
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struct hinic_fdir_rule_ele {
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TAILQ_ENTRY(hinic_fdir_rule_ele) entries;
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struct hinic_fdir_rule filter_info;
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};
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struct hinic_tcam_filter {
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TAILQ_ENTRY(hinic_tcam_filter) entries;
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uint16_t index; /* tcam index */
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struct tag_tcam_key tcam_key;
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uint16_t queue; /* rx queue assigned to */
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};
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struct rte_flow {
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enum rte_filter_type filter_type;
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void *rule;
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};
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/* hinic_flow memory list structure */
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struct hinic_flow_mem {
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TAILQ_ENTRY(hinic_flow_mem) entries;
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struct rte_flow *flow;
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};
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TAILQ_HEAD(hinic_ntuple_filter_list, hinic_ntuple_filter_ele);
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TAILQ_HEAD(hinic_ethertype_filter_list, hinic_ethertype_filter_ele);
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TAILQ_HEAD(hinic_fdir_rule_filter_list, hinic_fdir_rule_ele);
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TAILQ_HEAD(hinic_flow_mem_list, hinic_flow_mem);
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extern const struct rte_flow_ops hinic_flow_ops;
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/* hinic nic_device */
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struct hinic_nic_dev {
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/* hardware device */
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struct hinic_hwdev *hwdev;
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struct hinic_txq **txqs;
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struct hinic_rxq **rxqs;
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struct rte_mempool *cpy_mpool;
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u16 num_qps;
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u16 num_sq;
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u16 num_rq;
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u16 mtu_size;
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u8 rss_tmpl_idx;
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u8 rss_indir_flag;
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u8 num_rss;
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u8 rx_queue_list[HINIC_MAX_RX_QUEUES];
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bool pause_set;
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struct nic_pause_config nic_pause;
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u32 vfta[HINIC_VFTA_SIZE]; /* VLAN bitmap */
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struct rte_ether_addr default_addr;
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struct rte_ether_addr *mc_list;
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/* info */
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unsigned int flags;
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struct nic_service_cap nic_cap;
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u32 rx_mode_status; /* promisc or allmulticast */
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pthread_mutex_t rx_mode_mutex;
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u32 dev_status;
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char proc_dev_name[HINIC_DEV_NAME_LEN];
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/* PF0->COS4, PF1->COS5, PF2->COS6, PF3->COS7,
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* vf: the same with associate pf
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*/
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u32 default_cos;
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u32 rx_csum_en;
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struct hinic_filter_info filter;
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struct hinic_tcam_info tcam;
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struct hinic_ntuple_filter_list filter_ntuple_list;
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struct hinic_ethertype_filter_list filter_ethertype_list;
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struct hinic_fdir_rule_filter_list filter_fdir_rule_list;
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struct hinic_flow_mem_list hinic_flow_list;
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};
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void hinic_free_fdir_filter(struct hinic_nic_dev *nic_dev);
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void hinic_destroy_fdir_filter(struct rte_eth_dev *dev);
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#endif /* _HINIC_PMD_ETHDEV_H_ */
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