numam-dpdk/config/common_base
Ilya Maximets 1b72605d24 mem: balanced allocation of hugepages
Currently EAL allocates hugepages one by one not paying attention
from which NUMA node allocation was done.

Such behaviour leads to allocation failure if number of available
hugepages for application limited by cgroups or hugetlbfs and
memory requested not only from the first socket.

Example:
	# 90 x 1GB hugepages availavle in a system

	cgcreate -g hugetlb:/test
	# Limit to 32GB of hugepages
	cgset -r hugetlb.1GB.limit_in_bytes=34359738368 test
	# Request 4GB from each of 2 sockets
	cgexec -g hugetlb:test testpmd --socket-mem=4096,4096 ...

	EAL: SIGBUS: Cannot mmap more hugepages of size 1024 MB
	EAL: 32 not 90 hugepages of size 1024 MB allocated
	EAL: Not enough memory available on socket 1!
	     Requested: 4096MB, available: 0MB
	PANIC in rte_eal_init():
	Cannot init memory

	This happens beacause all allocated pages are
	on socket 0.

Fix this issue by setting mempolicy MPOL_PREFERRED for each hugepage
to one of requested nodes using following schema:

	1) Allocate essential hugepages:
		1.1) Allocate as many hugepages from numa N to
		     only fit requested memory for this numa.
		1.2) repeat 1.1 for all numa nodes.
	2) Try to map all remaining free hugepages in a round-robin
	   fashion.
	3) Sort pages and choose the most suitable.

In this case all essential memory will be allocated and all remaining
pages will be fairly distributed between all requested nodes.

New config option RTE_EAL_NUMA_AWARE_HUGEPAGES introduced and
enabled by default for linuxapp except armv7 and dpaa2.
Enabling of this option adds libnuma as a dependency for EAL.

Fixes: 77988fc08d ("mem: fix allocating all free hugepages")

Signed-off-by: Ilya Maximets <i.maximets@samsung.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Tested-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-06-30 17:54:32 +02:00

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# BSD LICENSE
#
# Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# * Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# * Neither the name of Intel Corporation nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# define executive environment
# RTE_EXEC_ENV values are the directories in mk/exec-env/
#
CONFIG_RTE_EXEC_ENV=
#
# define the architecture we compile for.
# RTE_ARCH values are the directories in mk/arch/
#
CONFIG_RTE_ARCH=
#
# machine can define specific variables or action for a specific board
# RTE_MACHINE values are the directories in mk/machine/
#
CONFIG_RTE_MACHINE=
#
# The compiler we use.
# RTE_TOOLCHAIN values are the directories in mk/toolchain/
#
CONFIG_RTE_TOOLCHAIN=
#
# Use intrinsics or assembly code for key routines
#
CONFIG_RTE_FORCE_INTRINSICS=n
#
# Machine forces strict alignment constraints.
#
CONFIG_RTE_ARCH_STRICT_ALIGN=n
#
# Compile to share library
#
CONFIG_RTE_BUILD_SHARED_LIB=n
#
# Use newest code breaking previous ABI
#
CONFIG_RTE_NEXT_ABI=y
#
# Major ABI to overwrite library specific LIBABIVER
#
CONFIG_RTE_MAJOR_ABI=
#
# Machine's cache line size
#
CONFIG_RTE_CACHE_LINE_SIZE=64
#
# Compile Environment Abstraction Layer
#
CONFIG_RTE_LIBRTE_EAL=y
CONFIG_RTE_MAX_LCORE=128
CONFIG_RTE_MAX_NUMA_NODES=8
CONFIG_RTE_MAX_MEMSEG=256
CONFIG_RTE_MAX_MEMZONE=2560
CONFIG_RTE_MAX_TAILQ=32
CONFIG_RTE_LOG_LEVEL=RTE_LOG_INFO
CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO
CONFIG_RTE_LOG_HISTORY=256
CONFIG_RTE_BACKTRACE=y
CONFIG_RTE_LIBEAL_USE_HPET=n
CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n
CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_EAL_VFIO=n
CONFIG_RTE_MALLOC_DEBUG=n
CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
#
# Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing.
# AVX512 is marked as experimental for now, will enable it after enough
# field test and possible optimization.
#
CONFIG_RTE_ENABLE_AVX=y
CONFIG_RTE_ENABLE_AVX512=n
# Default driver path (or "" to disable)
CONFIG_RTE_EAL_PMD_PATH=""
#
# Compile Environment Abstraction Layer to support Vmware TSC map
#
CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y
#
# Compile the argument parser library
#
CONFIG_RTE_LIBRTE_KVARGS=y
#
# Compile generic ethernet library
#
CONFIG_RTE_LIBRTE_ETHER=y
CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n
CONFIG_RTE_MAX_ETHPORTS=32
CONFIG_RTE_MAX_QUEUES_PER_PORT=1024
CONFIG_RTE_LIBRTE_IEEE1588=n
CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
#
# Turn off Tx preparation stage
#
# Warning: rte_eth_tx_prepare() can be safely disabled only if using a
# driver which do not implement any Tx preparation.
#
CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
#
# Compile burst-oriented Amazon ENA PMD driver
#
CONFIG_RTE_LIBRTE_ENA_PMD=y
CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_ENA_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
#
# Compile burst-oriented IGB & EM PMD drivers
#
CONFIG_RTE_LIBRTE_EM_PMD=y
CONFIG_RTE_LIBRTE_IGB_PMD=y
CONFIG_RTE_LIBRTE_E1000_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_E1000_DEBUG_RX=n
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_E1000_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
#
# Compile burst-oriented IXGBE PMD driver
#
CONFIG_RTE_LIBRTE_IXGBE_PMD=y
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_RX=n
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n
CONFIG_RTE_IXGBE_INC_VECTOR=y
CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n
#
# Compile burst-oriented I40E PMD driver
#
CONFIG_RTE_LIBRTE_I40E_PMD=y
CONFIG_RTE_LIBRTE_I40E_DEBUG_RX=n
CONFIG_RTE_LIBRTE_I40E_DEBUG_TX=n
CONFIG_RTE_LIBRTE_I40E_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y
CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y
CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF=4
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4
# interval up to 8160 us, aligned to 2 (or default value)
CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL=-1
#
# Compile burst-oriented FM10K PMD
#
CONFIG_RTE_LIBRTE_FM10K_PMD=y
CONFIG_RTE_LIBRTE_FM10K_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_FM10K_DEBUG_RX=n
CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX=n
CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_FM10K_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE=y
CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y
#
# Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
#
CONFIG_RTE_LIBRTE_MLX4_PMD=n
CONFIG_RTE_LIBRTE_MLX4_DEBUG=n
CONFIG_RTE_LIBRTE_MLX4_SGE_WR_N=4
CONFIG_RTE_LIBRTE_MLX4_MAX_INLINE=0
CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8
CONFIG_RTE_LIBRTE_MLX4_SOFT_COUNTERS=1
#
# Compile burst-oriented Mellanox ConnectX-4 & ConnectX-5 (MLX5) PMD
#
CONFIG_RTE_LIBRTE_MLX5_PMD=n
CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE=8
#
# Compile burst-oriented Broadcom PMD driver
#
CONFIG_RTE_LIBRTE_BNX2X_PMD=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
#
# Compile burst-oriented Chelsio Terminator (CXGBE) PMD
#
CONFIG_RTE_LIBRTE_CXGBE_PMD=y
CONFIG_RTE_LIBRTE_CXGBE_DEBUG=n
CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG=n
CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX=n
CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX=n
CONFIG_RTE_LIBRTE_CXGBE_TPUT=y
#
# Compile burst-oriented Cisco ENIC PMD driver
#
CONFIG_RTE_LIBRTE_ENIC_PMD=y
CONFIG_RTE_LIBRTE_ENIC_DEBUG=n
CONFIG_RTE_LIBRTE_ENIC_DEBUG_FLOW=n
#
# Compile burst-oriented Netronome NFP PMD driver
#
CONFIG_RTE_LIBRTE_NFP_PMD=n
CONFIG_RTE_LIBRTE_NFP_DEBUG=n
#
# Compile burst-oriented Broadcom BNXT PMD driver
#
CONFIG_RTE_LIBRTE_BNXT_PMD=y
#
# Compile burst-oriented Solarflare libefx-based PMD
#
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=y
CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n
#
# Compile software PMD backed by SZEDATA2 device
#
CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
#
# Defines firmware type address space.
# See documentation for supported values.
# Other values raise compile time error.
CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0
#
# Compile burst-oriented Cavium Thunderx NICVF PMD driver
#
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=y
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_MBOX=n
#
# Compile burst-oriented Cavium LiquidIO PMD driver
#
CONFIG_RTE_LIBRTE_LIO_PMD=y
CONFIG_RTE_LIBRTE_LIO_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_RX=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_TX=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_MBOX=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
#
# Compile NXP DPAA2 FSL-MC Bus
#
CONFIG_RTE_LIBRTE_FSLMC_BUS=n
#
# Compile Support Libraries for NXP DPAA2
#
CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n
CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
#
# Compile burst-oriented NXP DPAA2 PMD driver
#
CONFIG_RTE_LIBRTE_DPAA2_PMD=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n
#
# Compile burst-oriented VIRTIO PMD driver
#
CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_RX=n
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_TX=n
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DUMP=n
#
# Compile virtio device emulation inside virtio PMD driver
#
CONFIG_RTE_VIRTIO_USER=n
#
# Compile burst-oriented VMXNET3 PMD driver
#
CONFIG_RTE_LIBRTE_VMXNET3_PMD=y
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_RX=n
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX=n
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_DRIVER=n
#
# Compile example software rings based PMD
#
CONFIG_RTE_LIBRTE_PMD_RING=y
CONFIG_RTE_PMD_RING_MAX_RX_RINGS=16
CONFIG_RTE_PMD_RING_MAX_TX_RINGS=16
#
# Compile software PMD backed by PCAP files
#
CONFIG_RTE_LIBRTE_PMD_PCAP=n
#
# Compile link bonding PMD library
#
CONFIG_RTE_LIBRTE_PMD_BOND=y
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n
# QLogic 10G/25G/40G/50G/100G PMD
#
CONFIG_RTE_LIBRTE_QEDE_PMD=y
CONFIG_RTE_LIBRTE_QEDE_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_QEDE_DEBUG_INFO=n
CONFIG_RTE_LIBRTE_QEDE_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_QEDE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_QEDE_DEBUG_RX=n
#Provides abs path/name of the firmware file.
#Empty string denotes driver will use default firmware
CONFIG_RTE_LIBRTE_QEDE_FW=""
#
# Compile software PMD backed by AF_PACKET sockets (Linux only)
#
CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n
#
# Compile ARK PMD
#
CONFIG_RTE_LIBRTE_ARK_PMD=y
CONFIG_RTE_LIBRTE_ARK_PAD_TX=y
CONFIG_RTE_LIBRTE_ARK_DEBUG_RX=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
#
# Compile WRS accelerated virtual port (AVP) guest PMD driver
#
CONFIG_RTE_LIBRTE_AVP_PMD=n
CONFIG_RTE_LIBRTE_AVP_DEBUG_RX=n
CONFIG_RTE_LIBRTE_AVP_DEBUG_TX=n
CONFIG_RTE_LIBRTE_AVP_DEBUG_DRIVER=y
CONFIG_RTE_LIBRTE_AVP_DEBUG_BUFFERS=n
#
# Compile the TAP PMD
# It is enabled by default for Linux only.
#
CONFIG_RTE_LIBRTE_PMD_TAP=n
#
# Compile Xen PMD
#
CONFIG_RTE_LIBRTE_PMD_XENVIRT=n
#
# Compile null PMD
#
CONFIG_RTE_LIBRTE_PMD_NULL=y
#
# Do prefetch of packet data within PMD driver receive function
#
CONFIG_RTE_PMD_PACKET_PREFETCH=y
#
# Compile generic crypto device library
#
CONFIG_RTE_LIBRTE_CRYPTODEV=y
CONFIG_RTE_LIBRTE_CRYPTODEV_DEBUG=n
CONFIG_RTE_CRYPTO_MAX_DEVS=64
CONFIG_RTE_CRYPTODEV_NAME_LEN=64
#
# Compile PMD for ARMv8 Crypto device
#
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
#
# Compile NXP DPAA2 crypto sec driver for CAAM HW
#
CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n
CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n
#
# Compile PMD for QuickAssist based devices
#
CONFIG_RTE_LIBRTE_PMD_QAT=n
CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_TX=n
CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_RX=n
CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_DRIVER=n
#
# Number of sessions to create in the session memory pool
# on a single QuickAssist device.
#
CONFIG_RTE_QAT_PMD_MAX_NB_SESSIONS=2048
#
# Compile PMD for AESNI backed device
#
CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n
CONFIG_RTE_LIBRTE_PMD_AESNI_MB_DEBUG=n
#
# Compile PMD for Software backed device
#
CONFIG_RTE_LIBRTE_PMD_OPENSSL=n
CONFIG_RTE_LIBRTE_PMD_OPENSSL_DEBUG=n
#
# Compile PMD for AESNI GCM device
#
CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=n
CONFIG_RTE_LIBRTE_PMD_AESNI_GCM_DEBUG=n
#
# Compile PMD for SNOW 3G device
#
CONFIG_RTE_LIBRTE_PMD_SNOW3G=n
CONFIG_RTE_LIBRTE_PMD_SNOW3G_DEBUG=n
#
# Compile PMD for KASUMI device
#
CONFIG_RTE_LIBRTE_PMD_KASUMI=n
CONFIG_RTE_LIBRTE_PMD_KASUMI_DEBUG=n
#
# Compile PMD for ZUC device
#
CONFIG_RTE_LIBRTE_PMD_ZUC=n
CONFIG_RTE_LIBRTE_PMD_ZUC_DEBUG=n
#
# Compile PMD for Crypto Scheduler device
#
CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=y
CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n
#
# Compile PMD for NULL Crypto device
#
CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y
#
# Compile generic event device library
#
CONFIG_RTE_LIBRTE_EVENTDEV=y
CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n
CONFIG_RTE_EVENT_MAX_DEVS=16
CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
#
# Compile PMD for skeleton event device
#
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=y
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
#
# Compile PMD for software event device
#
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV_DEBUG=n
#
# Compile PMD for octeontx sso event device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG=n
#
# Compile librte_ring
#
CONFIG_RTE_LIBRTE_RING=y
#
# Compile librte_mempool
#
CONFIG_RTE_LIBRTE_MEMPOOL=y
CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE=512
CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n
#
# Compile Mempool drivers
#
CONFIG_RTE_DRIVER_MEMPOOL_RING=y
CONFIG_RTE_DRIVER_MEMPOOL_STACK=y
#
# Compile librte_mbuf
#
CONFIG_RTE_LIBRTE_MBUF=y
CONFIG_RTE_LIBRTE_MBUF_DEBUG=n
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="ring_mp_mc"
CONFIG_RTE_MBUF_REFCNT_ATOMIC=y
CONFIG_RTE_PKTMBUF_HEADROOM=128
#
# Compile librte_timer
#
CONFIG_RTE_LIBRTE_TIMER=y
CONFIG_RTE_LIBRTE_TIMER_DEBUG=n
#
# Compile librte_cfgfile
#
CONFIG_RTE_LIBRTE_CFGFILE=y
#
# Compile librte_cmdline
#
CONFIG_RTE_LIBRTE_CMDLINE=y
CONFIG_RTE_LIBRTE_CMDLINE_DEBUG=n
#
# Compile librte_hash
#
CONFIG_RTE_LIBRTE_HASH=y
CONFIG_RTE_LIBRTE_HASH_DEBUG=n
#
# Compile librte_efd
#
CONFIG_RTE_LIBRTE_EFD=y
#
# Compile librte_jobstats
#
CONFIG_RTE_LIBRTE_JOBSTATS=y
#
# Compile the device metrics library
#
CONFIG_RTE_LIBRTE_METRICS=y
#
# Compile the bitrate statistics library
#
CONFIG_RTE_LIBRTE_BITRATE=y
#
# Compile the latency statistics library
#
CONFIG_RTE_LIBRTE_LATENCY_STATS=y
#
# Compile librte_lpm
#
CONFIG_RTE_LIBRTE_LPM=y
CONFIG_RTE_LIBRTE_LPM_DEBUG=n
#
# Compile librte_acl
#
CONFIG_RTE_LIBRTE_ACL=y
CONFIG_RTE_LIBRTE_ACL_DEBUG=n
#
# Compile librte_power
#
CONFIG_RTE_LIBRTE_POWER=n
CONFIG_RTE_LIBRTE_POWER_DEBUG=n
CONFIG_RTE_MAX_LCORE_FREQS=64
#
# Compile librte_net
#
CONFIG_RTE_LIBRTE_NET=y
#
# Compile librte_ip_frag
#
CONFIG_RTE_LIBRTE_IP_FRAG=y
CONFIG_RTE_LIBRTE_IP_FRAG_DEBUG=n
CONFIG_RTE_LIBRTE_IP_FRAG_MAX_FRAG=4
CONFIG_RTE_LIBRTE_IP_FRAG_TBL_STAT=n
#
# Compile librte_meter
#
CONFIG_RTE_LIBRTE_METER=y
#
# Compile librte_sched
#
CONFIG_RTE_LIBRTE_SCHED=y
CONFIG_RTE_SCHED_DEBUG=n
CONFIG_RTE_SCHED_RED=n
CONFIG_RTE_SCHED_COLLECT_STATS=n
CONFIG_RTE_SCHED_SUBPORT_TC_OV=n
CONFIG_RTE_SCHED_PORT_N_GRINDERS=8
CONFIG_RTE_SCHED_VECTOR=n
#
# Compile the distributor library
#
CONFIG_RTE_LIBRTE_DISTRIBUTOR=y
#
# Compile the reorder library
#
CONFIG_RTE_LIBRTE_REORDER=y
#
# Compile librte_port
#
CONFIG_RTE_LIBRTE_PORT=y
CONFIG_RTE_PORT_STATS_COLLECT=n
CONFIG_RTE_PORT_PCAP=n
#
# Compile librte_table
#
CONFIG_RTE_LIBRTE_TABLE=y
CONFIG_RTE_TABLE_STATS_COLLECT=n
#
# Compile librte_pipeline
#
CONFIG_RTE_LIBRTE_PIPELINE=y
CONFIG_RTE_PIPELINE_STATS_COLLECT=n
#
# Compile librte_kni
#
CONFIG_RTE_LIBRTE_KNI=n
CONFIG_RTE_LIBRTE_PMD_KNI=n
CONFIG_RTE_KNI_KMOD=n
CONFIG_RTE_KNI_KMOD_ETHTOOL=n
CONFIG_RTE_KNI_PREEMPT_DEFAULT=y
#
# Compile the pdump library
#
CONFIG_RTE_LIBRTE_PDUMP=y
#
# Compile vhost user library
#
CONFIG_RTE_LIBRTE_VHOST=n
CONFIG_RTE_LIBRTE_VHOST_NUMA=n
CONFIG_RTE_LIBRTE_VHOST_DEBUG=n
#
# Compile vhost PMD
# To compile, CONFIG_RTE_LIBRTE_VHOST should be enabled.
#
CONFIG_RTE_LIBRTE_PMD_VHOST=n
#
#Compile Xen domain0 support
#
CONFIG_RTE_LIBRTE_XEN_DOM0=n
#
# Compile the test application
#
CONFIG_RTE_APP_TEST=y
CONFIG_RTE_APP_TEST_RESOURCE_TAR=n
#
# Compile the PMD test application
#
CONFIG_RTE_TEST_PMD=y
CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n
CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n
#
# Compile the crypto performance application
#
CONFIG_RTE_APP_CRYPTO_PERF=y