088e17210a
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andrew Lee <alee@solarflare.com> Reviewed-by: Robert Stonehouse <rstonehouse@solarflare.com>
1043 lines
25 KiB
C
1043 lines
25 KiB
C
/*-
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* Copyright (c) 2016 Solarflare Communications Inc.
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* All rights reserved.
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*
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* This software was jointly developed between OKTET Labs (under contract
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* for Solarflare) and Solarflare Communications, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <rte_mempool.h>
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#include "efx.h"
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#include "sfc.h"
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#include "sfc_debug.h"
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#include "sfc_log.h"
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#include "sfc_ev.h"
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#include "sfc_rx.h"
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#include "sfc_tweak.h"
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/*
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* Maximum number of Rx queue flush attempt in the case of failure or
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* flush timeout
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*/
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#define SFC_RX_QFLUSH_ATTEMPTS (3)
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/*
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* Time to wait between event queue polling attempts when waiting for Rx
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* queue flush done or failed events.
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*/
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#define SFC_RX_QFLUSH_POLL_WAIT_MS (1)
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/*
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* Maximum number of event queue polling attempts when waiting for Rx queue
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* flush done or failed events. It defines Rx queue flush attempt timeout
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* together with SFC_RX_QFLUSH_POLL_WAIT_MS.
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*/
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#define SFC_RX_QFLUSH_POLL_ATTEMPTS (2000)
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void
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sfc_rx_qflush_done(struct sfc_rxq *rxq)
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{
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rxq->state |= SFC_RXQ_FLUSHED;
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rxq->state &= ~SFC_RXQ_FLUSHING;
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}
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void
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sfc_rx_qflush_failed(struct sfc_rxq *rxq)
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{
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rxq->state |= SFC_RXQ_FLUSH_FAILED;
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rxq->state &= ~SFC_RXQ_FLUSHING;
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}
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static void
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sfc_rx_qrefill(struct sfc_rxq *rxq)
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{
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unsigned int free_space;
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unsigned int bulks;
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void *objs[SFC_RX_REFILL_BULK];
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efsys_dma_addr_t addr[RTE_DIM(objs)];
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unsigned int added = rxq->added;
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unsigned int id;
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unsigned int i;
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struct sfc_rx_sw_desc *rxd;
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struct rte_mbuf *m;
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uint8_t port_id = rxq->port_id;
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free_space = EFX_RXQ_LIMIT(rxq->ptr_mask + 1) -
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(added - rxq->completed);
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if (free_space < rxq->refill_threshold)
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return;
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bulks = free_space / RTE_DIM(objs);
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id = added & rxq->ptr_mask;
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while (bulks-- > 0) {
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if (rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
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RTE_DIM(objs)) < 0) {
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/*
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* It is hardly a safe way to increment counter
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* from different contexts, but all PMDs do it.
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*/
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rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
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RTE_DIM(objs);
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break;
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}
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for (i = 0; i < RTE_DIM(objs);
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++i, id = (id + 1) & rxq->ptr_mask) {
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m = objs[i];
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rxd = &rxq->sw_desc[id];
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rxd->mbuf = m;
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rte_mbuf_refcnt_set(m, 1);
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m->data_off = RTE_PKTMBUF_HEADROOM;
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m->next = NULL;
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m->nb_segs = 1;
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m->port = port_id;
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addr[i] = rte_pktmbuf_mtophys(m);
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}
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efx_rx_qpost(rxq->common, addr, rxq->buf_size,
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RTE_DIM(objs), rxq->completed, added);
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added += RTE_DIM(objs);
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}
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/* Push doorbell if something is posted */
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if (rxq->added != added) {
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rxq->added = added;
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efx_rx_qpush(rxq->common, added, &rxq->pushed);
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}
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}
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static uint64_t
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sfc_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
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{
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uint64_t mbuf_flags = 0;
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switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
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case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
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mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
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break;
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case EFX_PKT_IPV4:
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mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
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break;
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default:
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RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
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SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
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PKT_RX_IP_CKSUM_UNKNOWN);
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break;
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}
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switch ((desc_flags &
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(EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
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case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
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case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
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mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
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break;
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case EFX_PKT_TCP:
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case EFX_PKT_UDP:
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mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
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break;
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default:
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RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
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SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
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PKT_RX_L4_CKSUM_UNKNOWN);
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break;
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}
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return mbuf_flags;
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}
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static uint32_t
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sfc_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
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{
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return RTE_PTYPE_L2_ETHER |
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((desc_flags & EFX_PKT_IPV4) ?
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RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
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((desc_flags & EFX_PKT_IPV6) ?
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RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
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((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
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((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
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}
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static void
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sfc_rx_set_rss_hash(struct sfc_rxq *rxq, unsigned int flags, struct rte_mbuf *m)
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{
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#if EFSYS_OPT_RX_SCALE
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uint8_t *mbuf_data;
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if ((rxq->flags & SFC_RXQ_RSS_HASH) == 0)
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return;
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mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
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if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
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m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
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EFX_RX_HASHALG_TOEPLITZ,
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mbuf_data);
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m->ol_flags |= PKT_RX_RSS_HASH;
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}
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#endif
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}
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uint16_t
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sfc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
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{
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struct sfc_rxq *rxq = rx_queue;
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unsigned int completed;
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unsigned int prefix_size = rxq->prefix_size;
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unsigned int done_pkts = 0;
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boolean_t discard_next = B_FALSE;
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struct rte_mbuf *scatter_pkt = NULL;
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if (unlikely((rxq->state & SFC_RXQ_RUNNING) == 0))
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return 0;
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sfc_ev_qpoll(rxq->evq);
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completed = rxq->completed;
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while (completed != rxq->pending && done_pkts < nb_pkts) {
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unsigned int id;
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struct sfc_rx_sw_desc *rxd;
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struct rte_mbuf *m;
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unsigned int seg_len;
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unsigned int desc_flags;
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id = completed++ & rxq->ptr_mask;
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rxd = &rxq->sw_desc[id];
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m = rxd->mbuf;
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desc_flags = rxd->flags;
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if (discard_next)
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goto discard;
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if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
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goto discard;
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if (desc_flags & EFX_PKT_PREFIX_LEN) {
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uint16_t tmp_size;
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int rc __rte_unused;
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rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
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rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
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SFC_ASSERT(rc == 0);
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seg_len = tmp_size;
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} else {
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seg_len = rxd->size - prefix_size;
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}
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rte_pktmbuf_data_len(m) = seg_len;
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rte_pktmbuf_pkt_len(m) = seg_len;
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if (scatter_pkt != NULL) {
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if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
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rte_mempool_put(rxq->refill_mb_pool,
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scatter_pkt);
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goto discard;
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}
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/* The packet to deliver */
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m = scatter_pkt;
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}
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if (desc_flags & EFX_PKT_CONT) {
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/* The packet is scattered, more fragments to come */
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scatter_pkt = m;
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/* Futher fragments have no prefix */
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prefix_size = 0;
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continue;
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}
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/* Scattered packet is done */
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scatter_pkt = NULL;
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/* The first fragment of the packet has prefix */
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prefix_size = rxq->prefix_size;
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m->ol_flags = sfc_rx_desc_flags_to_offload_flags(desc_flags);
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m->packet_type = sfc_rx_desc_flags_to_packet_type(desc_flags);
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/*
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* Extract RSS hash from the packet prefix and
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* set the corresponding field (if needed and possible)
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*/
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sfc_rx_set_rss_hash(rxq, desc_flags, m);
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m->data_off += prefix_size;
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*rx_pkts++ = m;
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done_pkts++;
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continue;
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discard:
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discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
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rte_mempool_put(rxq->refill_mb_pool, m);
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rxd->mbuf = NULL;
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}
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/* pending is only moved when entire packet is received */
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SFC_ASSERT(scatter_pkt == NULL);
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rxq->completed = completed;
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sfc_rx_qrefill(rxq);
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return done_pkts;
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}
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unsigned int
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sfc_rx_qdesc_npending(struct sfc_adapter *sa, unsigned int sw_index)
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{
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struct sfc_rxq *rxq;
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SFC_ASSERT(sw_index < sa->rxq_count);
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rxq = sa->rxq_info[sw_index].rxq;
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if (rxq == NULL || (rxq->state & SFC_RXQ_RUNNING) == 0)
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return 0;
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sfc_ev_qpoll(rxq->evq);
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return rxq->pending - rxq->completed;
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}
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int
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sfc_rx_qdesc_done(struct sfc_rxq *rxq, unsigned int offset)
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{
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if ((rxq->state & SFC_RXQ_RUNNING) == 0)
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return 0;
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sfc_ev_qpoll(rxq->evq);
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return offset < (rxq->pending - rxq->completed);
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}
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static void
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sfc_rx_qpurge(struct sfc_rxq *rxq)
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{
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unsigned int i;
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struct sfc_rx_sw_desc *rxd;
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for (i = rxq->completed; i != rxq->added; ++i) {
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rxd = &rxq->sw_desc[i & rxq->ptr_mask];
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rte_mempool_put(rxq->refill_mb_pool, rxd->mbuf);
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rxd->mbuf = NULL;
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}
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}
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static void
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sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
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{
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struct sfc_rxq *rxq;
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unsigned int retry_count;
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unsigned int wait_count;
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rxq = sa->rxq_info[sw_index].rxq;
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SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
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/*
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* Retry Rx queue flushing in the case of flush failed or
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* timeout. In the worst case it can delay for 6 seconds.
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*/
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for (retry_count = 0;
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((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
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(retry_count < SFC_RX_QFLUSH_ATTEMPTS);
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++retry_count) {
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if (efx_rx_qflush(rxq->common) != 0) {
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rxq->state |= SFC_RXQ_FLUSH_FAILED;
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break;
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}
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rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
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rxq->state |= SFC_RXQ_FLUSHING;
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/*
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* Wait for Rx queue flush done or failed event at least
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* SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
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* than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
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* by SFC_RX_QFLUSH_POLL_ATTEMPTS).
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*/
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wait_count = 0;
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do {
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rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
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sfc_ev_qpoll(rxq->evq);
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} while ((rxq->state & SFC_RXQ_FLUSHING) &&
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(wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
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if (rxq->state & SFC_RXQ_FLUSHING)
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sfc_err(sa, "RxQ %u flush timed out", sw_index);
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if (rxq->state & SFC_RXQ_FLUSH_FAILED)
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sfc_err(sa, "RxQ %u flush failed", sw_index);
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if (rxq->state & SFC_RXQ_FLUSHED)
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sfc_info(sa, "RxQ %u flushed", sw_index);
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}
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sfc_rx_qpurge(rxq);
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}
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int
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sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
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{
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struct sfc_rxq_info *rxq_info;
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struct sfc_rxq *rxq;
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struct sfc_evq *evq;
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int rc;
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sfc_log_init(sa, "sw_index=%u", sw_index);
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SFC_ASSERT(sw_index < sa->rxq_count);
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rxq_info = &sa->rxq_info[sw_index];
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rxq = rxq_info->rxq;
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SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
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evq = rxq->evq;
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rc = sfc_ev_qstart(sa, evq->evq_index);
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if (rc != 0)
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goto fail_ev_qstart;
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rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
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&rxq->mem, rxq_info->entries,
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0 /* not used on EF10 */, evq->common,
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&rxq->common);
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if (rc != 0)
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goto fail_rx_qcreate;
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efx_rx_qenable(rxq->common);
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rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
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rxq->state |= (SFC_RXQ_STARTED | SFC_RXQ_RUNNING);
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sfc_rx_qrefill(rxq);
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if (sw_index == 0) {
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rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common,
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(sa->rss_channels > 1) ?
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B_TRUE : B_FALSE);
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if (rc != 0)
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goto fail_mac_filter_default_rxq_set;
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}
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|
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/* It seems to be used by DPDK for debug purposes only ('rte_ether') */
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sa->eth_dev->data->rx_queue_state[sw_index] =
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RTE_ETH_QUEUE_STATE_STARTED;
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return 0;
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fail_mac_filter_default_rxq_set:
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sfc_rx_qflush(sa, sw_index);
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fail_rx_qcreate:
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sfc_ev_qstop(sa, evq->evq_index);
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fail_ev_qstart:
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return rc;
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}
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|
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void
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sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
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{
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struct sfc_rxq_info *rxq_info;
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struct sfc_rxq *rxq;
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sfc_log_init(sa, "sw_index=%u", sw_index);
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SFC_ASSERT(sw_index < sa->rxq_count);
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rxq_info = &sa->rxq_info[sw_index];
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rxq = rxq_info->rxq;
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|
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if (rxq->state == SFC_RXQ_INITIALIZED)
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return;
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SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
|
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|
|
/* It seems to be used by DPDK for debug purposes only ('rte_ether') */
|
|
sa->eth_dev->data->rx_queue_state[sw_index] =
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RTE_ETH_QUEUE_STATE_STOPPED;
|
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|
|
rxq->state &= ~SFC_RXQ_RUNNING;
|
|
|
|
if (sw_index == 0)
|
|
efx_mac_filter_default_rxq_clear(sa->nic);
|
|
|
|
sfc_rx_qflush(sa, sw_index);
|
|
|
|
rxq->state = SFC_RXQ_INITIALIZED;
|
|
|
|
efx_rx_qdestroy(rxq->common);
|
|
|
|
sfc_ev_qstop(sa, rxq->evq->evq_index);
|
|
}
|
|
|
|
static int
|
|
sfc_rx_qcheck_conf(struct sfc_adapter *sa, uint16_t nb_rx_desc,
|
|
const struct rte_eth_rxconf *rx_conf)
|
|
{
|
|
const uint16_t rx_free_thresh_max = EFX_RXQ_LIMIT(nb_rx_desc);
|
|
int rc = 0;
|
|
|
|
if (rx_conf->rx_thresh.pthresh != 0 ||
|
|
rx_conf->rx_thresh.hthresh != 0 ||
|
|
rx_conf->rx_thresh.wthresh != 0) {
|
|
sfc_err(sa,
|
|
"RxQ prefetch/host/writeback thresholds are not supported");
|
|
rc = EINVAL;
|
|
}
|
|
|
|
if (rx_conf->rx_free_thresh > rx_free_thresh_max) {
|
|
sfc_err(sa,
|
|
"RxQ free threshold too large: %u vs maximum %u",
|
|
rx_conf->rx_free_thresh, rx_free_thresh_max);
|
|
rc = EINVAL;
|
|
}
|
|
|
|
if (rx_conf->rx_drop_en == 0) {
|
|
sfc_err(sa, "RxQ drop disable is not supported");
|
|
rc = EINVAL;
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
static unsigned int
|
|
sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
|
|
{
|
|
uint32_t data_off;
|
|
uint32_t order;
|
|
|
|
/* The mbuf object itself is always cache line aligned */
|
|
order = rte_bsf32(RTE_CACHE_LINE_SIZE);
|
|
|
|
/* Data offset from mbuf object start */
|
|
data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
|
|
RTE_PKTMBUF_HEADROOM;
|
|
|
|
order = MIN(order, rte_bsf32(data_off));
|
|
|
|
return 1u << (order - 1);
|
|
}
|
|
|
|
static uint16_t
|
|
sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
|
|
{
|
|
const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
|
|
const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
|
|
const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
|
|
uint16_t buf_size;
|
|
unsigned int buf_aligned;
|
|
unsigned int start_alignment;
|
|
unsigned int end_padding_alignment;
|
|
|
|
/* Below it is assumed that both alignments are power of 2 */
|
|
SFC_ASSERT(rte_is_power_of_2(nic_align_start));
|
|
SFC_ASSERT(rte_is_power_of_2(nic_align_end));
|
|
|
|
/*
|
|
* mbuf is always cache line aligned, double-check
|
|
* that it meets rx buffer start alignment requirements.
|
|
*/
|
|
|
|
/* Start from mbuf pool data room size */
|
|
buf_size = rte_pktmbuf_data_room_size(mb_pool);
|
|
|
|
/* Remove headroom */
|
|
if (buf_size <= RTE_PKTMBUF_HEADROOM) {
|
|
sfc_err(sa,
|
|
"RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
|
|
mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
|
|
return 0;
|
|
}
|
|
buf_size -= RTE_PKTMBUF_HEADROOM;
|
|
|
|
/* Calculate guaranteed data start alignment */
|
|
buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
|
|
|
|
/* Reserve space for start alignment */
|
|
if (buf_aligned < nic_align_start) {
|
|
start_alignment = nic_align_start - buf_aligned;
|
|
if (buf_size <= start_alignment) {
|
|
sfc_err(sa,
|
|
"RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
|
|
mb_pool->name,
|
|
rte_pktmbuf_data_room_size(mb_pool),
|
|
RTE_PKTMBUF_HEADROOM, start_alignment);
|
|
return 0;
|
|
}
|
|
buf_aligned = nic_align_start;
|
|
buf_size -= start_alignment;
|
|
} else {
|
|
start_alignment = 0;
|
|
}
|
|
|
|
/* Make sure that end padding does not write beyond the buffer */
|
|
if (buf_aligned < nic_align_end) {
|
|
/*
|
|
* Estimate space which can be lost. If guarnteed buffer
|
|
* size is odd, lost space is (nic_align_end - 1). More
|
|
* accurate formula is below.
|
|
*/
|
|
end_padding_alignment = nic_align_end -
|
|
MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
|
|
if (buf_size <= end_padding_alignment) {
|
|
sfc_err(sa,
|
|
"RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
|
|
mb_pool->name,
|
|
rte_pktmbuf_data_room_size(mb_pool),
|
|
RTE_PKTMBUF_HEADROOM, start_alignment,
|
|
end_padding_alignment);
|
|
return 0;
|
|
}
|
|
buf_size -= end_padding_alignment;
|
|
} else {
|
|
/*
|
|
* Start is aligned the same or better than end,
|
|
* just align length.
|
|
*/
|
|
buf_size = P2ALIGN(buf_size, nic_align_end);
|
|
}
|
|
|
|
return buf_size;
|
|
}
|
|
|
|
int
|
|
sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
|
|
uint16_t nb_rx_desc, unsigned int socket_id,
|
|
const struct rte_eth_rxconf *rx_conf,
|
|
struct rte_mempool *mb_pool)
|
|
{
|
|
const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
|
|
int rc;
|
|
uint16_t buf_size;
|
|
struct sfc_rxq_info *rxq_info;
|
|
unsigned int evq_index;
|
|
struct sfc_evq *evq;
|
|
struct sfc_rxq *rxq;
|
|
|
|
rc = sfc_rx_qcheck_conf(sa, nb_rx_desc, rx_conf);
|
|
if (rc != 0)
|
|
goto fail_bad_conf;
|
|
|
|
buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
|
|
if (buf_size == 0) {
|
|
sfc_err(sa, "RxQ %u mbuf pool object size is too small",
|
|
sw_index);
|
|
rc = EINVAL;
|
|
goto fail_bad_conf;
|
|
}
|
|
|
|
if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
|
|
!sa->eth_dev->data->dev_conf.rxmode.enable_scatter) {
|
|
sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
|
|
"object size is too small", sw_index);
|
|
sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
|
|
"PDU size %u plus Rx prefix %u bytes",
|
|
sw_index, buf_size, (unsigned int)sa->port.pdu,
|
|
encp->enc_rx_prefix_size);
|
|
rc = EINVAL;
|
|
goto fail_bad_conf;
|
|
}
|
|
|
|
SFC_ASSERT(sw_index < sa->rxq_count);
|
|
rxq_info = &sa->rxq_info[sw_index];
|
|
|
|
SFC_ASSERT(nb_rx_desc <= rxq_info->max_entries);
|
|
rxq_info->entries = nb_rx_desc;
|
|
rxq_info->type =
|
|
sa->eth_dev->data->dev_conf.rxmode.enable_scatter ?
|
|
EFX_RXQ_TYPE_SCATTER : EFX_RXQ_TYPE_DEFAULT;
|
|
|
|
evq_index = sfc_evq_index_by_rxq_sw_index(sa, sw_index);
|
|
|
|
rc = sfc_ev_qinit(sa, evq_index, rxq_info->entries, socket_id);
|
|
if (rc != 0)
|
|
goto fail_ev_qinit;
|
|
|
|
evq = sa->evq_info[evq_index].evq;
|
|
|
|
rc = ENOMEM;
|
|
rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
|
|
socket_id);
|
|
if (rxq == NULL)
|
|
goto fail_rxq_alloc;
|
|
|
|
rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
|
|
socket_id, &rxq->mem);
|
|
if (rc != 0)
|
|
goto fail_dma_alloc;
|
|
|
|
rc = ENOMEM;
|
|
rxq->sw_desc = rte_calloc_socket("sfc-rxq-sw_desc", rxq_info->entries,
|
|
sizeof(*rxq->sw_desc),
|
|
RTE_CACHE_LINE_SIZE, socket_id);
|
|
if (rxq->sw_desc == NULL)
|
|
goto fail_desc_alloc;
|
|
|
|
evq->rxq = rxq;
|
|
rxq->evq = evq;
|
|
rxq->ptr_mask = rxq_info->entries - 1;
|
|
rxq->refill_threshold = rx_conf->rx_free_thresh;
|
|
rxq->refill_mb_pool = mb_pool;
|
|
rxq->buf_size = buf_size;
|
|
rxq->hw_index = sw_index;
|
|
rxq->port_id = sa->eth_dev->data->port_id;
|
|
|
|
/* Cache limits required on datapath in RxQ structure */
|
|
rxq->batch_max = encp->enc_rx_batch_max;
|
|
rxq->prefix_size = encp->enc_rx_prefix_size;
|
|
|
|
#if EFSYS_OPT_RX_SCALE
|
|
if (sa->hash_support == EFX_RX_HASH_AVAILABLE)
|
|
rxq->flags |= SFC_RXQ_RSS_HASH;
|
|
#endif
|
|
|
|
rxq->state = SFC_RXQ_INITIALIZED;
|
|
|
|
rxq_info->rxq = rxq;
|
|
rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
|
|
|
|
return 0;
|
|
|
|
fail_desc_alloc:
|
|
sfc_dma_free(sa, &rxq->mem);
|
|
|
|
fail_dma_alloc:
|
|
rte_free(rxq);
|
|
|
|
fail_rxq_alloc:
|
|
sfc_ev_qfini(sa, evq_index);
|
|
|
|
fail_ev_qinit:
|
|
rxq_info->entries = 0;
|
|
|
|
fail_bad_conf:
|
|
sfc_log_init(sa, "failed %d", rc);
|
|
return rc;
|
|
}
|
|
|
|
void
|
|
sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
|
|
{
|
|
struct sfc_rxq_info *rxq_info;
|
|
struct sfc_rxq *rxq;
|
|
|
|
SFC_ASSERT(sw_index < sa->rxq_count);
|
|
|
|
rxq_info = &sa->rxq_info[sw_index];
|
|
|
|
rxq = rxq_info->rxq;
|
|
SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
|
|
|
|
rxq_info->rxq = NULL;
|
|
rxq_info->entries = 0;
|
|
|
|
rte_free(rxq->sw_desc);
|
|
sfc_dma_free(sa, &rxq->mem);
|
|
rte_free(rxq);
|
|
}
|
|
|
|
#if EFSYS_OPT_RX_SCALE
|
|
efx_rx_hash_type_t
|
|
sfc_rte_to_efx_hash_type(uint64_t rss_hf)
|
|
{
|
|
efx_rx_hash_type_t efx_hash_types = 0;
|
|
|
|
if ((rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
|
|
ETH_RSS_NONFRAG_IPV4_OTHER)) != 0)
|
|
efx_hash_types |= EFX_RX_HASH_IPV4;
|
|
|
|
if ((rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) != 0)
|
|
efx_hash_types |= EFX_RX_HASH_TCPIPV4;
|
|
|
|
if ((rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
|
|
ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX)) != 0)
|
|
efx_hash_types |= EFX_RX_HASH_IPV6;
|
|
|
|
if ((rss_hf & (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX)) != 0)
|
|
efx_hash_types |= EFX_RX_HASH_TCPIPV6;
|
|
|
|
return efx_hash_types;
|
|
}
|
|
|
|
uint64_t
|
|
sfc_efx_to_rte_hash_type(efx_rx_hash_type_t efx_hash_types)
|
|
{
|
|
uint64_t rss_hf = 0;
|
|
|
|
if ((efx_hash_types & EFX_RX_HASH_IPV4) != 0)
|
|
rss_hf |= (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
|
|
ETH_RSS_NONFRAG_IPV4_OTHER);
|
|
|
|
if ((efx_hash_types & EFX_RX_HASH_TCPIPV4) != 0)
|
|
rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
|
|
|
|
if ((efx_hash_types & EFX_RX_HASH_IPV6) != 0)
|
|
rss_hf |= (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
|
|
ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX);
|
|
|
|
if ((efx_hash_types & EFX_RX_HASH_TCPIPV6) != 0)
|
|
rss_hf |= (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX);
|
|
|
|
return rss_hf;
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
sfc_rx_rss_config(struct sfc_adapter *sa)
|
|
{
|
|
int rc = 0;
|
|
|
|
#if EFSYS_OPT_RX_SCALE
|
|
if (sa->rss_channels > 1) {
|
|
rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
|
|
sa->rss_hash_types, B_TRUE);
|
|
if (rc != 0)
|
|
goto finish;
|
|
|
|
rc = efx_rx_scale_key_set(sa->nic, sa->rss_key,
|
|
sizeof(sa->rss_key));
|
|
if (rc != 0)
|
|
goto finish;
|
|
|
|
rc = efx_rx_scale_tbl_set(sa->nic, sa->rss_tbl,
|
|
sizeof(sa->rss_tbl));
|
|
}
|
|
|
|
finish:
|
|
#endif
|
|
return rc;
|
|
}
|
|
|
|
int
|
|
sfc_rx_start(struct sfc_adapter *sa)
|
|
{
|
|
unsigned int sw_index;
|
|
int rc;
|
|
|
|
sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
|
|
|
|
rc = efx_rx_init(sa->nic);
|
|
if (rc != 0)
|
|
goto fail_rx_init;
|
|
|
|
rc = sfc_rx_rss_config(sa);
|
|
if (rc != 0)
|
|
goto fail_rss_config;
|
|
|
|
for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
|
|
if ((!sa->rxq_info[sw_index].deferred_start ||
|
|
sa->rxq_info[sw_index].deferred_started)) {
|
|
rc = sfc_rx_qstart(sa, sw_index);
|
|
if (rc != 0)
|
|
goto fail_rx_qstart;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
|
|
fail_rx_qstart:
|
|
while (sw_index-- > 0)
|
|
sfc_rx_qstop(sa, sw_index);
|
|
|
|
fail_rss_config:
|
|
efx_rx_fini(sa->nic);
|
|
|
|
fail_rx_init:
|
|
sfc_log_init(sa, "failed %d", rc);
|
|
return rc;
|
|
}
|
|
|
|
void
|
|
sfc_rx_stop(struct sfc_adapter *sa)
|
|
{
|
|
unsigned int sw_index;
|
|
|
|
sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
|
|
|
|
sw_index = sa->rxq_count;
|
|
while (sw_index-- > 0) {
|
|
if (sa->rxq_info[sw_index].rxq != NULL)
|
|
sfc_rx_qstop(sa, sw_index);
|
|
}
|
|
|
|
efx_rx_fini(sa->nic);
|
|
}
|
|
|
|
static int
|
|
sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
|
|
{
|
|
struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
|
|
unsigned int max_entries;
|
|
|
|
max_entries = EFX_RXQ_MAXNDESCS;
|
|
SFC_ASSERT(rte_is_power_of_2(max_entries));
|
|
|
|
rxq_info->max_entries = max_entries;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
|
|
{
|
|
int rc = 0;
|
|
|
|
switch (rxmode->mq_mode) {
|
|
case ETH_MQ_RX_NONE:
|
|
/* No special checks are required */
|
|
break;
|
|
#if EFSYS_OPT_RX_SCALE
|
|
case ETH_MQ_RX_RSS:
|
|
if (sa->rss_support == EFX_RX_SCALE_UNAVAILABLE) {
|
|
sfc_err(sa, "RSS is not available");
|
|
rc = EINVAL;
|
|
}
|
|
break;
|
|
#endif
|
|
default:
|
|
sfc_err(sa, "Rx multi-queue mode %u not supported",
|
|
rxmode->mq_mode);
|
|
rc = EINVAL;
|
|
}
|
|
|
|
if (rxmode->header_split) {
|
|
sfc_err(sa, "Header split on Rx not supported");
|
|
rc = EINVAL;
|
|
}
|
|
|
|
if (rxmode->hw_vlan_filter) {
|
|
sfc_err(sa, "HW VLAN filtering not supported");
|
|
rc = EINVAL;
|
|
}
|
|
|
|
if (rxmode->hw_vlan_strip) {
|
|
sfc_err(sa, "HW VLAN stripping not supported");
|
|
rc = EINVAL;
|
|
}
|
|
|
|
if (rxmode->hw_vlan_extend) {
|
|
sfc_err(sa,
|
|
"Q-in-Q HW VLAN stripping not supported");
|
|
rc = EINVAL;
|
|
}
|
|
|
|
if (!rxmode->hw_strip_crc) {
|
|
sfc_warn(sa,
|
|
"FCS stripping control not supported - always stripped");
|
|
rxmode->hw_strip_crc = 1;
|
|
}
|
|
|
|
if (rxmode->enable_lro) {
|
|
sfc_err(sa, "LRO not supported");
|
|
rc = EINVAL;
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* Initialize Rx subsystem.
|
|
*
|
|
* Called at device configuration stage when number of receive queues is
|
|
* specified together with other device level receive configuration.
|
|
*
|
|
* It should be used to allocate NUMA-unaware resources.
|
|
*/
|
|
int
|
|
sfc_rx_init(struct sfc_adapter *sa)
|
|
{
|
|
struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
|
|
unsigned int sw_index;
|
|
int rc;
|
|
|
|
rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
|
|
if (rc != 0)
|
|
goto fail_check_mode;
|
|
|
|
sa->rxq_count = sa->eth_dev->data->nb_rx_queues;
|
|
|
|
rc = ENOMEM;
|
|
sa->rxq_info = rte_calloc_socket("sfc-rxqs", sa->rxq_count,
|
|
sizeof(struct sfc_rxq_info), 0,
|
|
sa->socket_id);
|
|
if (sa->rxq_info == NULL)
|
|
goto fail_rxqs_alloc;
|
|
|
|
for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
|
|
rc = sfc_rx_qinit_info(sa, sw_index);
|
|
if (rc != 0)
|
|
goto fail_rx_qinit_info;
|
|
}
|
|
|
|
#if EFSYS_OPT_RX_SCALE
|
|
sa->rss_channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
|
|
MIN(sa->rxq_count, EFX_MAXRSS) : 1;
|
|
|
|
if (sa->rss_channels > 1) {
|
|
for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
|
|
sa->rss_tbl[sw_index] = sw_index % sa->rss_channels;
|
|
}
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
fail_rx_qinit_info:
|
|
rte_free(sa->rxq_info);
|
|
sa->rxq_info = NULL;
|
|
|
|
fail_rxqs_alloc:
|
|
sa->rxq_count = 0;
|
|
fail_check_mode:
|
|
sfc_log_init(sa, "failed %d", rc);
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* Shutdown Rx subsystem.
|
|
*
|
|
* Called at device close stage, for example, before device
|
|
* reconfiguration or shutdown.
|
|
*/
|
|
void
|
|
sfc_rx_fini(struct sfc_adapter *sa)
|
|
{
|
|
unsigned int sw_index;
|
|
|
|
sw_index = sa->rxq_count;
|
|
while (sw_index-- > 0) {
|
|
if (sa->rxq_info[sw_index].rxq != NULL)
|
|
sfc_rx_qfini(sa, sw_index);
|
|
}
|
|
|
|
rte_free(sa->rxq_info);
|
|
sa->rxq_info = NULL;
|
|
sa->rxq_count = 0;
|
|
}
|