7277585767
CCP driver was scheduling only one CCP in a single burst(enqueue).
Effective throughput was limited to 1 CCP performance.
Scheduling multiple ccp within one burst will increase the ccp performance.
this changes will divide the enqueue packets equally among the multiple CCP
Fixes: e0d88a394e ("crypto/ccp: support run-time CPU based auth")
Cc: stable@dpdk.org
Signed-off-by: Amaranath Somalapuram <asomalap@amd.com>
112 lines
3.2 KiB
C
112 lines
3.2 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved.
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*/
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#ifndef _CCP_PMD_PRIVATE_H_
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#define _CCP_PMD_PRIVATE_H_
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#include <rte_cryptodev.h>
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#include "ccp_crypto.h"
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#define CRYPTODEV_NAME_CCP_PMD crypto_ccp
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#define CCP_LOG_ERR(fmt, args...) \
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RTE_LOG(ERR, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
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RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
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__func__, __LINE__, ## args)
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#ifdef RTE_LIBRTE_CCP_DEBUG
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#define CCP_LOG_INFO(fmt, args...) \
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RTE_LOG(INFO, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
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RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
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__func__, __LINE__, ## args)
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#define CCP_LOG_DBG(fmt, args...) \
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RTE_LOG(DEBUG, CRYPTODEV, "[%s] %s() line %u: " fmt "\n", \
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RTE_STR(CRYPTODEV_NAME_CCP_PMD), \
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__func__, __LINE__, ## args)
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#else
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#define CCP_LOG_INFO(fmt, args...)
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#define CCP_LOG_DBG(fmt, args...)
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#endif
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/**< Maximum queue pairs supported by CCP PMD */
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#define CCP_PMD_MAX_QUEUE_PAIRS 8
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#define CCP_NB_MAX_DESCRIPTORS 1024
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#define CCP_MAX_BURST 256
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#include "ccp_dev.h"
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/* private data structure for each CCP crypto device */
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struct ccp_private {
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unsigned int max_nb_qpairs; /**< Max number of queue pairs */
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uint8_t crypto_num_dev; /**< Number of working crypto devices */
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bool auth_opt; /**< Authentication offload option */
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struct ccp_device *last_dev; /**< Last working crypto device */
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};
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/* CCP batch info */
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struct ccp_batch_info {
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struct rte_crypto_op *op[CCP_MAX_BURST];
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/**< optable populated at enque time from app*/
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int op_idx;
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uint16_t b_idx;
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struct ccp_queue *cmd_q;
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uint16_t opcnt;
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uint16_t total_nb_ops;
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/**< no. of crypto ops in batch*/
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int desccnt;
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/**< no. of ccp queue descriptors*/
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uint32_t head_offset;
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/**< ccp queue head tail offsets time of enqueue*/
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uint32_t tail_offset;
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uint8_t lsb_buf[CCP_SB_BYTES * CCP_MAX_BURST];
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phys_addr_t lsb_buf_phys;
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/**< LSB intermediate buf for passthru */
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int lsb_buf_idx;
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uint16_t auth_ctr;
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/**< auth only ops batch for CPU based auth */
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} __rte_cache_aligned;
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/**< CCP crypto queue pair */
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struct ccp_qp {
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uint16_t id;
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/**< Queue Pair Identifier */
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char name[RTE_CRYPTODEV_NAME_MAX_LEN];
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/**< Unique Queue Pair Name */
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struct rte_ring *processed_pkts;
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/**< Ring for placing process packets */
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struct rte_mempool *sess_mp;
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/**< Session Mempool */
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struct rte_mempool *sess_mp_priv;
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/**< Session Private Data Mempool */
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struct rte_mempool *batch_mp;
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/**< Session Mempool for batch info */
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struct rte_cryptodev_stats qp_stats;
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/**< Queue pair statistics */
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struct ccp_batch_info *b_info;
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/**< Store ops pulled out of queue */
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struct rte_cryptodev *dev;
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/**< rte crypto device to which this qp belongs */
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uint8_t temp_digest[DIGEST_LENGTH_MAX];
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/**< Buffer used to store the digest generated
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* by the driver when verifying a digest provided
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* by the user (using authentication verify operation)
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*/
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} __rte_cache_aligned;
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/**< device specific operations function pointer structure */
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extern struct rte_cryptodev_ops *ccp_pmd_ops;
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uint16_t
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ccp_cpu_pmd_enqueue_burst(void *queue_pair,
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struct rte_crypto_op **ops,
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uint16_t nb_ops);
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uint16_t
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ccp_cpu_pmd_dequeue_burst(void *queue_pair,
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struct rte_crypto_op **ops,
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uint16_t nb_ops);
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#endif /* _CCP_PMD_PRIVATE_H_ */
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