Selwin Sebastian 09b0a36cc7 net/axgbe: toggle PLL settings during rate change
For each rate change command submission, the FW has to do a phy
power off sequence internally. For this to happen correctly, the
PLL re-initialization control setting has to be turned off before
sending mailbox commands and re-enabled once the command submission
is complete. Without the PLL control setting, the link up takes
longer time in a fixed phy configuration.

Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
Acked-by: Chandubabu Namburu <chandu@amd.com>
2022-01-27 15:29:23 +01:00
2021-11-17 12:48:20 +01:00
2021-12-02 21:36:19 +01:00
2022-01-20 15:53:00 +01:00
2016-11-13 15:25:12 +01:00
2021-11-26 16:29:25 +01:00
2021-12-02 21:36:19 +01:00
2021-12-02 21:36:19 +01:00
2022-01-18 10:04:25 +01:00
2020-09-07 23:51:57 +02:00
2018-01-04 22:41:38 +01:00
2021-12-02 21:36:19 +01:00

DPDK is a set of libraries and drivers for fast packet processing.
It supports many processor architectures and both FreeBSD and Linux.

The DPDK uses the Open Source BSD-3-Clause license for the core libraries
and drivers. The kernel components are GPL-2.0 licensed.

Please check the doc directory for release notes,
API documentation, and sample application information.

For questions and usage discussions, subscribe to: users@dpdk.org
Report bugs and issues to the development mailing list: dev@dpdk.org
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