Xueming Li 0ace586dee net/mlx5: fix memory region cache init ... MR cache init takes place on the device configuration. When the device is re-configured multiple times, for example when changing the number of queue on the flight, deadlock can happen. This patch moved MR cache init from device configuration function to probe function to make sure init only once. Fixes: 974f1e7ef1 ("net/mlx5: add new memory region support") Signed-off-by: Xueming Li <xuemingl@mellanox.com> Acked-by: Yongseok Koh <yskoh@mellanox.com>		2018-05-28 16:28:43 +02:00
..
baseband	baseband/turbo_sw: shorten internal buffers names	2018-05-28 03:17:14 +02:00
bus	bus/fslmc: fix export of unknown symbol	2018-05-28 03:23:16 +02:00
common
compress	compress/isal: add ISA-L decomp functionality	2018-05-10 17:46:20 +01:00
crypto	cryptodev: rename functions to get session size	2018-05-22 16:36:12 +02:00
event
mempool	mempool/bucket: add to meson build	2018-05-21 12:00:09 +02:00
net	net/mlx5: fix memory region cache init	2018-05-28 16:28:43 +02:00
raw	raw/ifpga/base: fix an error return	2018-05-21 16:13:06 +02:00
Makefile	compress/isal: add skeleton ISA-L compression PMD	2018-05-10 17:46:20 +01:00
meson.build	compress/isal: add skeleton ISA-L compression PMD	2018-05-10 17:46:20 +01:00