0c6b1bf46a
The VF reset can be triggered by the PF reset event, then the PCI bus master will be cleared, the VF will be not allowed to issue any Memory or I/O Requests. So after the reset event is detected, always enable the PCI bus master. And if failed, the device or system may be in an invalid state, so keep the VF reset state to mark it as I/O error. Signed-off-by: Haiyue Wang <haiyue.wang@intel.com> Acked-by: Beilei Xing <beilei.xing@intel.com> |
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.. | ||
iavf_ethdev.c | ||
iavf_fdir.c | ||
iavf_generic_flow.c | ||
iavf_generic_flow.h | ||
iavf_hash.c | ||
iavf_log.h | ||
iavf_rxtx_vec_avx2.c | ||
iavf_rxtx_vec_avx512.c | ||
iavf_rxtx_vec_common.h | ||
iavf_rxtx_vec_sse.c | ||
iavf_rxtx.c | ||
iavf_rxtx.h | ||
iavf_vchnl.c | ||
iavf.h | ||
meson.build | ||
rte_pmd_iavf.h | ||
version.map |