83c314da4c
add function to support ethtool ops: - get_reg_length - get_regs - get_eeprom_length - get_eeprom - set_eeprom Signed-off-by: Liang-Min Larry Wang <liang-min.wang@intel.com> Acked-by: Andrew Harvey <agh@cisco.com> Acked-by: David Harton <dharton@cisco.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
224 lines
6.9 KiB
C
224 lines
6.9 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2015 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IGB_REGS_H_
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#define _IGB_REGS_H_
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#include "e1000_ethdev.h"
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struct reg_info {
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uint32_t base_addr;
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uint32_t count;
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uint32_t stride;
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const char *name;
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};
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static const struct reg_info igb_regs_general[] = {
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{E1000_CTRL, 1, 1, "E1000_CTRL"},
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{E1000_STATUS, 1, 1, "E1000_STATUS"},
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{E1000_CTRL_EXT, 1, 1, "E1000_CTRL_EXT"},
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{E1000_MDIC, 1, 1, "E1000_MDIC"},
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{E1000_SCTL, 1, 1, "E1000_SCTL"},
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{E1000_CONNSW, 1, 1, "E1000_CONNSW"},
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{E1000_VET, 1, 1, "E1000_VET"},
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{E1000_LEDCTL, 1, 1, "E1000_LEDCTL"},
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{E1000_PBA, 1, 1, "E1000_PBA"},
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{E1000_PBS, 1, 1, "E1000_PBS"},
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{E1000_FRTIMER, 1, 1, "E1000_FRTIMER"},
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{E1000_TCPTIMER, 1, 1, "E1000_TCPTIMER"},
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{0, 0, 0, ""}
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};
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static const struct reg_info igb_regs_nvm[] = {
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{E1000_EECD, 1, 1, "E1000_EECD"},
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{0, 0, 0, ""}
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};
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static const struct reg_info igb_regs_interrupt[] = {
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{E1000_EICS, 1, 1, "E1000_EICS"},
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{E1000_EIMS, 1, 1, "E1000_EIMS"},
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{E1000_EIMC, 1, 1, "E1000_EIMC"},
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{E1000_EIAC, 1, 1, "E1000_EIAC"},
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{E1000_EIAM, 1, 1, "E1000_EIAM"},
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{E1000_ICS, 1, 1, "E1000_ICS"},
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{E1000_IMS, 1, 1, "E1000_IMS"},
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{E1000_IMC, 1, 1, "E1000_IMC"},
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{E1000_IAC, 1, 1, "E1000_IAC"},
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{E1000_IAM, 1, 1, "E1000_IAM"},
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{E1000_IMIRVP, 1, 1, "E1000_IMIRVP"},
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{E1000_EITR(0), 10, 4, "E1000_EITR"},
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{E1000_IMIR(0), 8, 4, "E1000_IMIR"},
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{E1000_IMIREXT(0), 8, 4, "E1000_IMIREXT"},
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{0, 0, 0, ""}
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};
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static const struct reg_info igb_regs_fctl[] = {
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{E1000_FCAL, 1, 1, "E1000_FCAL"},
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{E1000_FCAH, 1, 1, "E1000_FCAH"},
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{E1000_FCTTV, 1, 1, "E1000_FCTTV"},
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{E1000_FCRTL, 1, 1, "E1000_FCRTL"},
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{E1000_FCRTH, 1, 1, "E1000_FCRTH"},
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{E1000_FCRTV, 1, 1, "E1000_FCRTV"},
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{0, 0, 0, ""}
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};
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static const struct reg_info igb_regs_rxdma[] = {
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{E1000_RDBAL(0), 4, 0x100, "E1000_RDBAL"},
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{E1000_RDBAH(0), 4, 0x100, "E1000_RDBAH"},
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{E1000_RDLEN(0), 4, 0x100, "E1000_RDLEN"},
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{E1000_RDH(0), 4, 0x100, "E1000_RDH"},
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{E1000_RDT(0), 4, 0x100, "E1000_RDT"},
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{E1000_RXCTL(0), 4, 0x100, "E1000_RXCTL"},
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{E1000_SRRCTL(0), 4, 0x100, "E1000_SRRCTL"},
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{E1000_DCA_RXCTRL(0), 4, 0x100, "E1000_DCA_RXCTRL"},
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{0, 0, 0, ""}
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};
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static const struct reg_info igb_regs_rx[] = {
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{E1000_RCTL, 1, 1, "E1000_RCTL"},
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{E1000_RXCSUM, 1, 1, "E1000_RXCSUM"},
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{E1000_RLPML, 1, 1, "E1000_RLPML"},
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{E1000_RFCTL, 1, 1, "E1000_RFCTL"},
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{E1000_MRQC, 1, 1, "E1000_MRQC"},
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{E1000_VT_CTL, 1, 1, "E1000_VT_CTL"},
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{E1000_RAL(0), 16, 8, "E1000_RAL"},
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{E1000_RAH(0), 16, 8, "E1000_RAH"},
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{0, 0, 0, ""}
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};
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static const struct reg_info igb_regs_tx[] = {
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{E1000_TCTL, 1, 1, "E1000_TCTL"},
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{E1000_TCTL_EXT, 1, 1, "E1000_TCTL_EXT"},
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{E1000_TIPG, 1, 1, "E1000_TIPG"},
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{E1000_DTXCTL, 1, 1, "E1000_DTXCTL"},
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{E1000_TDBAL(0), 4, 0x100, "E1000_TDBAL"},
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{E1000_TDBAH(0), 4, 0x100, "E1000_TDBAH"},
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{E1000_TDLEN(0), 4, 0x100, "E1000_TDLEN"},
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{E1000_TDH(0), 4, 0x100, "E1000_TDLEN"},
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{E1000_TDT(0), 4, 0x100, "E1000_TDT"},
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{E1000_TXDCTL(0), 4, 0x100, "E1000_TXDCTL"},
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{E1000_TDWBAL(0), 4, 0x100, "E1000_TDWBAL"},
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{E1000_TDWBAH(0), 4, 0x100, "E1000_TDWBAH"},
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{E1000_DCA_TXCTRL(0), 4, 0x100, "E1000_DCA_TXCTRL"},
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{E1000_TDFH, 1, 1, "E1000_TDFH"},
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{E1000_TDFT, 1, 1, "E1000_TDFT"},
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{E1000_TDFHS, 1, 1, "E1000_TDFHS"},
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{E1000_TDFPC, 1, 1, "E1000_TDFPC"},
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{0, 0, 0, ""}
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};
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static const struct reg_info igb_regs_wakeup[] = {
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{E1000_WUC, 1, 1, "E1000_WUC"},
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{E1000_WUFC, 1, 1, "E1000_WUFC"},
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{E1000_WUS, 1, 1, "E1000_WUS"},
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{E1000_IPAV, 1, 1, "E1000_IPAV"},
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{E1000_WUPL, 1, 1, "E1000_WUPL"},
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{E1000_IP4AT_REG(0), 4, 8, "E1000_IP4AT_REG"},
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{E1000_IP6AT_REG(0), 4, 4, "E1000_IP6AT_REG"},
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{E1000_WUPM_REG(0), 4, 4, "E1000_WUPM_REG"},
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{E1000_FFMT_REG(0), 4, 8, "E1000_FFMT_REG"},
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{E1000_FFVT_REG(0), 4, 8, "E1000_FFVT_REG"},
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{E1000_FFLT_REG(0), 4, 8, "E1000_FFLT_REG"},
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{0, 0, 0, ""}
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};
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static const struct reg_info igb_regs_mac[] = {
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{E1000_PCS_CFG0, 1, 1, "E1000_PCS_CFG0"},
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{E1000_PCS_LCTL, 1, 1, "E1000_PCS_LCTL"},
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{E1000_PCS_LSTAT, 1, 1, "E1000_PCS_LSTAT"},
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{E1000_PCS_ANADV, 1, 1, "E1000_PCS_ANADV"},
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{E1000_PCS_LPAB, 1, 1, "E1000_PCS_LPAB"},
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{E1000_PCS_NPTX, 1, 1, "E1000_PCS_NPTX"},
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{E1000_PCS_LPABNP, 1, 1, "E1000_PCS_LPABNP"},
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{0, 0, 0, ""}
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};
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static const struct reg_info *igb_regs[] = {
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igb_regs_general,
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igb_regs_nvm,
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igb_regs_interrupt,
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igb_regs_fctl,
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igb_regs_rxdma,
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igb_regs_rx,
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igb_regs_tx,
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igb_regs_wakeup,
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igb_regs_mac,
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NULL};
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/* FIXME: reading igb_regs_interrupt results side-effect which doesn't
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* work with VFIO; re-install igb_regs_interrupt once issue is resolved.
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*/
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static const struct reg_info *igbvf_regs[] = {
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igb_regs_general,
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igb_regs_rxdma,
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igb_regs_tx,
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NULL};
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static inline int
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igb_read_regs(struct e1000_hw *hw, const struct reg_info *reg,
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uint32_t *reg_buf)
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{
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unsigned int i;
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for (i = 0; i < reg->count; i++) {
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reg_buf[i] = E1000_READ_REG(hw,
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reg->base_addr + i * reg->stride);
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}
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return reg->count;
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};
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static inline int
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igb_reg_group_count(const struct reg_info *regs)
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{
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int count = 0;
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int i = 0;
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while (regs[i].count)
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count += regs[i++].count;
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return count;
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};
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static inline int
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igb_read_regs_group(struct rte_eth_dev *dev, uint32_t *reg_buf,
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const struct reg_info *regs)
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{
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int count = 0;
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int i = 0;
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struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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while (regs[i].count)
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count += igb_read_regs(hw, ®s[i++], ®_buf[count]);
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return count;
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};
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#endif /* _IGB_REGS_H_ */
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