585d40375a
CCP engines support true hardware random generation feature. This patch implements api to read random number from CCP to be used within PMD. Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
811 lines
20 KiB
C
811 lines
20 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved.
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*/
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#include <dirent.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <sys/queue.h>
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#include <sys/types.h>
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#include <sys/file.h>
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#include <unistd.h>
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#include <rte_hexdump.h>
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#include <rte_memzone.h>
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#include <rte_malloc.h>
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#include <rte_memory.h>
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#include <rte_spinlock.h>
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#include <rte_string_fns.h>
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#include "ccp_dev.h"
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#include "ccp_pci.h"
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#include "ccp_pmd_private.h"
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struct ccp_list ccp_list = TAILQ_HEAD_INITIALIZER(ccp_list);
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static int ccp_dev_id;
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int
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ccp_dev_start(struct rte_cryptodev *dev)
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{
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struct ccp_private *priv = dev->data->dev_private;
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priv->last_dev = TAILQ_FIRST(&ccp_list);
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return 0;
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}
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struct ccp_queue *
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ccp_allot_queue(struct rte_cryptodev *cdev, int slot_req)
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{
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int i, ret = 0;
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struct ccp_device *dev;
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struct ccp_private *priv = cdev->data->dev_private;
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dev = TAILQ_NEXT(priv->last_dev, next);
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if (unlikely(dev == NULL))
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dev = TAILQ_FIRST(&ccp_list);
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priv->last_dev = dev;
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if (dev->qidx >= dev->cmd_q_count)
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dev->qidx = 0;
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ret = rte_atomic64_read(&dev->cmd_q[dev->qidx].free_slots);
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if (ret >= slot_req)
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return &dev->cmd_q[dev->qidx];
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for (i = 0; i < dev->cmd_q_count; i++) {
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dev->qidx++;
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if (dev->qidx >= dev->cmd_q_count)
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dev->qidx = 0;
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ret = rte_atomic64_read(&dev->cmd_q[dev->qidx].free_slots);
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if (ret >= slot_req)
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return &dev->cmd_q[dev->qidx];
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}
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return NULL;
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}
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int
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ccp_read_hwrng(uint32_t *value)
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{
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struct ccp_device *dev;
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TAILQ_FOREACH(dev, &ccp_list, next) {
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void *vaddr = (void *)(dev->pci.mem_resource[2].addr);
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while (dev->hwrng_retries++ < CCP_MAX_TRNG_RETRIES) {
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*value = CCP_READ_REG(vaddr, TRNG_OUT_REG);
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if (*value) {
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dev->hwrng_retries = 0;
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return 0;
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}
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}
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dev->hwrng_retries = 0;
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}
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return -1;
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}
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static const struct rte_memzone *
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ccp_queue_dma_zone_reserve(const char *queue_name,
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uint32_t queue_size,
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int socket_id)
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{
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const struct rte_memzone *mz;
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mz = rte_memzone_lookup(queue_name);
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if (mz != 0) {
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if (((size_t)queue_size <= mz->len) &&
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((socket_id == SOCKET_ID_ANY) ||
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(socket_id == mz->socket_id))) {
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CCP_LOG_INFO("re-use memzone already "
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"allocated for %s", queue_name);
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return mz;
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}
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CCP_LOG_ERR("Incompatible memzone already "
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"allocated %s, size %u, socket %d. "
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"Requested size %u, socket %u",
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queue_name, (uint32_t)mz->len,
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mz->socket_id, queue_size, socket_id);
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return NULL;
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}
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CCP_LOG_INFO("Allocate memzone for %s, size %u on socket %u",
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queue_name, queue_size, socket_id);
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return rte_memzone_reserve_aligned(queue_name, queue_size,
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socket_id, RTE_MEMZONE_IOVA_CONTIG, queue_size);
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}
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/* bitmap support apis */
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static inline void
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ccp_set_bit(unsigned long *bitmap, int n)
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{
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__sync_fetch_and_or(&bitmap[WORD_OFFSET(n)], (1UL << BIT_OFFSET(n)));
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}
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static inline void
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ccp_clear_bit(unsigned long *bitmap, int n)
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{
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__sync_fetch_and_and(&bitmap[WORD_OFFSET(n)], ~(1UL << BIT_OFFSET(n)));
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}
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static inline uint32_t
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ccp_get_bit(unsigned long *bitmap, int n)
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{
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return ((bitmap[WORD_OFFSET(n)] & (1 << BIT_OFFSET(n))) != 0);
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}
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static inline uint32_t
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ccp_ffz(unsigned long word)
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{
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unsigned long first_zero;
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first_zero = __builtin_ffsl(~word);
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return first_zero ? (first_zero - 1) :
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BITS_PER_WORD;
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}
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static inline uint32_t
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ccp_find_first_zero_bit(unsigned long *addr, uint32_t limit)
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{
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uint32_t i;
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uint32_t nwords = 0;
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nwords = (limit - 1) / BITS_PER_WORD + 1;
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for (i = 0; i < nwords; i++) {
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if (addr[i] == 0UL)
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return i * BITS_PER_WORD;
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if (addr[i] < ~(0UL))
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break;
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}
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return (i == nwords) ? limit : i * BITS_PER_WORD + ccp_ffz(addr[i]);
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}
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static void
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ccp_bitmap_set(unsigned long *map, unsigned int start, int len)
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{
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unsigned long *p = map + WORD_OFFSET(start);
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const unsigned int size = start + len;
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int bits_to_set = BITS_PER_WORD - (start % BITS_PER_WORD);
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unsigned long mask_to_set = CCP_BITMAP_FIRST_WORD_MASK(start);
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while (len - bits_to_set >= 0) {
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*p |= mask_to_set;
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len -= bits_to_set;
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bits_to_set = BITS_PER_WORD;
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mask_to_set = ~0UL;
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p++;
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}
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if (len) {
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mask_to_set &= CCP_BITMAP_LAST_WORD_MASK(size);
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*p |= mask_to_set;
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}
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}
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static void
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ccp_bitmap_clear(unsigned long *map, unsigned int start, int len)
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{
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unsigned long *p = map + WORD_OFFSET(start);
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const unsigned int size = start + len;
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int bits_to_clear = BITS_PER_WORD - (start % BITS_PER_WORD);
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unsigned long mask_to_clear = CCP_BITMAP_FIRST_WORD_MASK(start);
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while (len - bits_to_clear >= 0) {
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*p &= ~mask_to_clear;
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len -= bits_to_clear;
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bits_to_clear = BITS_PER_WORD;
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mask_to_clear = ~0UL;
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p++;
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}
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if (len) {
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mask_to_clear &= CCP_BITMAP_LAST_WORD_MASK(size);
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*p &= ~mask_to_clear;
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}
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}
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static unsigned long
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_ccp_find_next_bit(const unsigned long *addr,
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unsigned long nbits,
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unsigned long start,
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unsigned long invert)
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{
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unsigned long tmp;
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if (!nbits || start >= nbits)
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return nbits;
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tmp = addr[start / BITS_PER_WORD] ^ invert;
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/* Handle 1st word. */
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tmp &= CCP_BITMAP_FIRST_WORD_MASK(start);
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start = ccp_round_down(start, BITS_PER_WORD);
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while (!tmp) {
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start += BITS_PER_WORD;
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if (start >= nbits)
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return nbits;
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tmp = addr[start / BITS_PER_WORD] ^ invert;
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}
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return RTE_MIN(start + (ffs(tmp) - 1), nbits);
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}
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static unsigned long
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ccp_find_next_bit(const unsigned long *addr,
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unsigned long size,
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unsigned long offset)
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{
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return _ccp_find_next_bit(addr, size, offset, 0UL);
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}
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static unsigned long
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ccp_find_next_zero_bit(const unsigned long *addr,
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unsigned long size,
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unsigned long offset)
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{
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return _ccp_find_next_bit(addr, size, offset, ~0UL);
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}
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/**
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* bitmap_find_next_zero_area - find a contiguous aligned zero area
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* @map: The address to base the search on
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* @size: The bitmap size in bits
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* @start: The bitnumber to start searching at
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* @nr: The number of zeroed bits we're looking for
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*/
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static unsigned long
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ccp_bitmap_find_next_zero_area(unsigned long *map,
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unsigned long size,
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unsigned long start,
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unsigned int nr)
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{
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unsigned long index, end, i;
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again:
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index = ccp_find_next_zero_bit(map, size, start);
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end = index + nr;
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if (end > size)
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return end;
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i = ccp_find_next_bit(map, end, index);
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if (i < end) {
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start = i + 1;
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goto again;
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}
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return index;
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}
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static uint32_t
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ccp_lsb_alloc(struct ccp_queue *cmd_q, unsigned int count)
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{
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struct ccp_device *ccp;
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int start;
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/* First look at the map for the queue */
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if (cmd_q->lsb >= 0) {
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start = (uint32_t)ccp_bitmap_find_next_zero_area(cmd_q->lsbmap,
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LSB_SIZE, 0,
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count);
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if (start < LSB_SIZE) {
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ccp_bitmap_set(cmd_q->lsbmap, start, count);
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return start + cmd_q->lsb * LSB_SIZE;
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}
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}
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/* try to get an entry from the shared blocks */
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ccp = cmd_q->dev;
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rte_spinlock_lock(&ccp->lsb_lock);
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start = (uint32_t)ccp_bitmap_find_next_zero_area(ccp->lsbmap,
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MAX_LSB_CNT * LSB_SIZE,
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0, count);
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if (start <= MAX_LSB_CNT * LSB_SIZE) {
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ccp_bitmap_set(ccp->lsbmap, start, count);
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rte_spinlock_unlock(&ccp->lsb_lock);
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return start * LSB_ITEM_SIZE;
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}
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CCP_LOG_ERR("NO LSBs available");
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rte_spinlock_unlock(&ccp->lsb_lock);
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return 0;
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}
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static void __rte_unused
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ccp_lsb_free(struct ccp_queue *cmd_q,
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unsigned int start,
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unsigned int count)
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{
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int lsbno = start / LSB_SIZE;
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if (!start)
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return;
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if (cmd_q->lsb == lsbno) {
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/* An entry from the private LSB */
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ccp_bitmap_clear(cmd_q->lsbmap, start % LSB_SIZE, count);
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} else {
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/* From the shared LSBs */
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struct ccp_device *ccp = cmd_q->dev;
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rte_spinlock_lock(&ccp->lsb_lock);
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ccp_bitmap_clear(ccp->lsbmap, start, count);
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rte_spinlock_unlock(&ccp->lsb_lock);
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}
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}
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static int
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ccp_find_lsb_regions(struct ccp_queue *cmd_q, uint64_t status)
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{
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int q_mask = 1 << cmd_q->id;
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int weight = 0;
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int j;
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/* Build a bit mask to know which LSBs
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* this queue has access to.
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* Don't bother with segment 0
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* as it has special
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* privileges.
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*/
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cmd_q->lsbmask = 0;
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status >>= LSB_REGION_WIDTH;
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for (j = 1; j < MAX_LSB_CNT; j++) {
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if (status & q_mask)
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ccp_set_bit(&cmd_q->lsbmask, j);
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status >>= LSB_REGION_WIDTH;
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}
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for (j = 0; j < MAX_LSB_CNT; j++)
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if (ccp_get_bit(&cmd_q->lsbmask, j))
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weight++;
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printf("Queue %d can access %d LSB regions of mask %lu\n",
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(int)cmd_q->id, weight, cmd_q->lsbmask);
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return weight ? 0 : -EINVAL;
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}
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static int
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ccp_find_and_assign_lsb_to_q(struct ccp_device *ccp,
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int lsb_cnt, int n_lsbs,
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unsigned long *lsb_pub)
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{
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unsigned long qlsb = 0;
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int bitno = 0;
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int qlsb_wgt = 0;
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int i, j;
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/* For each queue:
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* If the count of potential LSBs available to a queue matches the
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* ordinal given to us in lsb_cnt:
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* Copy the mask of possible LSBs for this queue into "qlsb";
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* For each bit in qlsb, see if the corresponding bit in the
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* aggregation mask is set; if so, we have a match.
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* If we have a match, clear the bit in the aggregation to
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* mark it as no longer available.
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* If there is no match, clear the bit in qlsb and keep looking.
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*/
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for (i = 0; i < ccp->cmd_q_count; i++) {
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struct ccp_queue *cmd_q = &ccp->cmd_q[i];
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qlsb_wgt = 0;
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for (j = 0; j < MAX_LSB_CNT; j++)
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if (ccp_get_bit(&cmd_q->lsbmask, j))
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qlsb_wgt++;
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if (qlsb_wgt == lsb_cnt) {
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qlsb = cmd_q->lsbmask;
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bitno = ffs(qlsb) - 1;
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while (bitno < MAX_LSB_CNT) {
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if (ccp_get_bit(lsb_pub, bitno)) {
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/* We found an available LSB
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* that this queue can access
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*/
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cmd_q->lsb = bitno;
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ccp_clear_bit(lsb_pub, bitno);
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break;
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}
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ccp_clear_bit(&qlsb, bitno);
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bitno = ffs(qlsb) - 1;
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}
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if (bitno >= MAX_LSB_CNT)
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return -EINVAL;
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n_lsbs--;
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}
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}
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return n_lsbs;
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}
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/* For each queue, from the most- to least-constrained:
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* find an LSB that can be assigned to the queue. If there are N queues that
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* can only use M LSBs, where N > M, fail; otherwise, every queue will get a
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* dedicated LSB. Remaining LSB regions become a shared resource.
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* If we have fewer LSBs than queues, all LSB regions become shared
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* resources.
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*/
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static int
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ccp_assign_lsbs(struct ccp_device *ccp)
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{
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unsigned long lsb_pub = 0, qlsb = 0;
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int n_lsbs = 0;
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int bitno;
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int i, lsb_cnt;
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int rc = 0;
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rte_spinlock_init(&ccp->lsb_lock);
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/* Create an aggregate bitmap to get a total count of available LSBs */
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for (i = 0; i < ccp->cmd_q_count; i++)
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lsb_pub |= ccp->cmd_q[i].lsbmask;
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for (i = 0; i < MAX_LSB_CNT; i++)
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if (ccp_get_bit(&lsb_pub, i))
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n_lsbs++;
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if (n_lsbs >= ccp->cmd_q_count) {
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/* We have enough LSBS to give every queue a private LSB.
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* Brute force search to start with the queues that are more
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* constrained in LSB choice. When an LSB is privately
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* assigned, it is removed from the public mask.
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* This is an ugly N squared algorithm with some optimization.
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*/
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for (lsb_cnt = 1; n_lsbs && (lsb_cnt <= MAX_LSB_CNT);
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lsb_cnt++) {
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rc = ccp_find_and_assign_lsb_to_q(ccp, lsb_cnt, n_lsbs,
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&lsb_pub);
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if (rc < 0)
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return -EINVAL;
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n_lsbs = rc;
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}
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}
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rc = 0;
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/* What's left of the LSBs, according to the public mask, now become
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* shared. Any zero bits in the lsb_pub mask represent an LSB region
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* that can't be used as a shared resource, so mark the LSB slots for
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* them as "in use".
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*/
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qlsb = lsb_pub;
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bitno = ccp_find_first_zero_bit(&qlsb, MAX_LSB_CNT);
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while (bitno < MAX_LSB_CNT) {
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ccp_bitmap_set(ccp->lsbmap, bitno * LSB_SIZE, LSB_SIZE);
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ccp_set_bit(&qlsb, bitno);
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bitno = ccp_find_first_zero_bit(&qlsb, MAX_LSB_CNT);
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}
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return rc;
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}
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static int
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ccp_add_device(struct ccp_device *dev, int type)
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{
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int i;
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uint32_t qmr, status_lo, status_hi, dma_addr_lo, dma_addr_hi;
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uint64_t status;
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struct ccp_queue *cmd_q;
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const struct rte_memzone *q_mz;
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void *vaddr;
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if (dev == NULL)
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return -1;
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dev->id = ccp_dev_id++;
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dev->qidx = 0;
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vaddr = (void *)(dev->pci.mem_resource[2].addr);
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if (type == CCP_VERSION_5B) {
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CCP_WRITE_REG(vaddr, CMD_TRNG_CTL_OFFSET, 0x00012D57);
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CCP_WRITE_REG(vaddr, CMD_CONFIG_0_OFFSET, 0x00000003);
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for (i = 0; i < 12; i++) {
|
|
CCP_WRITE_REG(vaddr, CMD_AES_MASK_OFFSET,
|
|
CCP_READ_REG(vaddr, TRNG_OUT_REG));
|
|
}
|
|
CCP_WRITE_REG(vaddr, CMD_QUEUE_MASK_OFFSET, 0x0000001F);
|
|
CCP_WRITE_REG(vaddr, CMD_QUEUE_PRIO_OFFSET, 0x00005B6D);
|
|
CCP_WRITE_REG(vaddr, CMD_CMD_TIMEOUT_OFFSET, 0x00000000);
|
|
|
|
CCP_WRITE_REG(vaddr, LSB_PRIVATE_MASK_LO_OFFSET, 0x3FFFFFFF);
|
|
CCP_WRITE_REG(vaddr, LSB_PRIVATE_MASK_HI_OFFSET, 0x000003FF);
|
|
|
|
CCP_WRITE_REG(vaddr, CMD_CLK_GATE_CTL_OFFSET, 0x00108823);
|
|
}
|
|
CCP_WRITE_REG(vaddr, CMD_REQID_CONFIG_OFFSET, 0x00001249);
|
|
|
|
/* Copy the private LSB mask to the public registers */
|
|
status_lo = CCP_READ_REG(vaddr, LSB_PRIVATE_MASK_LO_OFFSET);
|
|
status_hi = CCP_READ_REG(vaddr, LSB_PRIVATE_MASK_HI_OFFSET);
|
|
CCP_WRITE_REG(vaddr, LSB_PUBLIC_MASK_LO_OFFSET, status_lo);
|
|
CCP_WRITE_REG(vaddr, LSB_PUBLIC_MASK_HI_OFFSET, status_hi);
|
|
status = ((uint64_t)status_hi<<30) | ((uint64_t)status_lo);
|
|
|
|
dev->cmd_q_count = 0;
|
|
/* Find available queues */
|
|
qmr = CCP_READ_REG(vaddr, Q_MASK_REG);
|
|
for (i = 0; i < MAX_HW_QUEUES; i++) {
|
|
if (!(qmr & (1 << i)))
|
|
continue;
|
|
cmd_q = &dev->cmd_q[dev->cmd_q_count++];
|
|
cmd_q->dev = dev;
|
|
cmd_q->id = i;
|
|
cmd_q->qidx = 0;
|
|
cmd_q->qsize = Q_SIZE(Q_DESC_SIZE);
|
|
|
|
cmd_q->reg_base = (uint8_t *)vaddr +
|
|
CMD_Q_STATUS_INCR * (i + 1);
|
|
|
|
/* CCP queue memory */
|
|
snprintf(cmd_q->memz_name, sizeof(cmd_q->memz_name),
|
|
"%s_%d_%s_%d_%s",
|
|
"ccp_dev",
|
|
(int)dev->id, "queue",
|
|
(int)cmd_q->id, "mem");
|
|
q_mz = ccp_queue_dma_zone_reserve(cmd_q->memz_name,
|
|
cmd_q->qsize, SOCKET_ID_ANY);
|
|
cmd_q->qbase_addr = (void *)q_mz->addr;
|
|
cmd_q->qbase_desc = (void *)q_mz->addr;
|
|
cmd_q->qbase_phys_addr = q_mz->phys_addr;
|
|
|
|
cmd_q->qcontrol = 0;
|
|
/* init control reg to zero */
|
|
CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE,
|
|
cmd_q->qcontrol);
|
|
|
|
/* Disable the interrupts */
|
|
CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_INT_ENABLE_BASE, 0x00);
|
|
CCP_READ_REG(cmd_q->reg_base, CMD_Q_INT_STATUS_BASE);
|
|
CCP_READ_REG(cmd_q->reg_base, CMD_Q_STATUS_BASE);
|
|
|
|
/* Clear the interrupts */
|
|
CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_INTERRUPT_STATUS_BASE,
|
|
ALL_INTERRUPTS);
|
|
|
|
/* Configure size of each virtual queue accessible to host */
|
|
cmd_q->qcontrol &= ~(CMD_Q_SIZE << CMD_Q_SHIFT);
|
|
cmd_q->qcontrol |= QUEUE_SIZE_VAL << CMD_Q_SHIFT;
|
|
|
|
dma_addr_lo = low32_value(cmd_q->qbase_phys_addr);
|
|
CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_TAIL_LO_BASE,
|
|
(uint32_t)dma_addr_lo);
|
|
CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_HEAD_LO_BASE,
|
|
(uint32_t)dma_addr_lo);
|
|
|
|
dma_addr_hi = high32_value(cmd_q->qbase_phys_addr);
|
|
cmd_q->qcontrol |= (dma_addr_hi << 16);
|
|
CCP_WRITE_REG(cmd_q->reg_base, CMD_Q_CONTROL_BASE,
|
|
cmd_q->qcontrol);
|
|
|
|
/* create LSB Mask map */
|
|
if (ccp_find_lsb_regions(cmd_q, status))
|
|
CCP_LOG_ERR("queue doesn't have lsb regions");
|
|
cmd_q->lsb = -1;
|
|
|
|
rte_atomic64_init(&cmd_q->free_slots);
|
|
rte_atomic64_set(&cmd_q->free_slots, (COMMANDS_PER_QUEUE - 1));
|
|
/* unused slot barrier b/w H&T */
|
|
}
|
|
|
|
if (ccp_assign_lsbs(dev))
|
|
CCP_LOG_ERR("Unable to assign lsb region");
|
|
|
|
/* pre-allocate LSB slots */
|
|
for (i = 0; i < dev->cmd_q_count; i++) {
|
|
dev->cmd_q[i].sb_key =
|
|
ccp_lsb_alloc(&dev->cmd_q[i], 1);
|
|
dev->cmd_q[i].sb_iv =
|
|
ccp_lsb_alloc(&dev->cmd_q[i], 1);
|
|
dev->cmd_q[i].sb_sha =
|
|
ccp_lsb_alloc(&dev->cmd_q[i], 2);
|
|
dev->cmd_q[i].sb_hmac =
|
|
ccp_lsb_alloc(&dev->cmd_q[i], 2);
|
|
}
|
|
|
|
TAILQ_INSERT_TAIL(&ccp_list, dev, next);
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
ccp_remove_device(struct ccp_device *dev)
|
|
{
|
|
if (dev == NULL)
|
|
return;
|
|
|
|
TAILQ_REMOVE(&ccp_list, dev, next);
|
|
}
|
|
|
|
static int
|
|
is_ccp_device(const char *dirname,
|
|
const struct rte_pci_id *ccp_id,
|
|
int *type)
|
|
{
|
|
char filename[PATH_MAX];
|
|
const struct rte_pci_id *id;
|
|
uint16_t vendor, device_id;
|
|
int i;
|
|
unsigned long tmp;
|
|
|
|
/* get vendor id */
|
|
snprintf(filename, sizeof(filename), "%s/vendor", dirname);
|
|
if (ccp_pci_parse_sysfs_value(filename, &tmp) < 0)
|
|
return 0;
|
|
vendor = (uint16_t)tmp;
|
|
|
|
/* get device id */
|
|
snprintf(filename, sizeof(filename), "%s/device", dirname);
|
|
if (ccp_pci_parse_sysfs_value(filename, &tmp) < 0)
|
|
return 0;
|
|
device_id = (uint16_t)tmp;
|
|
|
|
for (id = ccp_id, i = 0; id->vendor_id != 0; id++, i++) {
|
|
if (vendor == id->vendor_id &&
|
|
device_id == id->device_id) {
|
|
*type = i;
|
|
return 1; /* Matched device */
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
ccp_probe_device(const char *dirname, uint16_t domain,
|
|
uint8_t bus, uint8_t devid,
|
|
uint8_t function, int ccp_type)
|
|
{
|
|
struct ccp_device *ccp_dev = NULL;
|
|
struct rte_pci_device *pci;
|
|
char filename[PATH_MAX];
|
|
unsigned long tmp;
|
|
int uio_fd = -1, i, uio_num;
|
|
char uio_devname[PATH_MAX];
|
|
void *map_addr;
|
|
|
|
ccp_dev = rte_zmalloc("ccp_device", sizeof(*ccp_dev),
|
|
RTE_CACHE_LINE_SIZE);
|
|
if (ccp_dev == NULL)
|
|
goto fail;
|
|
pci = &(ccp_dev->pci);
|
|
|
|
pci->addr.domain = domain;
|
|
pci->addr.bus = bus;
|
|
pci->addr.devid = devid;
|
|
pci->addr.function = function;
|
|
|
|
/* get vendor id */
|
|
snprintf(filename, sizeof(filename), "%s/vendor", dirname);
|
|
if (ccp_pci_parse_sysfs_value(filename, &tmp) < 0)
|
|
goto fail;
|
|
pci->id.vendor_id = (uint16_t)tmp;
|
|
|
|
/* get device id */
|
|
snprintf(filename, sizeof(filename), "%s/device", dirname);
|
|
if (ccp_pci_parse_sysfs_value(filename, &tmp) < 0)
|
|
goto fail;
|
|
pci->id.device_id = (uint16_t)tmp;
|
|
|
|
/* get subsystem_vendor id */
|
|
snprintf(filename, sizeof(filename), "%s/subsystem_vendor",
|
|
dirname);
|
|
if (ccp_pci_parse_sysfs_value(filename, &tmp) < 0)
|
|
goto fail;
|
|
pci->id.subsystem_vendor_id = (uint16_t)tmp;
|
|
|
|
/* get subsystem_device id */
|
|
snprintf(filename, sizeof(filename), "%s/subsystem_device",
|
|
dirname);
|
|
if (ccp_pci_parse_sysfs_value(filename, &tmp) < 0)
|
|
goto fail;
|
|
pci->id.subsystem_device_id = (uint16_t)tmp;
|
|
|
|
/* get class_id */
|
|
snprintf(filename, sizeof(filename), "%s/class",
|
|
dirname);
|
|
if (ccp_pci_parse_sysfs_value(filename, &tmp) < 0)
|
|
goto fail;
|
|
/* the least 24 bits are valid: class, subclass, program interface */
|
|
pci->id.class_id = (uint32_t)tmp & RTE_CLASS_ANY_ID;
|
|
|
|
/* parse resources */
|
|
snprintf(filename, sizeof(filename), "%s/resource", dirname);
|
|
if (ccp_pci_parse_sysfs_resource(filename, pci) < 0)
|
|
goto fail;
|
|
|
|
uio_num = ccp_find_uio_devname(dirname);
|
|
if (uio_num < 0) {
|
|
/*
|
|
* It may take time for uio device to appear,
|
|
* wait here and try again
|
|
*/
|
|
usleep(100000);
|
|
uio_num = ccp_find_uio_devname(dirname);
|
|
if (uio_num < 0)
|
|
goto fail;
|
|
}
|
|
snprintf(uio_devname, sizeof(uio_devname), "/dev/uio%u", uio_num);
|
|
|
|
uio_fd = open(uio_devname, O_RDWR | O_NONBLOCK);
|
|
if (uio_fd < 0)
|
|
goto fail;
|
|
if (flock(uio_fd, LOCK_EX | LOCK_NB))
|
|
goto fail;
|
|
|
|
/* Map the PCI memory resource of device */
|
|
for (i = 0; i < PCI_MAX_RESOURCE; i++) {
|
|
|
|
char devname[PATH_MAX];
|
|
int res_fd;
|
|
|
|
if (pci->mem_resource[i].phys_addr == 0)
|
|
continue;
|
|
snprintf(devname, sizeof(devname), "%s/resource%d", dirname, i);
|
|
res_fd = open(devname, O_RDWR);
|
|
if (res_fd < 0)
|
|
goto fail;
|
|
map_addr = mmap(NULL, pci->mem_resource[i].len,
|
|
PROT_READ | PROT_WRITE,
|
|
MAP_SHARED, res_fd, 0);
|
|
if (map_addr == MAP_FAILED)
|
|
goto fail;
|
|
|
|
pci->mem_resource[i].addr = map_addr;
|
|
}
|
|
|
|
/* device is valid, add in list */
|
|
if (ccp_add_device(ccp_dev, ccp_type)) {
|
|
ccp_remove_device(ccp_dev);
|
|
goto fail;
|
|
}
|
|
|
|
return 0;
|
|
fail:
|
|
CCP_LOG_ERR("CCP Device probe failed");
|
|
if (uio_fd > 0)
|
|
close(uio_fd);
|
|
if (ccp_dev)
|
|
rte_free(ccp_dev);
|
|
return -1;
|
|
}
|
|
|
|
int
|
|
ccp_probe_devices(const struct rte_pci_id *ccp_id)
|
|
{
|
|
int dev_cnt = 0;
|
|
int ccp_type = 0;
|
|
struct dirent *d;
|
|
DIR *dir;
|
|
int ret = 0;
|
|
int module_idx = 0;
|
|
uint16_t domain;
|
|
uint8_t bus, devid, function;
|
|
char dirname[PATH_MAX];
|
|
|
|
module_idx = ccp_check_pci_uio_module();
|
|
if (module_idx < 0)
|
|
return -1;
|
|
|
|
TAILQ_INIT(&ccp_list);
|
|
dir = opendir(SYSFS_PCI_DEVICES);
|
|
if (dir == NULL)
|
|
return -1;
|
|
while ((d = readdir(dir)) != NULL) {
|
|
if (d->d_name[0] == '.')
|
|
continue;
|
|
if (ccp_parse_pci_addr_format(d->d_name, sizeof(d->d_name),
|
|
&domain, &bus, &devid, &function) != 0)
|
|
continue;
|
|
snprintf(dirname, sizeof(dirname), "%s/%s",
|
|
SYSFS_PCI_DEVICES, d->d_name);
|
|
if (is_ccp_device(dirname, ccp_id, &ccp_type)) {
|
|
printf("CCP : Detected CCP device with ID = 0x%x\n",
|
|
ccp_id[ccp_type].device_id);
|
|
ret = ccp_probe_device(dirname, domain, bus, devid,
|
|
function, ccp_type);
|
|
if (ret == 0)
|
|
dev_cnt++;
|
|
}
|
|
}
|
|
closedir(dir);
|
|
return dev_cnt;
|
|
}
|